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[26.04_linux-nvidia-bos] watchdog: sbsa_gwdt: add early_enable module parameter #558

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[26.04_linux-nvidia-bos] watchdog: sbsa_gwdt: add early_enable module parameter #558

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2 changes: 2 additions & 0 deletions Documentation/watchdog/watchdog-parameters.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -516,6 +516,8 @@ sbsa_gwdt:
nowayout:
Watchdog cannot be stopped once started
(default=kernel config parameter)
early_enable:
Watchdog is started on module insertion (default=0)

-------------------------------------------------

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19 changes: 17 additions & 2 deletions drivers/watchdog/sbsa_gwdt.c
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Expand Up @@ -123,6 +123,11 @@ MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

static bool early_enable;
module_param(early_enable, bool, 0);
MODULE_PARM_DESC(early_enable,
"Watchdog is started on module insertion (default=0)");

/*
* Arm Base System Architecture 1.0 introduces watchdog v1 which
* increases the length watchdog offset register to 48 bits.
Expand Down Expand Up @@ -297,6 +302,7 @@ static int sbsa_gwdt_probe(struct platform_device *pdev)
struct sbsa_gwdt *gwdt;
int ret, irq;
u32 status;
bool early_action;

gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
if (!gwdt)
Expand Down Expand Up @@ -387,14 +393,23 @@ static int sbsa_gwdt_probe(struct platform_device *pdev)
*/
sbsa_gwdt_set_timeout(wdd, wdd->timeout);

early_action = early_enable && !(status & SBSA_GWDT_WCS_EN);
if (early_action) {
sbsa_gwdt_start(wdd);
set_bit(WDOG_HW_RUNNING, &wdd->status);
}

watchdog_stop_on_reboot(wdd);
ret = devm_watchdog_register_device(dev, wdd);
if (ret)
if (ret) {
if (early_action)
sbsa_gwdt_stop(wdd);
return ret;
}

dev_info(dev, "Initialized with %ds timeout @ %u Hz, action=%d.%s\n",
wdd->timeout, gwdt->clk, action,
status & SBSA_GWDT_WCS_EN ? " [enabled]" : "");
watchdog_hw_running(wdd) ? " [enabled]" : "");

return 0;
}
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