add interface operating ESP32 internal flash - #448
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| mod esp32_rom; | ||
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| #[cfg(soc_esp32c3)] | ||
| pub(crate) mod internal_flash; |
| #[cfg(soc_esp32c3)] | ||
| mod esp32_rom; | ||
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| #[cfg(soc_esp32c3)] |
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Do not use soc_esp32c3; instead, use a more generic gate, such as cfg(esp32_internal_flash).
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internal_flash: cross-erase-block write loop + bounded wait. boards/seeed_xiao_esp32c3: board-level flash wiring. boot: init internal flash + esp32-flash0 device before init_vfs (TODO: move this init into the board, out of boot). BUILD.gn: add mipidsi dep for the board LCD stack. (spi_flash_cmd NOR-flash wait_busy tuning moved to a separate branch.) Co-Authored-By: Claude <[email protected]>
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Description
This branch adds ESP32-C3 on-chip Flash access and executable XIP mapping support. A reserved Flash region is exposed as
/dev/esp32-flash0, allowing userspace loaders to erase, read, write, map, and unmap executable images without embedding ELF or image-management logic in the kernel.Main changes
Internal Flash driver
Device registration
Registers the reserved internal Flash region as the misc device:
Provides standard device operations for reading, writing, querying capacity, and synchronization.
Adds versioned ioctl requests for:
XIP mapping
fence.iafter mapping changes.Configuration
The following parameters are defined through Kconfig:
ESP32_LOADABLE_REGION_BASEESP32_LOADABLE_REGION_SIZEESP32_FLASH_READ_CHUNK_SIZEThe default loadable region is:
Board integration
/dev/esp32-flash0before VFS initialization.