feat: add SharedTerminalBridgeSolver for upward power-biased bridge layouts (#12)

[iprasen]

Summary

Resolves #12.

In #12, automatic schematic layout of the Si7021 circuit (from #11) resulted in a tangled layout where pull-up resistors R1 and R2 and the solder jumper bridge SJ1 were scattered and inverted. The maintainer noted:

"I think by making positive voltage connections (VCC/V*) bias upward we can improve this layout."

This PR implements SharedTerminalBridgeSolver as a dedicated strategy in PackInnerPartitionsSolver (placed right alongside ParallelSeriesBranchSolver and ParallelAlignedPassiveSolver).

Architecture & Approach

1. Detection (findSharedTerminalBridgeGroups.ts):
   • Connectivity-driven and independent of reference designators: detects a multi-pin chip (mainChip), two 2-pin passives connected to distinct pins on the same side of mainChip, and a 3-pin terminal/bridge component whose outer pins connect to the far pins of the passives while its third pin connects to a positive voltage supply rail (e.g. V3_3, VCC).
2. Upward Power-Biased Placement (layoutSharedTerminalBridgeGroup.ts):
   • Rotates the 3-pin terminal component so that its positive voltage rail pin points directly upward (+y), matching universal schematic convention.
   • Rotates and aligns the branch passives as vertical columns side-by-side with their far pins facing upward toward the bridge and near pins facing downward toward the incoming signal traces from the main chip.
   • Automatically orders the branches to match the terminal component's pin geometry, completely eliminating wire crossings.
   • Centers the bridge horizontally above the branch passives.
3. Partition Solver Strategy (SharedTerminalBridgeSolver.ts & PackInnerPartitionsSolver.ts):
   • Fully conforms to the established PARTITION_SOLVER_STRATEGIES pattern in PackInnerPartitionsSolver.
   • Validates clearance against all candidate and non-candidate components in the partition with multiple spacing candidates, gracefully falling back to standard packing if obstructed.
4. Testing:
   • Visual solver SVG snapshot test (tests/repros/repro-si7021-shared-terminal-bridge.test.ts).
   • Reference designator independence test (verifying arbitrary component names).
   • Collision clearance and graceful fallback test when blocked by an obstacle.
   • Verified 0 regressions across existing layout tests and snapshots.

Layout Result

Component	Position	Orientation	Note
U1	(0, 0)	0°	Main IC
R2	(1.25, 0.4)	180°	Left branch, SCL pin y=-0.1
R1	(2.15, 0.4)	180°	Right branch, SDA pin y=-0.1
SJ1	(1.70, 1.6)	0°	Bridge centered above R1/R2, V3_3 pin (1.70, 1.9) pointing UP

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Project	Deployment	Actions	Updated
matchpack	Ready	Preview	Sep 18, 2026 2:07pm UTC