Improve SI7021 shared-terminal branch layout

[diogo2806]

Summary

Improve the SI7021 layout from #11 by adding a narrow topology-aware refinement for two movable two-pin branches that leave distinct pins on the same side of a main chip and terminate on a shared multi-pin terminal.

The implementation is connectivity-driven. It does not depend on reference designators, component names, voltage-net names, or fixed coordinates.

Approach

• detect exactly two movable two-pin branch components between a same-side pair of main-chip pins and two distinct pins of one shared terminal
• require the terminal to have no unrelated inter-chip strong connections and at least one remaining net-connected pin
• start from the existing generic packed layout rather than replacing the packer
• orient each branch outward using its declared allowed rotations
• preserve chipGap against moved and unmoved components
• evaluate allowed terminal rotations
• score the four affected strong connections by Manhattan length with a large penalty for proper crossings
• commit the refinement only when it strictly improves the original local score; otherwise keep the existing layout unchanged

Safety and regression coverage

The focused SI7021 suite verifies:

• topology detection without reference-name matching
• renamed chip and pin identifiers
• fixed branch rejection
• fixed terminal rejection
• missing shared-rail rejection
• unrelated extra strong-connection rejection
• physical blocker fallback without partial movement
• anchor rotations at 0, 90, 180, and 270 degrees
• restricted branch rotations
• zero component overlaps
• affected strong-connection Manhattan length below 3 units
• outward terminal placement
• deterministic repeated output
• input immutability
• committed SVG solver snapshot

Repository blast radius

The regression scanner loads every JSON InputProblem fixture under pages/repros and tests/assets.

• 52 InputProblem fixtures scanned
• 1/52 activates the shared-terminal solver
• the only activated fixture is pages/repros/repro-si7021/si7021-matchpack-input.json
• any future activation of another current fixture fails the regression test
• every activated layout must solve successfully with zero overlaps

Verification

GitHub Actions on the validated head:

• Bun Test: passed — 118 passed, 1 skipped, 0 failed across 72 files
• Type Check: passed
• Format Check: passed
• 2 SVG snapshots validated
• 1105 assertions executed

The SI7021 snapshot is committed at:

tests/repros/__snapshots__/repro-si7021-shared-terminal-branches-shared-terminal.snap.svg

/claim #12

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Project	Deployment	Actions	Updated
matchpack	Ready	Preview	Sep 16, 2026 2:59pm UTC