fix: detect shared multi-pin rail-carrier resistor banks

[VIZION777]

Summary

Improve issue #12 handling for SI7021-style pull-up banks where two resistors connect distinct pins on the same side of a main chip and terminate through distinct pins of one shared multi-pin jumper/rail carrier.

Problem

The existing same-side passive detector skips these resistors because each resistor has two strong connections (main chip + carrier), while the ordinary detector expects exactly one. The existing chip-connected rail-load path also only accepts a 2-pin rail component, so the 3-pin SJ1 topology in the #11 repro is missed.

Fix

Extend findSameSidePassiveGroups with a narrow rail-carrier topology detector that requires:

• typed 2-pin resistors;
• exactly two strong connections per resistor;
• one connection to a 4+ pin main chip;
• one connection to the same non-passive, non-crystal multi-pin carrier;
• distinct main-chip pins;
• distinct carrier pins;
• exactly one remaining carrier pin connected to a net.

The detected resistor bank is then handled by the existing ParallelAlignedPassiveSolver, preserving the established reflow and clearance behavior instead of adding another global post-pack movement phase.

Regression coverage

Adds a focused SI7021-shaped unit test with R1/R2 -> SJ1 and a single remaining SJ1 rail pin.

AI disclosure

AI assistance was used for repository analysis and implementation. The contribution is submitted for human review and responsibility.

Fixes #12

/claim #12

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Project	Deployment	Actions	Updated (UTC)
matchpack	Ready	Preview	Aug 25, 2026 10:16am

[VIZION777]

All required CI checks are green now (Bun Test, Type Check, Format Check), and the PR is mergeable. The implementation is focused on the SI7021-style shared 3-pin rail-carrier topology from #12 and includes regression coverage. Ready for maintainer review.