#
timeloop
Here are 9 public repositories matching this topic...
Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-based Accelerators
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Jul 30, 2024 - C++
Memory-Aware DNN Algorithm-Hardware Mapping via Integer Linear Programming
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Nov 1, 2023 - Python
MEDEA: A Multi-objective Evolutionary Approach to DNN Hardware Mapping
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Mar 5, 2024 - C++
Open, reproducible design-space-exploration-to-silicon flow for a DS-CNN keyword-spotting accelerator: Timeloop/Accelergy DSE -> Sky130 ASIC (OpenLane) -> ECP5 FPGA, with predicted-vs-measured validation.
fpga rtl design-space-exploration keyword-spotting yosys timeloop accelergy hardware-accelerator openlane sky130
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Aug 6, 2026 - SystemVerilog
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Mar 6, 2021 - Python
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