MIT-licensed Goldilocks quadratic-extension vector arithmetic hardware accelerator. Chisel source and generated SystemVerilog. | MIT 开源 Goldilocks 二次扩域向量运算硬件加速器，提供 Chisel 源码与生成的 SystemVerilog。
chisel rtl systemverilog hardware-acceleration zero-knowledge goldilocks finite-field vector-processing openrtl extension-field
-
Updated
Oct 17, 2026 - SystemVerilog