Skywater 130nm Klayout Device Generators PDK
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Jul 12, 2024 - Python
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analog-layout
Here are 8 public repositories matching this topic...
A Roadmap application for ECE students from NIT college student based knowledge
roadmap skills vlsi ece vlsi-physical-design vlsi-circuits static-timing-analysis physical-design vlsi-design roadmaps physical-design-automation analog-layout design-for-test roadmap-sh roadmap-project ece-project
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Jan 29, 2026 - JavaScript
Research portfolio on analog layout techniques, structure-aware generation, B*-tree placement, well-domain repair, and access-aware routing.
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Sep 5, 2026 - CSS
Hands-on Analog Layout Internship/Training at Semionics using Cadence Virtuoso and GlobalFoundries 40nm, covering custom analog, mixed-signal, and CMOS circuit layout.
layout calibre cadence-virtuoso digital-design custom-layout cmos-circuits analog-layout layout-design standard-cells custom-analog mixed-signals-design globalfoundries design-rule-check design-for-manufacturability parasitic-extraction layout-vs-schematic gf40nm
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Aug 19, 2026
Design and Implementation of a 3 Stage Ring Oscillator on Cadence Virtuoso
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Aug 4, 2025
StrongARM latch comparator in 180 nm CMOS: input-referred offset from Monte Carlo decision statistics, full-custom layout, and post-layout offset from extracted parasitics.
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Sep 6, 2026
Design of a 10-bit R-2R DAC using the open-source SkyWater 130nm PDK. Includes schematics, layout files, and a Python environment for metric evaluation (for educational purposes).
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Apr 30, 2026 - Python
gLayout ported to gdsfactory 9 + setup and examples for the iic-osic-tools container (Chipathon)
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Jul 30, 2026 - Python
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