[thePunderWoman]

Summary

Starts the V2 board in PCB/v2.x. V1's main problem is length, so V2 is 70 x 30 mm, 30 mm shorter and 5 mm narrower than V1. All parts are placed, but the board is not routed and is not ready to order. PCB/v1.x is unchanged, and firmware is unchanged.

Layout: V1's order is kept: bumper, stick with side buttons on both sides, face buttons, XBee, USB.

Radios

• XB3-24Z8UM on the top side: XBee 3 PRO Micro, +19 dBm, Zigbee 3.0, U.FL. The -J part is the +8 dBm non-PRO module, so it is not a substitute.
• ESP32-S3-WROOM-1U-N8 behind it on the bottom. Same pinout as the WROOM-1, 6.3 mm shorter, no antenna keep-out. A builder can put the antenna on either radio's U.FL.

Buttons and GPIOs

• All 12 buttons move to a TCA9555PWR I2C expander at 0x20, with BTN_INT on GPIO18. The power button stays on GPIO2, so power-off does not depend on I2C.
• This frees pins for a USB-to-XBee bridge over the ESP32: GPIO21 to DIN, GPIO47 from DOUT, GPIO38 to RTS, GPIO42 to DTR. GPIO3 and GPIO45 are strapping pins and stay unused.
• On-board 4.7k I2C pull-ups are added. The design had none, so without them, unplugging the OLED would have stopped every button working.
• Macro and boot switches become the Alps SKRPABE010, with the footprint checked against the Alps land drawing. There is one centered bumper.

Power blocks: the buck, charger and latch keep V1's placement and bottom-layer routing as rigid blocks. The latch is too long to fit whole, so it is split at PWR_BTN_TRIGGER. Two charger GND vias moved to clear the face buttons, and V1's top-layer traces in these blocks were not copied.

CI: the Stackup check, purchasing BOM and PCB sync now run on both boards.

Verification

• stackup check --locked, BOM export and PCB sync check pass on v1 and v2.
• KiCad DRC on v2 with zones refilled: 0 errors, 23 warnings for copied traces and vias that await routing, 198 connections unrouted.
• scripts/spice/latch_sim.py passes. V2's power nets match V1's.
• pio test -e native: 395/395. pio run builds.
• The two module STEP models were measured after a board STEP export, and each lands centered on its part.

Open before this board can be ordered

• Routing. Not attempted yet, so whether it fits is unproven. The mounting holes were removed and need revisiting.
• Firmware: V2 cannot read buttons until there is an expander driver. It also needs the sleep wake on GPIO18 and the USB bridge, and V1 and V2 will need separate pin maps.
• The USB bridge is the only way to reach the XBee. There are no test pads, and the module is soldered down. Test RTS/DTR behavior over the ESP32's native USB on a V1.2 board first.
• The design still assumes the 14500. The planned pouch cell changes charge current and runtime, and a thermistor would need a 3-pin battery connector.
• The Micro's RF test-point keepout is derived from Digi's bottom-view drawing, because the manual has no Micro keepout drawing. Check it against a real module.
• Assembly: the top side must reflow last, since the XBee cannot be reflowed upside down. It is MSL 3, and modules will likely be consigned to PCBWay.
• The logos are parked off the board, and the silkscreen text was removed.
• Neither Espressif's nor Digi's STEP file states a license. See PCB/v2.x/libraries/3dmodels/README.md for where they came from.

🤖 Generated with Claude Code