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channels last input and output, fast conv2d Pool2D HWC bloc kernels - #80

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elfman2 merged 10 commits into
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elfman_perfo
Jan 22, 2026
Merged

elfman2 merged 10 commits into
mainfrom
elfman_perfo

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@elfman2 elfman2 commented Jan 19, 2026

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elfman2 commented Jan 22, 2026

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HWC kernel for Conv2D, Pool2D tiling output for CPU SIMD
Winograd for 3x3 stride 1 limited to even feature size input
1x1 fast conv.

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elfman2 merged commit 46e224c into main Jan 22, 2026
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elfman2 deleted the elfman_perfo branch January 22, 2026 19:24
@elfman2 elfman2 mentioned this pull request Jan 22, 2026
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