Four-layer STM32G474 control board, designed from scratch to replace the legacy electronics on BYU Formula SAE Electric's race car.
I led a four-person team on this. I did all of the board layout and most of the component selection and schematic capture, and set up the Git-based version control workflow the team used for collaborative hardware design.
MCU — STM32G474RET6. The part was chosen for its FDCAN peripherals; the car needed multiple independent CAN domains and this saved external controllers.
Power tree — fused 12 V input, synchronous buck down to 5 V, LDO to 3.3 V. ADC sense on the low-voltage rails so firmware can monitor its own supplies.
Switched outputs — six channels driven from GPIO:
| Count | Rail | Topology |
|---|---|---|
| 2 | 12 V | High-side PMOS switch with an NMOS gate driver |
| 2 | 5 V | Open-drain |
| 2 | 3.3 V | Logic level |
Communication — FDCAN over TJA1051T-3 transceivers. USB-C debug serial through a CP2102N bridge, with a TPD2EUSB30 for ESD protection on the data lines. STLINK-V3 six-pin header for programming and debug.
The first assembled board had a dead 12 V rail. I traced it to a ground test point whose barrel crossed the split in the power plane — a layout mistake that doesn't announce itself in the schematic and is easy to miss in the 2D view. Worth writing down because it's the kind of fault you only find by following the rail rather than by re-reading the netlist.
| Path | Contents |
|---|---|
ProjectAtlas.kicad_sch |
Schematic |
ProjectAtlas.kicad_pcb |
Four-layer layout |
Project_Atlas_Symbols/ |
Custom symbols |
Project_Atlas_Footprints.pretty/ |
Custom footprints |
assets/ |
Renders and reference images |
The manufacturing package — four-layer gerbers, BOM and pick-and-place — was released to the team for fabrication.
Open the project in KiCad 8 or later.
Built and brought up during the 2025–26 season. Archived here as the design record.