Fill tx buffer incrementally to avoid packet loss - #19
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The upstream USB buffer is not guaranteed to be emptied by the host faster than the uLA device writes to it while draining. This can cause packet loss, corrupting the data received by the host. Instead of filling the TX buffer all at once and hoping it drains in time, refill it incrementally: once when the DMA transfer completes, and again on every subsequent USB interrupt, until all sample data has been sent.
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August 25, 2026 11:56
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The upstream USB buffer is not guaranteed to be emptied by the host faster than the uLA device writes to it while draining. This can cause packet loss, corrupting the data received by the host.
Instead of filling the TX buffer all at once and hoping it drains in time, refill it incrementally: once when the DMA transfer completes, and again on every subsequent USB interrupt, until all sample data has been sent.
This packet loss explains the strange artifacts seen in #8 and #12. If any odd number of packets are dropped in a row, the interpreted data by sigrok gets shifted by 8 channels. E.g. channel 5 is observed at channel 13 as seen in #12. This is since the in-memory representation of 16 channels is 2 bytes (1 bit/channel), which sigrok expects in-order on the wire.
The packet loss can easily be observed when capturing through
sigrok-cli, since prints a warning to stdout when the requested amount of samples differ from the received amount of samples. This is in contrast to Pulseview which does not indicate any errors.An example capture before this fix:
Verified on the following system: