High Performance Computing Project
Developed during the Erasmus Programme at the University of Salerno (Italy).
This repository contains the implementation developed during the High Performance Computing course at the University of Salerno as part of the Erasmus Programme.
The project extends the original miniLB implementation developed by the University of Salerno HPC research group.
Instead of rewriting the numerical solver in Python, the complete Lattice Boltzmann Method (LBM) remains implemented in optimized native C++/SYCL kernels.
Python is responsible only for:
- device selection
- queue creation
- Unified Shared Memory (USM) allocation
- benchmark orchestration
- validation
- logging
while all computationally intensive operations remain executed inside native SYCL kernels.
The project was experimentally evaluated on the CINECA High Performance Computing infrastructure, using Intel oneAPI together with OpenCL CPU and NVIDIA Tesla V100S GPU backends.
This project is based on the original miniLB implementation developed by the High Performance Computing (HPC) research group at the University of Salerno.
Original repository:
https://github.com/unisa-hpc/miniLB
The original project provides the SYCL implementation of the Lattice Boltzmann Method (LBM), while this repository extends it with additional functionality developed during the High Performance Computing course.
| Original Project | This Repository |
|---|---|
| Native SYCL implementation | Python bindings |
| LBM solver | DPCTL integration |
| Original benchmarks | Extended benchmark suite |
| Base documentation | Complete project documentation |
| Original kernels | CUDA evaluation |
| HPC research code | Educational extension |
The main objective of this work was to extend the original miniLB framework with a modern Python interface while preserving the performance of the native SYCL implementation.
The project focuses on:
- exposing the native SYCL implementation to Python
- integrating pybind11 with Intel DPCTL
- supporting Unified Shared Memory (USM)
- runtime device selection
- preserving native C++ execution for the simulation loop
- benchmarking CPU/OpenCL and CUDA GPU execution
- validating numerical correctness
- providing reproducible experiments and complete documentation
Compared to the original miniLB repository, this project introduces:
- Python bindings using pybind11
- Intel DPCTL interoperability
- Unified Shared Memory (USM)
- Runtime device selection
- Native C++/SYCL execution
- Python benchmark framework
- CPU/OpenCL benchmarking
- CUDA GPU benchmarking
- Automated validation
- Performance analysis
- Extended documentation
Python
Benchmark Scripts
│
│
DPCTL Queue
Device Selection
USM Allocation
│
▼
pybind11 Extension
│
▼
Native C++ / SYCL
miniLB Solver
│
┌──────────────┼──────────────┐
│ │ │
▼ ▼ ▼
Collision Streaming Boundaries
│ │ │
└──────────────┼──────────────┘
│
▼
Validation
│
▼
MLUPS Results
The complete simulation loop is executed entirely inside compiled C++/SYCL code.
Python performs only orchestration tasks and never executes the numerical kernels.
- C++
- Python
- SYCL
- Intel oneAPI DPC++
- OpenCL
- CUDA SYCL
- pybind11
- DPCTL
- mdspan
- fmt
- CMake
The original miniLB framework provides:
- 2D Lattice Boltzmann Method implementation
- Native C++20 implementation
- Original FORTRAN reference implementation
- Intel oneAPI DPC++
- AdaptiveCpp support
- Intel DPC++ support
- OpenCL backend
- CUDA backend
- Level Zero backend
- Multiple benchmark use cases (LDC, POF, VKS, TGV)
- Configurable floating-point precision
- CMake-based build system
.
├── docs
│ ├── development_notes
│ │ ├── benchmark_results.md
│ │ ├── build_notes.md
│ │ ├── performance_analysis.md
│ │ └── reproducing_experiments.md
│ ├── images
│ │ ├── cpu_opencl_performance_comparison.jpg
│ │ └── cuda_gpu_performance_scaling.jpg
│ ├── latex
│ │ └── main.tex
│ ├── DPCTL_with_Python_Bindings_of_Lattice_Boltzmann4.pdf
│ ├── build_guide.md
│ ├── cmake_options.md
│ └── troubleshooting.md
│
├── miniLB
│ ├── fortran
│ ├── include
│ │ └── bgk2d
│ ├── python_binding
│ │ └── results
│ │ └── benchmark_v5_sycl.csv
│ ├── python_binding_extension
│ │ ├── benchmark_sycl
│ │ │ └── run_v5_sycl_benchmark.py
│ │ ├── dpctl_examples
│ │ │ ├── miniLB_step_pybind11_kernels
│ │ │ │ ├── CMakeLists.txt
│ │ │ │ ├── _minilb_step.cpp
│ │ │ │ └── test_minilb_step_pybind11.py
│ │ │ ├── miniLB_step_pybind11_kernels_copy
│ │ │ │ ├── CMakeLists.txt
│ │ │ │ ├── _minilb_step.cpp
│ │ │ │ └── test_minilb_step_pybind11.py
│ │ │ ├── vector_add_dpctl_pybind11_kernels
│ │ │ │ ├── CMakeLists.txt
│ │ │ │ ├── _minilb_dpctl.cpp
│ │ │ │ └── test_minilb_dpctl_pybind11.py
│ │ │ ├── miniLB_collision_dpctl.py
│ │ │ ├── miniLB_density_dpctl.py
│ │ │ ├── miniLB_step_dpctl.py
│ │ │ ├── vector_add_dpctl.py
│ │ │ └── vector_add_kernel.py
│ │ ├── inputs
│ │ │ ├── bgk_256.input
│ │ │ ├── bgk_512.input
│ │ │ ├── bgk_1024.input
│ │ │ └── bgk_bench.input
│ │ ├── python_bindings
│ │ │ ├── CMakeLists.txt
│ │ │ └── minilb_py.cpp
│ │ ├── results
│ │ │ ├── benchmark_results.csv
│ │ │ ├── cpu_optimization_results.csv
│ │ │ └── cpu_optimization_results.txt
│ │ ├── tests
│ │ │ └── test_minilb_step_pybind11.py
│ │ └── benchmark_minilb.py
│ ├── src
│ ├── .clang-format
│ ├── .clang-tidy
│ ├── .gitignore
│ ├── CMakeLists.txt
│ └── License
│
└── README.md
The project was developed and evaluated during the High Performance Computing course at the University of Salerno.
The benchmark campaign was executed using the CINECA High Performance Computing infrastructure, allowing experiments on both CPU and GPU heterogeneous systems.
The following technologies were used during development:
| Component | Description |
|---|---|
| University | University of Salerno |
| Course | High Performance Computing |
| Environment | Intel oneAPI |
| Programming Model | SYCL |
| CPU Backend | OpenCL |
| GPU Backend | CUDA SYCL |
| HPC Infrastructure | CINECA Supercomputing Center |
The project uses CMake together with Intel oneAPI DPC++.
Example configuration:
cmake -S . \
-B build \
-DCMAKE_BUILD_TYPE=Release \
-DSYCL_IMPL=dpcpp \
-DCMAKE_CXX_COMPILER=icpx \
-DBGK_USE_CASE=LDC \
-DBGK_PRECISION=SINGLE \
-DBGK_SYCL_MALLOC_SHARED=ONCompile the project.
cmake --build buildThe original miniLB framework supports:
- AdaptiveCpp
- Intel DPC++
- OpenCL
- CUDA
- Level Zero
For a complete description of every available configuration parameter, see:
docs/CMAKE_OPTIONS.md
Detailed build instructions are available in:
docs/BUILD_GUIDE.md
The executable requires a valid bgk.input configuration file.
Example:
cp python_binding_extension/inputs/bgk_512.input build/bgk.inputExecute the simulation:
ONEAPI_DEVICE_SELECTOR=opencl:cpu ./bgk2dSYCLThe benchmark reports:
- MLUPS
- execution time
- validation status
Complete execution workflows, Python benchmarks and reproducibility instructions are available in:
docs/DEVELOPMENT_NOTES/REPRODUCING_EXPERIMENTS.md
The implementation was evaluated on both CPU and GPU backends using the Million Lattice Updates Per Second (MLUPS) metric.
Two complementary benchmark campaigns were performed.
The first benchmark compares the original miniLB implementation with the new Python-DPCTL execution path.
Although the Python-enabled version introduces additional orchestration overhead, the complete numerical simulation remains executed inside native C++/SYCL kernels, providing a flexible Python interface while preserving high-performance execution.
The figure compares the original miniLB implementation with the Python-DPCTL extension.
The second benchmark evaluates the scalability of the final implementation on an NVIDIA Tesla V100S GPU.
Performance increases with the lattice size, demonstrating the ability of the implementation to efficiently exploit GPU parallelism for large computational domains.
The highest measured performance reaches approximately 117 MLUPS for a 2048 × 2048 lattice.
- Native C++/SYCL execution
- Python orchestration through DPCTL
- OpenCL CPU support
- CUDA GPU support
- Unified Shared Memory (USM)
- Runtime device selection
- Automatic validation
- Benchmark logging
- Performance evaluation using MLUPS
- Scalability analysis across multiple lattice sizes
The following table summarizes the main benchmark configurations evaluated during the project.
| Grid Size | DOUBLE (MLUPS) | SINGLE (MLUPS) | Speedup |
|---|---|---|---|
| 256 × 256 | 50.90 | 57.61 | 1.13× |
| 512 × 512 | 62.05 | 106.25 | 1.71× |
| 1024 × 1024 | 100.40 | 110.30 | 1.10× |
The benchmark campaign shows that the SINGLE precision implementation consistently delivers higher throughput while also reducing execution time and memory consumption.
The Python-enabled implementation was compared against the original native miniLB implementation.
| Grid Size | Original miniLB | Python-DPCTL |
|---|---|---|
| 128 × 128 | 44.91 | 22.12 |
| 256 × 256 | 100.70 | 47.16 |
| 384 × 384 | 141.49 | 53.52 |
| 512 × 512 | 159.71 | 58.39 |
| 768 × 768 | 128.29 | 49.25 |
| 1024 × 1024 | 129.43 | 57.97 |
Although the Python-DPCTL implementation introduces additional overhead, all computationally intensive operations remain executed inside native C++/SYCL kernels. Python is responsible only for device management, queue creation, benchmark orchestration, and execution control.
Performance was also evaluated on an NVIDIA Tesla V100S accelerator using the CUDA backend provided by Intel oneAPI SYCL.
| Grid Size | MLUPS |
|---|---|
| 128 × 128 | 14.27 |
| 256 × 256 | 52.69 |
| 384 × 384 | 68.28 |
| 512 × 512 | 82.55 |
| 768 × 768 | 92.76 |
| 1024 × 1024 | 102.58 |
| 1280 × 1280 | 106.99 |
| 1536 × 1536 | 113.49 |
| 1792 × 1792 | 112.94 |
| 2048 × 2048 | 116.99 |
The benchmark demonstrates good scalability on GPU hardware, with performance increasing as the computational domain becomes larger.
Correctness was verified after every benchmark execution.
The validation process includes:
- Collision step verification
- Streaming step verification
- Bounce-back boundary conditions
- Moving lid boundary condition
- Unified Shared Memory allocation
- Native C++/SYCL kernel execution
- Final simulation state verification
Only successful executions were considered for the reported benchmark results.
The repository contains additional documentation covering the build process, benchmark methodology, configuration options and project organization.
| Document | Description |
|---|---|
docs/BUILD_GUIDE.md |
Complete build and execution instructions |
docs/CMAKE_OPTIONS.md |
Description of all CMake configuration options |
docs/BENCHMARK_RESULTS.md |
Complete benchmark measurements |
docs/PERFORMANCE_ANALYSIS.md |
Analysis and discussion of performance results |
docs/TROUBLESHOOTING.md |
Common build and runtime issues |
docs/DEVELOPMENT_NOTES/BUILD_NOTES.md |
Development notes and implementation details |
Compared to the original miniLB project, this repository introduces:
- Python bindings through pybind11
- DPCTL interoperability
- Unified Shared Memory integration
- Python benchmark framework
- Runtime device selection
- Extended benchmark campaign
- CPU/OpenCL evaluation
- CUDA GPU evaluation
- Complete project documentation
- Performance analysis
Several extensions can further improve the project.
Possible future developments include:
- Multi-GPU execution
- Additional SYCL backend evaluation
- Automatic benchmark generation
- Extended validation suite
- Performance profiling using Intel VTune
- GPU kernel optimization
- Additional Lattice Boltzmann benchmark cases
- Continuous Integration (CI) support
- Automated regression testing
Bianca-Maria Andreica
Faculty of Automation and Computers
Politehnica University of Timișoara
Erasmus Student
University of Salerno
Roman Andrei
University of Salerno
Ariana Crista
University of Salerno
The authors would like to thank the High Performance Computing research group at the University of Salerno for developing the original miniLB project used as the basis of this work.
This project was developed during the High Performance Computing course within the Erasmus Programme at the University of Salerno.
Benchmark experiments were executed on the CINECA High Performance Computing infrastructure.
The original miniLB project is available at:
https://github.com/unisa-hpc/miniLB
This repository is distributed under the terms of the license included in the LICENSE file.
Please refer to the LICENSE document for additional information.
-
Succi, S. The Lattice Boltzmann Equation for Fluid Dynamics and Beyond. Oxford University Press.
-
Khronos Group. SYCL 2020 Specification.
-
Intel oneAPI Programming Guide.
-
Intel DPCTL Documentation.
-
pybind11 Documentation.
-
University of Salerno HPC Group – miniLB Project.
-
NVIDIA CUDA Programming Guide.