All pull requests

Pull requests

• softfloat: Implement rounded FP64-to-FP16 conversion

  #68·canxin121 opened Nov 6, 2026·

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• arm: Avoid signed left-shift UB in narrow NEON helpers

  #67·canxin121 opened Nov 6, 2026·

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  1

• softfloat: Round tiny FP16 values in directed modes

  #66·canxin121 opened Nov 6, 2026·

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• softfloat: Preserve FP16 NaN sign and payload

  #65·canxin121 opened Nov 6, 2026·

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• softfloat: Honor directed rounding on FP16 overflow

  #64·canxin121 opened Nov 6, 2026·

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  1

• softfloat: Preserve flags on alternative-half overflow

  #63·canxin121 opened Nov 6, 2026·

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  1

• softfloat: Raise Invalid for alternative-half NaNs

  #62·canxin121 opened Nov 6, 2026·

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• arm: Enable Cortex-A15 VFP features with CPACR checks

  #61·canxin121 opened Nov 6, 2026·

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• arm: Widen signed operands before VABAL.S32 subtraction

  #60·canxin121 opened Nov 6, 2026·

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• softfloat: Propagate NaNs in ordinary min/max

  #59·canxin121 opened Nov 6, 2026·

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• arm: Suppress intermediate flags in float-to-fixed conversion

  #58·canxin121 opened Nov 6, 2026·

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• arm: Reject reserved 64-bit CP15 encodings

  #57·canxin121 opened Nov 6, 2026·

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• arm: Bound unsigned NEON shifts by the element width

  #56·canxin121 opened Nov 6, 2026·

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• softfloat: Correct FP32-to-FP16 exception flags

  #55·canxin121 opened Nov 6, 2026·

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• arm: Return zero for oversized signed rounding shifts

  #54·canxin121 opened Nov 6, 2026·

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• arm: Record NEON saturation in the canonical QC field

  #53·canxin121 opened Nov 6, 2026·

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• softfloat: Avoid Inexact on saturated unsigned conversions

  #52·canxin121 opened Nov 6, 2026·

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• arm: Keep UHSUB8 subtraction within each byte lane

  #51·canxin121 opened Nov 6, 2026·

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• arm: Fix GE flags for unsigned parallel halfword operations

  #50·canxin121 opened Nov 6, 2026·

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• xtensa: Fixes needed to run ESP-IDF on the esp32 core

  #49·oguzkaganyaglioglu opened Oct 14, 2026·

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• ppc: Extend VLE execution and add e200z4d

  #48·iglooom opened Oct 10, 2026·6 of 9 tasks·

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• RISCV: integrate translator fixes for Renode reports #958-#962

  #44·carlosqwqqwq opened Sep 7, 2026·

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• xtensa: register FP opcodes for ESP32 and ESP32-S3

  #43·hinaultd opened Aug 25, 2026·

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• xtensa: fix OOB TLB entry access

  #42·hinaultd opened Aug 20, 2026·

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• xtensa: add SALT/SALTU opcodes to esp32/esp32s3 core

  #41·hinaultd opened Aug 19, 2026·

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