[aien-spark]

Audit rows 29 (cuFFT-class) and 30 (cuRAND-class). Status: EXERCISED on host, warp simulator and one GB10 run (N=1). Not QUALIFIED.

Evidence

Tier	Result	Receipt
host, make test	CUDA++ HOST TESTS PASS (49 targets), includes test-gpu-mathlibs	run on this tree, 2026-10-27 11:30Z to 12:07Z
make test-om-units	PASS src/{omega_om_units.c,omega_native.h,omega_om_units.ident} regenerate byte for byte	same run
simulator, gpu_mathlibs_test --sim	mathlibs sim: PASS (429 checks)	same run
GB10 chip, no flag (full chip tier)	mathlibs chip: PASS (268 checks), hold 09:03:26Z to 09:03:44Z	evidence/MATHLIBS-RNG-FFT-2026-10-27/chip-receipt.txt, chip-stdout.txt, chip-provenance.txt
nvdisasm (CUDA 13.0, offline oracle)	36 of 36 kernels (mutants included) list the same as the sm_121 disassembler; the red decoder fails 36 of 36	evidence/MATHLIBS-RNG-FFT-2026-10-27/nvdisasm-check.txt

Chip numbers, all from chip-receipt.txt:

• RNG: raw streams on 3 bases x 2 offsets, 0 mismatches; aien-math fixture rows_covered=792 of 792 comparisons=1683 mismatches=0; uniform 69632 values, 0 mismatches; normal worst_rel=3.411262e-07 against tol=2.87e-06; 8388608-value runs of kinds 1 and 2, bad=0.
• FFT: N = 4 to 2048, forward and inverse, batch 8, every normwise_err under its tolerance (worst 1.1323e-07 at N=2048 against 2.0946e-06); batch 2050 over 3 launches, normwise_err=1.0421e-07.
• Mutants: RNG mutant 1 4352 of 4352 wrong, mutant 2 4335 of 4352 over tolerance; FFT mutant 1 caught at N=64 and N=2048, mutant 2 caught at N=16 and, as expected, not at N=4.
• Tolerances and the normal-sampler reference values come from Wolfram: evidence/MATHLIBS-RNG-FFT-2026-10-27/wolfram-constants.txt.

Provenance: chip-provenance.txt records the binary and source sha256s of the run. After the run, src/omega_gpu_mathlibs_api.c gained a comment only (the MIGRATION-PENDING note). The object built from it is byte-identical, and this head rebuilds the chip binary with the same sha256 (91b796c6...92de): evidence/MATHLIBS-RNG-FFT-2026-10-27/source-after-chip-run.txt.

An earlier hold at 09:02:00Z failed 1 of 268 checks: chip fixture: 1683 used of 792. That was a test bug. The fixture check counted overlapping comparisons instead of distinct rows. Every RNG, FFT and mutant line in that run had 0 mismatches. The check now counts distinct rows (fixture_distinct()), and the 09:03 run is the rerun.

What is here

• om/mathlibs/mathlibs_ir.om: seeded Omega unit that emits the BlackwellIR records for the xoshiro256** RNG (state = SplitMix64(base + g), raw 64-bit, uniform f32, normal f32) and the complex f32 FFT (Stockham radix 4, with one radix-2 stage first when log2 n is odd; one CTA of n/4 threads per transform; inverse not normalised, as in cuFFT). The first commit message says "radix-2"; the header src/omega_gpu_mathlibs_api.h is the description to trust.
• src/omega_gpu_om_ir.{c,h}: replay of those records through the register allocator and encoder. MIGRATION-PENDING C.
• src/omega_gpu_mathlibs_api.{c,h}: launchers. The .c is MIGRATION-PENDING C; its successor is om/mathlibs/mathlibs_launch.om once a seeded unit can call the session launch path through omega-bridge.
• tests/gpu_mathlibs_test.c: host, simulator and chip tiers; test-gpu-mathlibs is in HOST_TESTS.
• tests/bw_warp_sim.h: I2FP (s32 to f32), MUFU.LG2, signed STG.E immediate offsets, partial last warp.
• src/omega_sm121_disasm.c: MUFU.LG2 row; IMAD.SHL naming for every power of two, from an nvdisasm probe (imad-shl-probe.*).
• docs/runtime/portability_table.tsv: rows for the four new src/omega_gpu_* files. README, ROADMAP, PAIN_POINTS and the replacement map now say PARTIAL for cuFFT and cuRAND.

Limits

• One generator, xoshiro256**. Power-of-two complex-to-complex FFT from 4 to 2048 points only: no real, 2-D or 3-D transforms and no larger sizes.
• Chip result is N=1, one GB10, driver 580.173.02. Not QUALIFIED.

NOT_RUN

• make test-sm121dis: mk/c3.mk (the gpu_scan_test and gpu_gemm_test rules) is on main but not on om/encoder-cubin, so the corpus target cannot build on this base. The mathlibs kernels were checked with the nvdisasm script directly (row above).
• No repeat chip run, no timing claim. The elapsed_ns values in the receipt are single launches and are not a benchmark.

Base: om/encoder-cubin (CUDApp#143). Pins: omega-mv e5b32567 (omc sha256 2c824805...029f), omega-bridge 431fff0a, aien-math 43c629d (fixture source).

[aien-spark]

Status update: CI checks have not executed on GitHub Actions for this PR head (0 check runs, formerly targeting merged branch om/encoder-cubin, now retargeted to main); make test-sm121dis is noted as NOT_RUN. Leaving draft per gate rules.

[drakestapleton]

Classification: needs-changes (draft).

• CodeQL fails on a25d7fe with a new high-severity alert at tests/gpu_mathlibs_test.c:775 (file created with mode 0666). Create it with 0600 via open(O_CREAT, 0600) + fdopen, as #170 did.
• make test-sm121dis is NOT_RUN.
• GB10 evidence is a single run (N=1), receipts in evidence/MATHLIBS-RNG-FFT-2026-10-27/. Good, but not QUALIFIED as the body says.

To become merge-ready: clear CodeQL, run make test-sm121dis, mark ready for review; a second GB10 run would strengthen the chip claim.

[drakestapleton]

Classification: needs-changes.

• CodeQL fails on a25d7fe: new high-severity alert at tests/gpu_mathlibs_test.c:775 (file created with mode 0666). Create it with mode 0600 (open + fdopen), as #170 did for its fixture writer.
• make test-sm121dis is NOT_RUN per the status comment.
• GB10 evidence exists (evidence/MATHLIBS-RNG-FFT-2026-10-27/chip-receipt.txt, 268 checks PASS) but is a single run (N=1); a second chip run would support the stated tolerances.
• Still draft.
• To become merge-ready: clear the CodeQL alert, run make test-sm121dis, mark ready.

— Grokbot