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fix(usb/ehci): correct the USBCMD and PORTSC bit definitions - #105

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FengHeting merged 3 commits into
ViudiraTech:developfrom
JiTianYu391:fix/ehci-register-bits
Oct 20, 2026
Merged

FengHeting merged 3 commits into
ViudiraTech:developfrom
JiTianYu391:fix/ehci-register-bits

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@JiTianYu391

@JiTianYu391 JiTianYu391 commented Oct 17, 2026 •

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问题

include/drivers/usb/host/ehci/ehci.h 里两组寄存器位与 EHCI 1.0 规范(2.3.1 / 2.3.9)以及 Linux include/linux/usb/ehci_def.h 不一致,导致 EHCI 上的任何设备都无法枚举。

寄存器 位 原来 正确 原位置实际是
USBCMD ASE bit 2 bit 5 Frame List Size (3:2)
USBCMD PSE bit 3 bit 4 Frame List Size (3:2)
PORTSC CSC bit 17 bit 1 Port Test Control (19:16)
PORTSC PED bit 1 bit 2 CSC
PORTSC PEC bit 18 bit 3 Port Test Control (19:16)

故障链

  1. PORTSC:端口复位后 ehci_port_reset() 检查"PED",实际读到的是 CSC(已被 worker 清掉),于是把高速设备误判为"未使能",置 PO 交给伴随控制器 → Port 0 enumeration failed: -19。
  2. USBCMD:修好 1 之后,"ASE" 写进了 FLS 字段,QEMU 直接丢弃(hcd-ehci.c: attempt to set frame list size),异步调度从未启动,第一个 SET_ADDRESS 超时 → -110。

两处缺一不可。只改头文件,ehci.c 无改动。

测试(QEMU q35,usb-ehci + usb-storage)

版本 结果
develop enumeration failed: -19,无 /dev/sda
只修 PORTSC enumeration failed: -110
只修 USBCMD enumeration failed: -19
本 PR ✅ /dev/sda 出现

QEMU trace(修复前):内核写 USBCMD = 0x5,QEMU 记录为 0x1,ASE 被丢弃。

备注

  • 开机后的热插拔还依赖中断路由修复,见 fix(usb): EHCI/OHCI/UHCI hot-plug, hubs and failed-port retries #106。两个 PR 改的内容不重叠,可按任意顺序合并;单独合并本 PR 时 EHCI 冷启动 U 盘 + 键盘均可识别并读出数据(4/4)。
  • 头文件里 EHCI_PORT_PTC_* 的位置也不对,但没有任何代码使用,为保持改动最小未动。
  • 测试时需临时关闭 CONFIG_VIRTIO_GPU:当前 develop 的 virtgpu_vq.c 有 static ratelimit 重定义编译错误,与本 PR 无关。

🤖 Generated with Claude Code

Two groups of EHCI register bits did not match EHCI 1.0 (sections 2.3.1
and 2.3.9) or Linux's include/linux/usb/ehci_def.h:

  USBCMD  ASE  bit 2 -> bit 5    (bits 3:2 are Frame List Size)
          PSE  bit 3 -> bit 4
  PORTSC  CSC  bit 17 -> bit 1   (bits 19:16 are Port Test Control)
          PED  bit 1 -> bit 2
          PEC  bit 18 -> bit 3

Together they kept every EHCI device from enumerating:

- After the port reset, ehci_port_reset() tested "PED" but read CSC,
  which the worker had already cleared, so a high-speed device looked
  not enabled and the port was handed to the companion (-ENODEV).
- With that fixed, "ASE" landed in the Frame List Size field, which
  QEMU rejects ("attempt to set frame list size"), so the async
  schedule never started and the first SET_ADDRESS timed out
  (-ETIMEDOUT).

Tested in QEMU (q35, usb-ehci + usb-storage): before, "usb-ehci: Port
0 enumeration failed: -19" and no /dev/sda; with only the PORTSC fix,
-110; with both, /dev/sda appears.

Signed-off-by: JiTianYu391 <[email protected]>
Co-Authored-By: Claude Opus 5.5 <[email protected]>
Rainy101112
Rainy101112 previously approved these changes Oct 18, 2026
EHCI_CMD_ASYNC was defined at USBCMD bit 8, but bits 9:8 are the park
mode count and the park enable is bit 11.  Replace it with the park
count field and EHCI_CMD_PARK.

EHCI_PORT_PTC_SHIFT pointed at bits 6:3 instead of the port test
control field at bits 19:16, so it overlapped PEC, OCA, OCC and FPR.

The QH endpoint-capability block defined C at bits 1:0 and RL at
bits 7:4.  Neither field exists there: C is the control endpoint flag
at bit 27 (already covered by EHCI_QH_CONTROL) and RL is the NAK
counter reload at bits 31:28.  Drop the bogus pair and give RL its
real field.

EHCI_HCS_NCC and EHCI_HCS_NPCC were named the wrong way round:
bits 11:8 are N_PCC and bits 15:12 are N_CC.

None of the corrected macros had users, so no generated code changes.

Signed-off-by: MicroFish <[email protected]>
Co-Authored-By: Claude Code <[email protected]>
clang-format lines up the USBCMD macros with the longer park count
field added by the previous change.

Signed-off-by: MicroFish <[email protected]>
@FengHeting
FengHeting merged commit c62f12e into ViudiraTech:develop Oct 20, 2026
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3 participants