perf(ep): optimize InterNodeV1LL small-token latency on EP16

[isytwu]

Motivation

Reduce host-side overhead and xGMI gather latency for small-token InterNodeV1LL workloads on EP16/MI300X, while improving tuning reliability.

Technical Details

• Cache persistent dispatch/combine tensor views.
• Reduce stream lookup and repeated Python import overhead.
• Use a configurable relative tuning margin, median-based scoring, and deterministic tie-breaking.
• Add configurable low-latency benchmark shapes and tuned EP16 MI300X launch configurations.
• Use a 16-byte load-first gather to overlap xGMI reads.
• Fall back to the existing 4-byte path when alignment requirements are not met.
• Partition hidden dimensions in whole vector steps to avoid expensive scalar tails.

Test Plan

• Run EP16 correctness tests on 2×8 MI300X GPUs with 4, 8, and 16 tokens.
• Test hidden dimensions 1024, 4096, 6144, and 7168.
• Exercise multiple block, warp, and RDMA-block configurations.
• Verify eager and HIP graph replay results.
• Compare host enqueue, end-to-end, and Kineto kernel latency.

Test Result

• All tested ranks completed with zero correctness errors.
• HIP graph replay was bit-exact with eager execution.
• Cached tensor views reduced 4-token end-to-end latency from 214 µs to 157 µs.
• Raw current-stream lookup measured approximately 0.16 µs versus 4.9 µs previously.
• The InterNodeV1LL combine kernel improved from 56.9 µs to 46.2 µs at 4 tokens and hidden size 6144, a 19% reduction.

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.