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feat: add asin/acos intrinsic support for f32 and f64 - #216
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Signed-off-by: sunteng <[email protected]>
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Thanks for the PR. LGTM The libdevice routing is correct and the Note this slightly widens the blast radius of issue #98 (NVVM IR on pre-Blackwell targets), but that's the right layering - the intrinsics should land independently of the NVVM IR fix. |
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Summary
asinf32/asinf64/acosf32/acosf64placeholder symbols indialect-mir/src/rust_intrinsics.rs, following the same pattern as the existing float math intrinsicsf{32,64}::asin/acos, which lower through thestd::sys::cmath::asinf/asin/acosf/acosshims (asin/acos are std-only — there is nocorelibm form, unlikecbrt)libm-crate spellings (libm::asinf,libm::math::acos::acos, ...) that glam'snostd-libmlowering emits on nvptx__nv_asinf/__nv_asin/__nv_acosf/__nv_acosin the MIR-lower call translatorasin_acos_smokeexample: 14 test values across the full[-1, 1]domain (including both endpoints and-0.0) × 4 variants (asin/acos × f32/f64), verifying GPU results are within 2 ULP of hostlibmTest plan
cargo test -p dialect-mir -p mir-importer -p mir-lower --lib— unit tests covering intrinsic name → enum dispatch, thestd::sys::cmath+libm-crate spellings, and arg countcargo oxide run asin_acos_smoke— end-to-end GPU smoke test; expected output:SUCCESS: 14 cases × 4 variants within 2 ULP of host libm