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Board-to-board link: wire two boards over UART or I2C - #44
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New /link section. Pick two catalog boards and a bus; PinHub lists the wires that join them from each board's own pin map and stops where the records cannot vouch for a direct connection. - board-link.ts derives UART/I2C signals from source-backed pin functions where a board has them, otherwise from signal names already in labels and aliases (TX0, U0TXD, UART3_RXD, SDA1, I2C-3 SDA, TWI1-SCK, ...). Only a number names an instance; unnamed buses are split per connector. - UART crosses TX/RX, I2C joins SDA/SCL, ground is always shared, power rails are never joined. - Logic levels come from each record: matching levels link directly, a mismatch puts a level shifter on every signal wire (worded through fiveVoltCaution), an unsettled level asks for a check. - Pin cautions (flag notes, reserved role, pin notes) are quoted once. - SPI is left out on purpose: which data pin is the input in peripheral mode depends on the chip, and no record states it. - UI: board search per end, swap, bus switch, per-side bus select, a harness-style wire list with an "LS" block drawn in the run, both connector sheets with ringed pads, copy wire list. URL state is bounded and shape-checked (link-params.ts). - Entry points: "Link" in the section nav (icons now hide below 480 px so five links fit 360 px, each at least 44 x 44) and "Wire these two boards" on the compare page. - Mobile gate fixes: sheets keep a minimum scale and scroll sideways with a hint, captions and ferrule labels wrap, select is 44 px. Tests: board-link, link-params, link-ui (Vitest); board-link e2e; nav and sitemap tests updated. Write-up: docs/board-link-2026-10-04.md; design notes: docs/DESIGN.md section 19. Co-Authored-By: Claude Opus 5.5 <[email protected]>
Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
Every port the link derives was dumped for all 141 mapped boards and read
against its record.
- A bare TX/SDA on a pin that also carries a numbered spelling (TX beside
U0TXD) now counts as that controller; 16 boards no longer offer the same
pins twice in the bus select.
- Power-domain prefixes stay in the instance (MCU_I2C0, WKUP_I2C0), so
BeagleY-AI's two I2C controllers are no longer merged into one bus.
- Unnamed buses list no alternate pins: ODROID-M1's two "I2C SDA" pins are
on different buses and were offered as alternates of each other.
- A bare TX/RX inside a CAN token ("CAN TX / RX") is no longer read as UART.
- Blocker copy says "labels no ... pins" (Teensy LC names SDA0/SCL0 only in
notes, which the link does not read).
- Write-up: 141 mapped boards (not 142), the accuracy pass, verification,
and mobile-gate results.
- CLAUDE.md: a "Shipping a branch to main" workflow covering the audit,
PR and merge, Dependabot PRs, and merged-branch cleanup.
Six regression tests in test/board-link.test.ts fail without the fix.
Co-Authored-By: Claude Opus 5.5 <[email protected]>
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Summary
New
/linksection: pick two catalog boards and a bus (UART or I2C), and PinHub lists the wires that join them from each board's own pin map — TX/RX crossed, SDA/SCL joined, a shared ground, never power rails — with a logic-level verdict (direct, level shifter, or check) and the pin cautions each record states. SPI is intentionally left out. Entry points: "Link" in the section nav and "Wire these two boards" on the compare page. CLI bumped to 0.4.0.Pre-merge accuracy pass (2026-10-15)
Every derived port was dumped for all 141 mapped boards and read against its record:
MCU_I2C0andWKUP_I2C0were merged into one bus; power-domain prefixes now stay in the instance.Verification
npm run lint,npm run typecheck,npm test(571),npm run build,npm run test:e2e(85), and thecli/checks pass, re-run after mergingmain.Details:
docs/board-link-2026-10-04.md.🤖 Generated with Claude Code