Tell me how the baseclock_cpu750_ddr525.tar release works.gz set up the use of RX1 and RX2?
Is it possible?
My iio_info outputs four channels for transmitting voltage0 (output), voltage1 (output),voltage2 (output), voltage3 (output).
And there are only three channels for receiving voltage0 (input), voltage1 (input), voltage2 (input).
Why is voltage3 (input) missing?
Tell me how the baseclock_cpu750_ddr525.tar release works.gz set up the use of RX1 and RX2?
Is it possible?
My iio_info outputs four channels for transmitting voltage0 (output), voltage1 (output),voltage2 (output), voltage3 (output).
And there are only three channels for receiving voltage0 (input), voltage1 (input), voltage2 (input).
Why is voltage3 (input) missing?