CPU feature detection (SIMD width, cache hierarchy)

[codingwithmagga]

Description

Detect CPU capabilities at runtime — specifically SIMD width and cache topology — as the foundation for adaptive execution paths.

Acceptance Criteria

• SIMD support (AVX2, AVX-512) is reliably detected and exposed as flags
• L1/L2/L3 cache sizes are correctly queried (via cpuid or sysfs)
• Results are provided as a structured, queryable object
• Works correctly on at least Intel and AMD architectures (x86_64)

Notes

TDD — tests are written before implementation code.