From a80179b2686eed7e69cb7ed8b19dc0442eb38e1a Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 12:08:00 -0500 Subject: [PATCH 01/21] Prepare sm_86 Ampere encoder, cubin and discrete runtime port Signed-off-by: Drake Stapleton --- .github/workflows/ampere-x86.yml | 44 ++ .github/workflows/ci.yml | 2 +- .gitignore | 1 + Makefile | 16 +- README.md | 5 +- docs/ARCHITECTURE.md | 2 +- docs/PORT-AMPERE.md | 96 ++++ docs/runtime/API.md | 27 +- docs/runtime/PORTABILITY.md | 16 +- docs/runtime/omega_runtime_api.manifest | 10 +- docs/runtime/portability_table.tsv | 6 +- examples/hello_gpu/hello_gpu.c | 36 +- m16/m16_concurrent.c | 8 +- m16/m16_native.c | 8 + mk/ampere-cubin.mk | 35 ++ mk/ampere-encoder.mk | 38 ++ mk/ampere-plan.mk | 19 + mk/ampere-runtime.mk | 18 + mk/om-cubin.mk | 12 +- mk/om-encoder.mk | 16 +- mk/omega-gpu-engine.mk | 20 +- nvrm/nvrm.c | 203 +++++-- nvrm/nvrm.h | 13 +- om/cubin/cubin_elf.om | 63 ++- om/encoder/amp_runtime.om | 168 ++++++ om/encoder/ampere_enc_sm86.om | 609 +++++++++++++++++++++ om/encoder/bw_enc_sm121.om | 7 +- om/omega-bridge.lock | 5 +- om/units.sh | 74 ++- src/cudapp_native.h | 24 +- src/cudapp_om_amp_runtime.c | 222 ++++++++ src/cudapp_om_amp_runtime.ident | 1 + src/cudapp_om_ampere_enc_sm86.c | 693 ++++++++++++++++++++++++ src/cudapp_om_ampere_enc_sm86.ident | 1 + src/cudapp_om_bw_enc_sm121.c | 583 ++++++++++++++++++++ src/cudapp_om_bw_enc_sm121.ident | 1 + src/cudapp_om_cubin_elf.c | 681 +++++++++++++++++++++++ src/cudapp_om_cubin_elf.ident | 1 + src/cudapp_om_units.c | 162 ------ src/cudapp_om_units.ident | 6 +- src/omega_ampere_codegen.c | 48 ++ src/omega_ampere_codegen.h | 19 + src/omega_ampere_qmd.c | 19 + src/omega_ampere_qmd.h | 20 + src/omega_blackwell_codegen.c | 17 +- src/omega_blackwell_engine.c | 8 + src/omega_blackwell_submit.c | 16 + src/omega_cubin.c | 102 ++-- src/omega_cubin.h | 27 +- src/omega_gpu_elementwise_api.c | 8 + src/omega_gpu_platform_linux.c | 65 ++- src/omega_gpu_platform_linux.h | 3 + src/omega_gpu_session.c | 72 ++- src/omega_gpu_session.h | 2 + src/omega_numeric.c | 73 ++- src/omega_numeric.h | 18 +- src/omega_numeric_reduce.c | 26 +- src/omega_numeric_reduce.h | 5 +- src/omega_runtime_api.h | 2 +- tests/ampere/.crumb | 20 + tests/ampere/README.md | 161 ++++++ tests/ampere/doctor.py | 89 +++ tests/ampere/math_device.c | 160 ++++++ tests/ampere/memory_refusal.c | 58 ++ tests/ampere/run.py | 71 +++ tests/ampere/test_doctor.py | 49 ++ tests/ampere_cubin_test.c | 89 +++ tests/ampere_numeric_host_test.c | 44 ++ tests/fake_m16_native.c | 14 + tests/test_ampere_runtime.c | 193 +++++++ tests/test_ampere_session.c | 128 +++++ tests/test_omega_ampere_encoder.c | 108 ++++ tests/test_omega_gpu_platform_linux.c | 62 +++ tools/ampere_corpus.c | 58 ++ tools/ampere_families.c | 140 +++++ tools/ampere_nvdisasm.py | 137 +++++ tools/gpu_engine_backend_mutations.sh | 2 +- tools/runtime_portability_check.sh | 6 +- 78 files changed, 5691 insertions(+), 400 deletions(-) create mode 100644 .github/workflows/ampere-x86.yml create mode 100644 docs/PORT-AMPERE.md create mode 100644 mk/ampere-cubin.mk create mode 100644 mk/ampere-encoder.mk create mode 100644 mk/ampere-plan.mk create mode 100644 mk/ampere-runtime.mk create mode 100644 om/encoder/amp_runtime.om create mode 100644 om/encoder/ampere_enc_sm86.om create mode 100644 src/cudapp_om_amp_runtime.c create mode 100644 src/cudapp_om_amp_runtime.ident create mode 100644 src/cudapp_om_ampere_enc_sm86.c create mode 100644 src/cudapp_om_ampere_enc_sm86.ident create mode 100644 src/cudapp_om_bw_enc_sm121.c create mode 100644 src/cudapp_om_bw_enc_sm121.ident create mode 100644 src/cudapp_om_cubin_elf.c create mode 100644 src/cudapp_om_cubin_elf.ident delete mode 100644 src/cudapp_om_units.c create mode 100644 src/omega_ampere_codegen.c create mode 100644 src/omega_ampere_codegen.h create mode 100644 src/omega_ampere_qmd.c create mode 100644 src/omega_ampere_qmd.h create mode 100644 tests/ampere/.crumb create mode 100644 tests/ampere/README.md create mode 100755 tests/ampere/doctor.py create mode 100644 tests/ampere/math_device.c create mode 100644 tests/ampere/memory_refusal.c create mode 100755 tests/ampere/run.py create mode 100755 tests/ampere/test_doctor.py create mode 100644 tests/ampere_cubin_test.c create mode 100644 tests/ampere_numeric_host_test.c create mode 100644 tests/test_ampere_runtime.c create mode 100644 tests/test_ampere_session.c create mode 100644 tests/test_omega_ampere_encoder.c create mode 100644 tools/ampere_corpus.c create mode 100644 tools/ampere_families.c create mode 100755 tools/ampere_nvdisasm.py diff --git a/.github/workflows/ampere-x86.yml b/.github/workflows/ampere-x86.yml new file mode 100644 index 00000000..fc3c1858 --- /dev/null +++ b/.github/workflows/ampere-x86.yml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# Native x86 execution of the checked Omega-to-C units; no ARM emulation, +# CUDA runtime, driver submission or GPU qualification. +name: Ampere native x86 host +on: + pull_request: + push: + branches: [main] + workflow_dispatch: +permissions: + contents: read +jobs: + native-x86-host: + runs-on: ubuntu-24.04 + timeout-minutes: 40 + steps: + - uses: actions/checkout@11d5960a326750d5838078e36cf38b85af677262 # v4.4.0 + with: + persist-credentials: false + - name: Native scalar numeric portability (no bridge or GPU) + run: make test-ampere-numeric-host + - name: Pinned offline x86 instruction oracle + # Vendor manifest: https://developer.download.nvidia.com/compute/cuda/redist/redistrib_13.0.2.json + # cuda_nvdisasm.linux-x86_64, version 13.0.85. Verification only. + run: | + package=cuda_nvdisasm-linux-x86_64-13.0.85-archive + archive="$RUNNER_TEMP/$package.tar.xz" + curl --fail --location --silent --show-error --proto '=https' --tlsv1.2 \ + "https://developer.download.nvidia.com/compute/cuda/redist/cuda_nvdisasm/linux-x86_64/$package.tar.xz" \ + --output "$archive" + printf '%s %s\n' 0541e0230f724a43d67288ef882c63351d0c302bf567591b7620d40f93c2c93c "$archive" | sha256sum --check --strict + tar -xJf "$archive" -C "$RUNNER_TEMP" "$package/bin/nvdisasm" + sudo install -D -m755 "$RUNNER_TEMP/$package/bin/nvdisasm" /usr/local/cuda/bin/nvdisasm + /usr/local/cuda/bin/nvdisasm --version + printf '%s\n' /usr/local/cuda/bin >> "$GITHUB_PATH" + git clone -q https://github.com/aien-dev/omega-bridge "$RUNNER_TEMP/omega-bridge" + git -C "$RUNNER_TEMP/omega-bridge" checkout -q "$(grep -v '^#' om/omega-bridge.lock)" + - name: Native host build and tests (no GPU) + env: + OMEGA_BRIDGE: ${{ runner.temp }}/omega-bridge + run: | + make -j2 all + make test test-native-artifact zero-cuda-gate test-ampere-cubin-disasm + make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5cf0de66..5659f588 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -51,7 +51,7 @@ jobs: *) echo "make test exited 0 without the final CUDA++ HOST TESTS PASS line"; exit 1 ;; esac om-units: - # The committed Omega bindings (src/cudapp_om_units.c) regenerate byte for byte from the pinned omc and + # The committed portable Omega bindings (src/cudapp_om_*.c) regenerate byte for byte from the pinned omc and # omega-bridge, and every mutant .om unit goes red. omega-mv e5b32567 carries the pinned seed/out/omc. runs-on: ubuntu-24.04-arm timeout-minutes: 30 diff --git a/.gitignore b/.gitignore index 376a5985..611d145b 100644 --- a/.gitignore +++ b/.gitignore @@ -2,3 +2,4 @@ build/ build-enc-c/ build-enc-diff/ +build-ampere-oracle/ diff --git a/Makefile b/Makefile index bf527cd4..da373753 100644 --- a/Makefile +++ b/Makefile @@ -24,10 +24,13 @@ CFLAGS ?= -std=gnu11 -Wall -Wextra -Werror -MMD -MP -D_GNU_SOURCE -O2 -Isrc \ -I$(NVIDIA_OPEN)/kernel-open/common/inc \ -I$(NVIDIA_OPEN)/kernel-open/nvidia-uvm \ -I$(NVIDIA_OPEN)/src/nvidia/arch/nvalloc/unix/include +# Portable checked Omega-to-C output; each unit has a separate private runtime namespace. +CUDAPP_OM_UNIT_SRCS = src/cudapp_om_bw_enc_sm121.c src/cudapp_om_cubin_elf.c \ + src/cudapp_om_ampere_enc_sm86.c src/cudapp_om_amp_runtime.c -include mk/*.mk # sm_121 instruction encoder (CUDApp#79): om (default) = om/encoder/bw_enc_sm121.om through the generated binding -# src/cudapp_om_units.c; c = the migration-pending C encoder, the differential oracle; diff = both on every call, +# portable generated C units in CUDAPP_OM_UNIT_SRCS; c = the migration-pending C encoder, the differential oracle; diff = both on every call, # abort on any difference (mk/om-encoder.mk). Use a separate OUT_DIR per value. CUDAPP_ENCODER ?= om CUDAPP_ENCODER_DEFS_om := @@ -40,10 +43,10 @@ endif # Every C file of the GPU part, the shared base (tools/extract/shared.txt), the driver client and the generated # binding of the seeded Omega units (om/units.sh). -SRCS := $(sort $(wildcard src/omega_blackwell_*.c src/omega_gpu_*.c)) \ +SRCS := $(sort $(wildcard src/omega_blackwell_*.c src/omega_gpu_*.c src/omega_ampere_*.c)) \ src/omega_cubin.c src/omega_native_artifact.c src/omega_sm121_disasm.c \ - src/sha256.c src/omega_canonical.c src/omega_core.c src/omega_vector.c src/cudapp_om_units.c \ - $(PHYSICS_DIR)/m16/m16_native.c $(PHYSICS_DIR)/nvrm/nvrm.c + src/sha256.c src/omega_canonical.c src/omega_core.c src/omega_vector.c $(CUDAPP_OM_UNIT_SRCS) \ + $(PHYSICS_DIR)/m16/m16_native.c $(PHYSICS_DIR)/nvrm/nvrm.c $(AMPERE_CORPUS_SRCS) OBJS = $(patsubst %.c,$(OUT_DIR)/%.o,$(notdir $(SRCS))) DEPS = $(OBJS:.o=.d) -include $(DEPS) @@ -88,7 +91,7 @@ test-native-artifact: $(ARTIFACT_EXPORT) $(ARTIFACT_TEST) ./$(ARTIFACT_TEST) $(OUT_DIR)/artifact-test # Pure artifact-format boundary: portable host test, no driver or device objects. .PHONY: test-native-artifact-manifest -$(OUT_DIR)/native_artifact_manifest_test: tests/native_artifact_manifest_test.c src/omega_native_artifact.c src/omega_cubin.c src/omega_blackwell_realize.c src/sha256.c src/cudapp_om_units.c | $(OUT_DIR) +$(OUT_DIR)/native_artifact_manifest_test: tests/native_artifact_manifest_test.c src/omega_native_artifact.c src/omega_cubin.c src/omega_blackwell_realize.c src/sha256.c $(CUDAPP_OM_UNIT_SRCS) | $(OUT_DIR) $(CC) $(CFLAGS) -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@ $^ -lpthread test-native-artifact-manifest: $(OUT_DIR)/native_artifact_manifest_test ./$(OUT_DIR)/native_artifact_manifest_test @@ -333,7 +336,8 @@ HOST_TESTS = test-gpu-matmul-api test-gpu-elementwise test-gpu-reconv test-gpu-a test-gpu-engine-backend-mutants test-gpu-engine-gb10-compile test-gpu-serving-alloc test-gpu-engine-freestanding \ test-codegen-freestanding test-gpu-session-platform test-gpu-wait test-gpu-wait-mutants host-tests-m16 \ test-runtime-api test-runtime-portability test-doctor test-hello-sim test-native-artifact-manifest test-gemm-selectors \ - test-native-artifact zero-cuda-gate verify-vendored test-swap-cli test-om-encoder test-om-spec-encoder test-om-cubin $(CARRIED_HOST_TESTS) + test-native-artifact zero-cuda-gate verify-vendored test-swap-cli test-om-encoder test-om-spec-encoder test-om-cubin \ + test-ampere-encoder test-ampere-cubin test-ampere-numeric-host test-ampere-runtime test-ampere-plan $(CARRIED_HOST_TESTS) test: $(HOST_TESTS) @echo "CUDA++ HOST TESTS PASS ($(words $(HOST_TESTS)) targets)" diff --git a/README.md b/README.md index 92af280b..fb5e88ec 100644 --- a/README.md +++ b/README.md @@ -10,10 +10,11 @@ > > | | | > |---|---| -> | **Supported** | The NVIDIA DGX Spark. Its GB10 Grace Blackwell chip (GPU compute capability sm_121, PCI id `10de:2e12`) is the only GPU CUDA++ has machine code for. | +> | **Supported** | The NVIDIA DGX Spark. Its GB10 Grace Blackwell chip (GPU compute capability sm_121, PCI id `10de:2e12`) remains the only device with execution receipts. | > | **Other GB10 systems** | Not run. CUDA++ recognises the GPU by its PCI id, not by the system maker, so another GB10 system with the same kernel module is the same target to the code. Nobody has run CUDA++ on one. | +> | **Ampere preparation** | RTX 3090 (GA102) and RTX 3060 Ti (GA104), sm_86: target-specific encoder/cubin, discrete-memory and x86 host preparation are in this tree. Both devices are **NOT_RUN**, not supported/qualified hardware yet. See the [port audit](docs/PORT-AMPERE.md) and [device test plan](tests/ampere/README.md). | > | **You need** | Linux on the Spark's ARM CPU (aarch64). NVIDIA's open kernel module, version 580.173.02: `make doctor` and `make hello-gpu` refuse another version, and `/dev/nvidiactl`, `/dev/nvidia0` and `/dev/nvidia-uvm` must exist. NVIDIA's signed GSP firmware, which that module loads into the GPU. `git`, `make` and a C compiler. No CUDA toolkit. | -> | **Not supported** | Other NVIDIA GPUs: PLANNED, not supported. A target row for the RTX 5070 (sm_120) exists on Omega's branch `rig/gb20x` (aien-dev/omega-mv, `src/omega_bw_target.h`), built from public sources and never run on that chip ([portability](docs/runtime/PORTABILITY.md)). Every other GPU, NVIDIA or not (AMD, Intel, Apple, Qualcomm, Arm, Imagination and the rest): PLANNED targets, not supported. CUDA++ has machine code, a driver client and receipts for exactly one GPU today, the GB10; the multi-backend split is [docs/ARCHITECTURE.md](docs/ARCHITECTURE.md) (PROPOSED), and no capability claim about any other GPU is public until a kernel runs on it with a receipt. Unmodified CUDA applications: not supported; a CUDA++ program calls CUDA++'s C kernel builder, and CUDA++ does not compile CUDA C++ or PTX. | +> | **Not supported** | Other NVIDIA GPUs are not qualified. The prepared sm_86 path above has no device receipt. A target row for RTX 5070 (sm_120) exists on Omega's `rig/gb20x` branch and has not run on that chip ([portability](docs/runtime/PORTABILITY.md)). Other vendors remain PLANNED. The multi-backend split is [docs/ARCHITECTURE.md](docs/ARCHITECTURE.md). Unmodified CUDA applications are not supported: CUDA++ does not compile CUDA C++ or PTX. | > **Licensing status:** This revision uses Apache-2.0 WITH LLVM-exception for first-party material. For the historical MIT version, use [`232332422bfdc31c8918085b50f13c1e18ab702e`](https://github.com/aien-dev/CUDApp/tree/232332422bfdc31c8918085b50f13c1e18ab702e). The old MIT grant and third-party notices are preserved. See [the transition and provenance audit](docs/LICENSING_TRANSITION.md). diff --git a/docs/ARCHITECTURE.md b/docs/ARCHITECTURE.md index b3575901..00a77d15 100644 --- a/docs/ARCHITECTURE.md +++ b/docs/ARCHITECTURE.md @@ -56,7 +56,7 @@ generators; **DRV** driver client; **MIXED** has to be split logically. Line num | KER | `omega_blackwell_codegen_{attn,bf16,dec,gemm,moe,moe2,pattn,pf,pfhost,qg,qmma,router,tc,tc2,tern}`, the matmul generators inside `omega_blackwell_codegen.c`, `omega_gpu_fp8_pack.c`, `omega_gpu_pfgemm.c` | | DRV | `nvrm/` (`nvrm.c` 908 lines, RM client against the 580.173.02 headers), `m16/`, `omega_gpu_platform_linux.c`, `omega_blackwell_engine.c`, `omega_blackwell_submit.c` | | MIXED | `omega_gpu_session.c` (QMD and pushbuffer construction in `omega_gpu_session_launch` :445; includes qmd/submit :18-19), `omega_gpu_cmdlist.c` (`emit_tail` :199, `emit_stamp` :219, `emit_inline_qmd` :226, PCAS method words :308-309), `omega_native_artifact.c` (packaging is TOP, QMD template bytes are ENC), every `omega_gpu_*_api.c` (tensor lifetime is TOP; inline emitters in `attention_api.c` :69-143 and `elementwise_api.c` :61-145 are KER) | -| Already `.om` | `native/nvrm/context.om`, `native/blackwell/{trace-emit,trace,vector,launch}.om`; in the default hosted build: `om/encoder/bw_enc_sm121.om` (the instruction encoder and program NOP padding of `omega_blackwell_codegen.c`) and `om/cubin/cubin_elf.om` (the writer of `omega_cubin`), linked through the generated omega-bridge binding `src/cudapp_om_units.c`. Their C bodies build only for the freestanding target and the migration-pending oracle switches (`CUDAPP_ENCODER=c\|diff`, `CUDAPP_MIGRATION_PENDING_C_CUBIN`, `_CUBIN_DIFF`). | +| Already `.om` | `native/nvrm/context.om`, `native/blackwell/{trace-emit,trace,vector,launch}.om`; in the default hosted build: `om/encoder/bw_enc_sm121.om`, `om/cubin/cubin_elf.om`, `om/encoder/ampere_enc_sm86.om` and `om/encoder/amp_runtime.om`. `om/units.sh` emits four separate portable `src/cudapp_om_*.c` units through the pinned omega-bridge, with source-to-C provenance in `src/cudapp_om_units.ident`. No AArch64 executable-code trampoline is needed on x86. Historical C encoder/cubin bodies remain only for freestanding or differential-oracle switches. Ampere qualification is [NOT_RUN](PORT-AMPERE.md). | Three structural defects the split removes (in the `.om` stack; the C stack is frozen, not reworked): diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md new file mode 100644 index 00000000..c5580478 --- /dev/null +++ b/docs/PORT-AMPERE.md @@ -0,0 +1,96 @@ +# RTX 3090 / RTX 3060 Ti Ampere port + +**RTX 3090 (GA102): device NOT_RUN. RTX 3060 Ti (GA104): device NOT_RUN.** +This is host preparation, not a supported-hardware announcement. No RTX card is +attached to the development Spark, and this work must not submit to its GB10 or +interrupt its resident model. DONE below means the implementation or audit item +exists; exercised checks are recorded separately. A simulator, disassembler or +x86 emulator cannot qualify either GPU. + +## Authoritative target and driver references + +NVIDIA's [CUDA GPU table](https://developer.nvidia.com/cuda/gpus.md) places both +GeForce RTX 3090 and RTX 3060 Ti at compute capability **8.6 (sm_86)**. They are +not GB10/sm_121 and must not reuse its target tag. NVIDIA lists the +[3090](https://www.nvidia.com/en-us/geforce/graphics-cards/30-series/rtx-3090-3090ti/) +as Ampere with **24 GB GDDR6X**, and the +[3060 Ti](https://www.nvidia.com/en-us/geforce/graphics-cards/30-series/rtx-3060-3060ti/) +as Ampere with **8 GB GDDR6/GDDR6X**, depending on the model. Physical capacity +is not an allocation budget: use the selected device's measured free VRAM. + +NVIDIA's [580.173.02 open-module README](https://github.com/NVIDIA/open-gpu-kernel-modules/blob/580.173.02/README.md) +supports Linux x86_64/aarch64 and Turing-or-newer GPUs, and lists these RTX 30 +products. Thus “Ampere requires a closed kernel module” is false. That support +does **not** qualify CUDA++'s direct RM/UVM client. The client remains pinned to +vendored `third_party/nvidia-open-580.173.02`; another driver version is a +refusal, not an invitation to bypass the ABI check. + +The local NVIDIA open-gpu-doc reference is revision +`9fdf5c4062007929d9f4e6cbad9c9771fe61b880`. Its +[`clc6c0.h:24-32`](https://github.com/NVIDIA/open-gpu-doc/blob/9fdf5c4062007929d9f4e6cbad9c9771fe61b880/classes/compute/clc6c0.h#L24-L32) +defines **AMPERE_COMPUTE_A = 0xc6c0**, whereas +[`clc7c0.h:24-32`](https://github.com/NVIDIA/open-gpu-doc/blob/9fdf5c4062007929d9f4e6cbad9c9771fe61b880/classes/compute/clc7c0.h#L24-L32) +defines **AMPERE_COMPUTE_B = 0xc7c0**. GA10x/sm_86 needs the latter, not the +GA100 COMPUTE_A class. Names and QMD layouts must not be inferred from a nearby +Blackwell header. + +## Audit and implementation inventory + +| Item | State | Implementation / boundary and source references | +|---|---|---| +| Explicit target selection | DONE | `src/omega_ampere_codegen.c:7` accepts exactly sm_86 or sm_121. Existing `omega_bw_encode_program` remains the explicit Blackwell API. `examples/hello_gpu/hello_gpu.c` accepts `--target=sm_86`; the session compares `OmegaGpuLaunch.target_sm` against the selected GPU before submission (`src/omega_gpu_session.c:536`). Zero retains the historical sm_121 contract; it is not silent cross-target selection. | +| Ampere instruction encoding | DONE | First-party implementation is `om/encoder/ampere_enc_sm86.om`, not a hand-written C fallback. Ampere argument constants start at 0x160 instead of Blackwell's 0x380. Target-specific differences include uniform constant loads, global-memory descriptor/address fields and atomic encodings. The portable binding is `src/cudapp_om_ampere_enc_sm86.c`; host marshaling is `src/omega_ampere_codegen.c`. | +| Offline instruction oracle | DONE | `mk/ampere-encoder.mk` captures emitted host-suite kernels, disassembles their sm_86 bytes with pinned nvdisasm 13.0.85, and checks decoded instructions/operands. Its corrupted-encoding negative control must fail. The build-only math kernels participate via `tests/ampere/math_device.c --emit-only`. CI uses a separate corpus output directory so baseline and instrumented objects cannot be mixed. | +| Blackwell-only instruction semantics | BLOCKED | Blackwell FP8 conversion / QMMA forms have no same-semantics sm_86 encoding. The sm_86 encoder refuses them rather than inventing bytes or silently executing a different operation. Existing Blackwell-specialized model/tensor paths are not made Ampere-capable by changing an ELF flag. A real Ampere algorithm lowering is required before those paths are enabled. | +| Cubin/ELF target | DONE | `om/cubin/cubin_elf.om:26` selects the parameter base; `:269` selects CUDA ELF OSABI/ABI and e_version; `:286` sets the sm_86 flags. `omega_cubin_pack_target` is the target-explicit host boundary in `src/omega_cubin.c`. The old sm_121 entry remains explicit/default-compatible. `mk/ampere-cubin.mk` checks ELF fields and parameter metadata, differential behavior, and offline nvdisasm loading. | +| Capability-mercury sections | DONE | The sm_86 writer emits no `.nv.capmerc.*` / `.nv.merc.*` sections. The Blackwell driver-loader requirement observed for sm_121 must not be generalized to Ampere. Successful offline ELF decoding is not evidence of successful `cuModuleLoadData` or direct RM launch; both RTX loader/device paths remain NOT_RUN. | +| Compute/FIFO classes and QMD | DONE | `src/omega_ampere_qmd.h:5` records C6C0 versus C7C0 and Ampere FIFO constants. `om/encoder/amp_runtime.om` implements target admission, QMD3.0 layout and bounded command admission. `src/omega_gpu_session.c:562` emits the Ampere QMD and `:599` its PCAS launch instead of Blackwell QMD5/inline packets. `nvrm/nvrm.c:69` requires the queried class list to contain the selected target's classes. Raw Blackwell packets on an Ampere device are refused before ring submission (`nvrm/nvrm.c:1055`). | +| Discrete allocation and copies | DONE | `nvrm/nvrm.c:631` selects local framebuffer memory on sm_86, RM maps it into GPU VA and maps its CPU BAR alias through real RM_MAP_MEMORY/mmap. Queue and host-polled completion storage remain system memory. `nvrm/nvrm.c:746` / `:755` provide live-identity/bounds-checked CPU→BAR and BAR→CPU transfers with ordering fences. The session may write/read that uncached BAR view directly; platform sync (`src/omega_gpu_platform_linux.c:358`) orders visibility rather than pretending to copy coherent host RAM. No copy engine is claimed. | +| Cached local mappings / large BAR availability | BLOCKED | Cached Ampere mappings are explicitly refused until their cache-maintenance contract is implemented. CPU BAR mapping availability and large-allocation behavior need the real driver/card configuration; failure is surfaced, not replaced by a fake host allocation. First-run tests use bounded allocations. | +| VRAM-aware D1 reserve | DONE | `nvrm/nvrm.c:637` queries the selected framebuffer heap. `src/omega_gpu_platform_linux.c:233` reads reserve policy and `:248` uses free VRAM, never host MemAvailable, for local allocations. `CUDAPP_GPU_MIN_FREE_BYTES` supports a precise safe refusal; the default MiB reserve remains documented by the runtime. The refusal precedes the driver allocation call. | +| Safe reserve refusal proof | DONE | `tests/ampere/memory_refusal.c:39` sets reserve above total VRAM (therefore above free VRAM even if other processes release memory), then requests only a small allocation. It requires refusal, zero intervening RM allocation ioctls and unchanged free VRAM. Simulated-driver coverage is separate from this real-device test. It never pressure-allocates VRAM. | +| Open-module and device selection doctor | DONE | `tests/ampere/doctor.py:79` verifies Linux x86_64, the exact pinned open module, requested PCI IDs, device nodes and an unambiguous BDF. `CUDAPP_GPU_BDF` selects that exact GPU in the driver client. `test_doctor.py` uses a fake filesystem and is always SIMULATED. No driver is opened by the doctor. | +| Portable Omega build provenance | DONE | `om/units.sh:14` regenerates all four checked units through the pinned bounded Omega-to-C converter; separate generated translation units replace the AArch64 executable-code trampoline. `om/omega-bridge.lock`, `src/cudapp_om_units.ident` and the generated declarations retain unit SHA → C SHA provenance. Missing/mismatched converter or seed is a refusal, not a C fallback. | +| Native x86_64 host build | DONE | `.github/workflows/ampere-x86.yml:13` uses a native Ubuntu x86 runner for the full host build/tests and offline oracle. `src/omega_numeric.c:31` adds the x86 host-reference tier using scalar SSE/fused libm where appropriate; integer-defined conversions are not mislabeled as an independent conversion oracle. Local x86 emulation, if run, is labeled HOST_EMULATED separately. | +| Device test plan / runner | DONE | `tests/ampere/README.md`, `doctor.py`, `run.py`, `math_device.c`, and `memory_refusal.c` cover doctor, complete vector-add output, intentionally failing vector-add, exhaustive unary math, a numerical negative control and safe memory refusal. The runner starts each result at NOT_RUN, records real outputs and stops on failure. | +| GA102 / GA104 execution and qualification | BLOCKED | No RTX device is attached or authorized here. Both device states remain NOT_RUN. Need the actual host, OS, driver version, SSH access and a GPU window before any real execution. | + +## Evidence and limits + +The acceptance commands and status belong with the draft PR and its observed +logs. Merely adding a CI job does not mean it passed. `make test-ampere-plan` +contains only host/simulated checks; `make ampere-device-build` builds device +programs without executing them. The instruction oracle command is: + +```sh +make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle +``` + +The [device plan](../tests/ampere/README.md) keeps separate NOT_RUN entries for +every check on each card. Exhaustive math uses the intended NVIDIA PTX bounds, +not an invented tolerance or a claim that raw MUFU matches PTX normalization. +A failing subnormal case needs a real fix, not a weakened gate. + +The runtime API minor version changes to 0.7 because appending the explicit +launch target grows `OmegaGpuLaunch`; rebuild callers against the new headers. +The ABI manifest and semver gate must agree. The existing sm_121 default, driver +pin and negative controls are not weakened for the port. + +The portable converter is pinned to omega-bridge +`dfd8393aa3d4a67280349921c479b8dd52f88e58` +([draft PR #36](https://github.com/aien-dev/omega-bridge/pull/36)). +Its explicitly selected seeded frontend uses omega e5b32567 compiler SHA-256 +`2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f`. +Main, acting for Drake, authorized this separately pinned mode; the original +191b776 frontend gate remains unchanged and required. The new mode must refuse +a wrong-seed mutant. The generated identities pin both frontend and converter +bytes, not merely a moving branch name. + +## First real run: operator-provided access + +Provide, for **each card**: which machine holds it, the machine's OS/distribution +and architecture, its exact NVIDIA driver version and open-module status, and +SSH host/account/access. Then select the actual PCI BDF and authorize the GPU +window on that machine. If a different driver is installed, stop at the doctor +and update/review the ABI pin; do not install or replace a driver implicitly. +Nothing in this preparation authorizes touching the Spark's live model. diff --git a/docs/runtime/API.md b/docs/runtime/API.md index 5889e294..e9313dd0 100644 --- a/docs/runtime/API.md +++ b/docs/runtime/API.md @@ -1,6 +1,6 @@ # Omega Runtime API v0 -Omega Runtime API version: 0.6.0 +Omega Runtime API version: 0.7.0 Status: first written version, 2026-10-19 (slice R1, omega-mv#594, tracking #593). Source of truth is the C headers in `src/`. This file describes them; `docs/runtime/omega_runtime_api.manifest` lists them; `make test-runtime-api` checks the @@ -13,8 +13,8 @@ The version number lives in one header, `src/omega_runtime_api.h` (`OMEGA_RUNTIM Omega is a GPU compute runtime that does not use CUDA. This file is the written contract for the part a program calls directly: find and open the GPU, get memory, copy data in and out, run a kernel, run many kernels in one submission, run a -packaged job, and read errors. It covers what exists on the main branch today, on one machine type (GB10, the DGX Spark), -through the Linux open-driver backend. Nothing here claims more than that. +packaged job, and read errors. GB10 is the historical device target. The Linux reference now also has +an experimental sm_86 direct-driver path for GA102/GA104; both Ampere devices remain NOT_RUN. Compatibility preflight is **wrapper-only**: `make doctor` checks the kernel-module version and PCI target, and `make hello-gpu` runs it first. Direct binaries and @@ -36,8 +36,14 @@ signature against the headers on every run. ## 2. Version and compatibility rule -The version is MAJOR.MINOR.PATCH (semantic versioning), currently **0.6.0**. It is a property of the list of entries and +The version is MAJOR.MINOR.PATCH (semantic versioning), currently **0.7.0**. It is a property of the list of entries and their behaviour, not of the library build. Changes so far: +- 0.7.0 (AmperePort): grows STABLE `OmegaGpuLaunch` with `target_sm` (a MAJOR-class change + taken as MINOR under the major-version-zero rule); adds EXPERIMENTAL + `omega_gpu_session_target_sm`. Zero-initialized legacy launches still mean sm_121, not auto-detect. + An explicit sm_86 launch must match the opened device and use sm_86 code and argument layout. + Adds discrete VRAM allocation/BAR-mapped visibility and a VRAM-based D1 reserve; + no Ampere hardware qualification is claimed. See `docs/PORT-AMPERE.md`. - 0.6.0 (AttnGeneral): adds EXPERIMENTAL `omega_gpu_attention_general`, `OmegaGpuAttnGeneralDesc`, `OMEGA_GPU_ATTN_GENERAL_MAX_HEAD_DIM` (256), `OMEGA_GPU_ATTN_GENERAL_MAX_Q_HEADS` (1024) and `OMEGA_GPU_ATTN_WINDOW_NONE`: one attention kernel for every head_dim 1..256, any query-head count with any kv-head count dividing it (MHA, GQA, @@ -120,6 +126,11 @@ grow, such as staging space, can be an `OmegaGpuScratch`. For read-only weights **Launch.** One kernel launch is an `OmegaGpuLaunch`: where the code is, how many registers, the block and grid size, the argument words, shared memory, and a timeout. `omega_gpu_session_launch` submits it and waits for the chip to finish (it is synchronous). The wait is by polling a completion word, never by an interrupt. +For sm_86, set `OmegaGpuLaunch.target_sm = 86` and use the target-aware encoder in +`omega_ampere_codegen.h`. `target_sm = 0` preserves legacy sm_121 behavior; it is +not permission to run Blackwell code on Ampere. A target mismatch refuses before +submission. Existing Blackwell library kernels and command-list packets are not +silently retargeted; unsupported Ampere packets are refused. **Command lists.** `omega_gpu_cmdlist_*` records many launches and submits them as one unit with one completion wait. By default each launch is preceded by a barrier so dependent launches cannot overlap; a launch can be marked independent. @@ -205,6 +216,14 @@ OmegaGpuSession *omega_gpu_session_open(void); Caller holds the lock. Opens the device on first use. Returns NULL when the process is latched, no platform is installed or the open failed; the stage is in `omega_gpu_session_last_error()`. +#### `omega_gpu_session_target_sm` +EXPERIMENTAL: physical target selection for the prepared Ampere path; device qualification is NOT_RUN. +```c +uint32_t omega_gpu_session_target_sm(void); +``` +Caller holds the lock. Returns the opened device's exact target (`86` or `121`), +or zero with no open device. It does not open a device. + #### `omega_gpu_session_is_open` STABLE: simple state query. ```c diff --git a/docs/runtime/PORTABILITY.md b/docs/runtime/PORTABILITY.md index d9ebcb29..f34405ca 100644 --- a/docs/runtime/PORTABILITY.md +++ b/docs/runtime/PORTABILITY.md @@ -8,20 +8,26 @@ UNVERIFIED. Nothing here was run on a GPU; this slice is read-only analysis plus Companion documents, not repeated here: `docs/numeric/OMEGA_GPU_NATIVE_BOUNDARY.md` (which driver call each part makes today and which cut removes it) and `docs/numeric/OMEGA_GPU_ENGINE.md` (the engine contract). +Current Ampere work is audited in [`../PORT-AMPERE.md`](../PORT-AMPERE.md). +Its sm_86 encoder, QMD3 and discrete-memory path do not make GA102/GA104 +qualified: both remain device NOT_RUN. The Blackwell inventory below explains +the original R3 boundary; target-specific Ampere files now participate in the +same table gate. + ## 1. Two separate questions Porting Omega means answering two questions that are easy to mix up: -1. **Chip.** Does this file know something about the GB10 (Grace Blackwell, compute capability sm_121)? Machine-code +1. **Chip.** Does this file know something about GB10 (Grace Blackwell, sm_121) or Ampere (sm_86)? Machine-code words, launch-descriptor fields, class numbers, cache behaviour. 2. **Operating system and driver.** Does this file need Linux, the NVIDIA open driver, or a C library? -The table `docs/runtime/portability_table.tsv` answers both, one row per `src/omega_gpu_*`, `src/omega_blackwell_*` and -`src/omega_bw_*` file (123 rows; the M17/M18 gate suite `omega_blackwell_gates.{c,h}` stays in Omega, which runs it against this library): +The table `docs/runtime/portability_table.tsv` answers both, one row per `src/omega_gpu_*`, `src/omega_blackwell_*`, +`src/omega_bw_*` and `src/omega_ampere_*` file. The M17/M18 gate suite `omega_blackwell_gates.{c,h}` stays in Omega: | Column | Values | Meaning | |---|---|---| -| `class` | `CHIP_SPECIFIC`, `PORTABLE` | `CHIP_SPECIFIC`: the file carries knowledge of the GB10 or of the driver interface that exposes it, so a different GPU or driver means reviewing or replacing it. `PORTABLE`: it carries neither. | +| `class` | `CHIP_SPECIFIC`, `PORTABLE` | `CHIP_SPECIFIC`: the file carries knowledge of a target GPU or its driver interface, so a different GPU or driver means reviewing or replacing it. `PORTABLE`: it carries neither. | | `reason` | text | Why, with the evidence (an include list, a constant, a make target). | | `os_binding` | `FREESTANDING_PROVEN`, `NO_HOSTED_INCLUDE`, `HOSTED_LIBC`, `LINUX_DRIVER` | `FREESTANDING_PROVEN`: a `.c` file in `GPU_FS_SRCS` (`mk/omega-gpu-engine.mk`), built by `make gpu-engine-freestanding` with no hosted headers. `NO_HOSTED_INCLUDE`: no hosted header by include scan only (a header, or a `.c` outside that build). `HOSTED_LIBC`: includes stdio, stdlib, time, errno, math or pthread. `LINUX_DRIVER`: includes `nvrm.h`, `m16_native.h` or `omega_gpu_platform_linux.h`. | @@ -119,7 +125,7 @@ different family it is *rewriting*. In order: 8. **A backend.** Either the vector backend (`OmegaGpuBackend`, example `src/omega_blackwell_engine.c`) or the session path. 9. **Qualification on the chip.** The M17 and M18 gates (Omega `src/omega_blackwell_gates.c`) and the poison-word vector add are the first correctness check; nothing is claimed for a chip until they pass there. -10. **Update the table.** `make test-runtime-portability` refuses a new `omega_gpu_*`, `omega_blackwell_*` or `omega_bw_*` +10. **Update the table.** `make test-runtime-portability` refuses a new `omega_gpu_*`, `omega_blackwell_*`, `omega_bw_*` or `omega_ampere_*` file that has no row. ## 6. Limits of this note diff --git a/docs/runtime/omega_runtime_api.manifest b/docs/runtime/omega_runtime_api.manifest index ee857627..b9f95501 100644 --- a/docs/runtime/omega_runtime_api.manifest +++ b/docs/runtime/omega_runtime_api.manifest @@ -12,7 +12,7 @@ # After a deliberate header change: edit the line here, run `tools/runtime_api_check.sh --bless` to refresh numbers, review the diff, # and bump the version (MAJOR/MINOR/PATCH, rule in API.md section 2; tools/runtime_api_semver.sh checks the bump against the base). # Names a manifest header declares that are NOT API go in omega_runtime_api.internal, each with a reason (the check fails otherwise). -abi omega_runtime 0.6.0 +abi omega_runtime 0.7.0 header src/omega_runtime_api.h header src/omega_gpu_platform.h header src/omega_gpu_session.h @@ -37,9 +37,9 @@ header src/omega_gpu_prefill.h header src/omega_gpu_pfhost.h # ---- version ---- const OMEGA_RUNTIME_API_VERSION_MAJOR 0 -const OMEGA_RUNTIME_API_VERSION_MINOR 6 +const OMEGA_RUNTIME_API_VERSION_MINOR 7 const OMEGA_RUNTIME_API_VERSION_PATCH 0 -const OMEGA_RUNTIME_API_VERSION 6 +const OMEGA_RUNTIME_API_VERSION 7 # ---- platform contract (src/omega_gpu_platform.h, ABI 1.2) ---- struct OmegaGpuDeviceHandle 8 4 # STABLE field OmegaGpuDeviceHandle index 0 4 u32 1 @@ -135,7 +135,7 @@ field OmegaGpuScratch mem 0 40 struct:OmegaGpuMem 1 field OmegaGpuScratch cap 40 8 u64 1 field OmegaGpuScratch high_water 48 8 u64 1 field OmegaGpuScratch reserved 56 1 bool 1 -struct OmegaGpuLaunch 72 8 # STABLE +struct OmegaGpuLaunch 80 8 # STABLE field OmegaGpuLaunch code_va 0 8 u64 1 field OmegaGpuLaunch gpr_count 8 4 u32 1 field OmegaGpuLaunch threads_x 12 4 u32 1 @@ -148,6 +148,7 @@ field OmegaGpuLaunch n_args 48 4 u32 1 field OmegaGpuLaunch timeout_ms 56 8 u64 1 field OmegaGpuLaunch shared_bytes 64 4 u32 1 field OmegaGpuLaunch spin_us 68 4 u32 1 +field OmegaGpuLaunch target_sm 72 4 u32 1 struct OmegaGpuParkStats 16 8 # STABLE field OmegaGpuParkStats buffers 0 4 u32 1 field OmegaGpuParkStats untracked 4 4 u32 1 @@ -155,6 +156,7 @@ field OmegaGpuParkStats bytes 8 8 u64 1 fn omega_gpu_session_lock fn() -> () # STABLE fn omega_gpu_session_unlock fn() -> () # STABLE fn omega_gpu_session_open fn() -> *mut OmegaGpuSession # STABLE +fn omega_gpu_session_target_sm fn() -> u32 # EXPERIMENTAL fn omega_gpu_session_is_open fn() -> bool # STABLE fn omega_gpu_session_is_blocked fn() -> i32 # STABLE fn omega_gpu_session_close fn() -> () # STABLE diff --git a/docs/runtime/portability_table.tsv b/docs/runtime/portability_table.tsv index c8f20e85..ffcaad40 100644 --- a/docs/runtime/portability_table.tsv +++ b/docs/runtime/portability_table.tsv @@ -1,8 +1,12 @@ # Omega portability table (omega-mv#596, slice R3). Checked by: make test-runtime-portability (tools/runtime_portability_check.sh). # Columns, tab separated: file, class, reason, os_binding. Explained in docs/runtime/PORTABILITY.md. -# class: CHIP_SPECIFIC carries knowledge of the GB10 / Blackwell chip or of the driver interface that exposes it; PORTABLE carries neither. +# class: CHIP_SPECIFIC carries knowledge of the GB10 / Blackwell or sm_86 / Ampere chip, or of its driver interface; PORTABLE carries neither. # os_binding: FREESTANDING_PROVEN (a .c file in GPU_FS_SRCS, mk/omega-gpu-engine.mk, built by make gpu-engine-freestanding), NO_HOSTED_INCLUDE (no hosted header by include scan only; not linked freestanding), HOSTED_LIBC (includes stdio, stdlib, time, errno, math or pthread), LINUX_DRIVER (includes nvrm.h, m16_native.h or omega_gpu_platform_linux.h). file class reason os_binding +src/omega_ampere_codegen.c CHIP_SPECIFIC Target-explicit sm_86/sm_121 host ABI marshaling; encoding is generated from om/encoder/ampere_enc_sm86.om. NO_HOSTED_INCLUDE +src/omega_ampere_codegen.h CHIP_SPECIFIC Target selector uses the existing chip-specific Blackwell IR as its input representation. NO_HOSTED_INCLUDE +src/omega_ampere_qmd.c CHIP_SPECIFIC Host ABI marshaling for checked Ampere QMD, class admission, reserve and packet policy implemented in Omega. NO_HOSTED_INCLUDE +src/omega_ampere_qmd.h CHIP_SPECIFIC Ampere COMPUTE_A/B and FIFO constants and QMD policy interface; device NOT_RUN. NO_HOSTED_INCLUDE src/omega_blackwell_codegen.c CHIP_SPECIFIC Instruction generators for the sm_121 kernels (vector add, matmul, the Qwen decode set); emits Blackwell machine code through the encoder. In the freestanding closure; the allocating generators and the printing self-test are hosted-only (docs/numeric/OMEGA_GPU_NATIVE_BOUNDARY.md section 3). FREESTANDING_PROVEN src/omega_blackwell_codegen.h CHIP_SPECIFIC Blackwell IR opcodes and kernel-generator API; includes omega_blackwell_matmul.h. NO_HOSTED_INCLUDE src/omega_blackwell_codegen_attn.c CHIP_SPECIFIC Generates the single-launch decode attention kernel (sm_121 machine code, 8 query heads per KV head, head_dim 128). NO_HOSTED_INCLUDE diff --git a/examples/hello_gpu/hello_gpu.c b/examples/hello_gpu/hello_gpu.c index ef952529..982260c5 100644 --- a/examples/hello_gpu/hello_gpu.c +++ b/examples/hello_gpu/hello_gpu.c @@ -41,6 +41,7 @@ #define CUDAPP_MIGRATION_PENDING_HELLO_CONTROL 0 /* migration-pending switch, OFF by default (see above) */ #endif #include "omega_blackwell_codegen.h" +#include "omega_ampere_codegen.h" #include "omega_blackwell_qmd.h" #include "omega_gpu_session.h" #include "sha256.h" @@ -56,6 +57,7 @@ #define CHUNK (THREADS * MAX_CTAS) /* elements per launch: 131072, so N_TOTAL is 8 launches */ #define POISON 0xFFC0FFEEu /* a NaN pattern c starts out as: an element the GPU never wrote stays this */ #define READ_CEILING_GBPS 195.1 /* GB10 global reads, measured: evidence/OWN30B-T3-TC-PEAK-BW-5faa0f70-20261013T2236Z/ */ +static uint32_t target_sm = 121; /* explicit --target=sm_86; never infer from the build host */ /* ---- Step 1: the kernel, as IR instructions ------------------------------------------------------------- * Each instruction carries a "control word" that tells the chip how long to wait before the next one. @@ -142,12 +144,14 @@ static void print_sha(const char *what, const void *data, size_t len) { printf("\n"); } static void print_work(uint64_t read, uint64_t written, uint64_t fp_ops, double measured_us) { - double floor_us = (double)(read + written) / (READ_CEILING_GBPS * 1e3); + double floor_us = target_sm == 121 ? (double)(read + written) / (READ_CEILING_GBPS * 1e3) : 0; printf("work: %llu bytes moved (%llu read, %llu written), %llu floating-point operations\n", (unsigned long long)(read + written), (unsigned long long)read, (unsigned long long)written, (unsigned long long)fp_ops); - printf(" at the GB10's measured %.1f GB/s read ceiling this needs at least %.1f us", READ_CEILING_GBPS, floor_us); - if (measured_us > 0) printf("; the GPU took %.1f us (%.0f%% of the ceiling)", measured_us, 100.0 * floor_us / measured_us); - printf("\n"); + if (target_sm == 121) { + printf(" at the GB10's measured %.1f GB/s read ceiling this needs at least %.1f us", READ_CEILING_GBPS, floor_us); + if (measured_us > 0) printf("; the GPU took %.1f us (%.0f%% of the ceiling)", measured_us, 100.0 * floor_us / measured_us); + printf("\n"); + } else if (measured_us > 0) printf(" sm_86 device time %.1f us (no GB10 bandwidth claim)\n", measured_us); } static void inputs(float *fa, float *fb, uint32_t *wc) { for (uint32_t i = 0; i < N_TOTAL; i++) { fa[i] = (float)i * 0.25f; fb[i] = 1.0f / (float)(1 + i % 7); wc[i] = POISON; } @@ -257,12 +261,14 @@ int main(int argc, char **argv) { int sim = 0, bug = 0; for (int i = 1; i < argc; i++) { if (!strcmp(argv[i], "--sim")) sim = 1; + else if (!strcmp(argv[i], "--target=sm_86")) target_sm = 86; + else if (!strcmp(argv[i], "--target=sm_121")) target_sm = 121; else if (!strcmp(argv[i], "--bug=past-end")) bug = 1; #if CUDAPP_MIGRATION_PENDING_HELLO_CONTROL else if (!strcmp(argv[i], "--bug=short")) bug = 2; else { printf("usage: hello_gpu [--sim] [--bug=short] | hello_gpu --sim --bug=past-end\n"); return 2; } #else - else { printf("usage: hello_gpu [--sim [--bug=past-end]]\n"); return 2; } + else { printf("usage: hello_gpu [--target=sm_86|--target=sm_121] [--sim [--bug=past-end]]\n"); return 2; } #endif } if (bug == 1 && !sim) { printf("--bug=past-end is only for --sim: on the GPU it would write past a buffer\n"); return 2; } @@ -277,11 +283,11 @@ int main(int argc, char **argv) { { /* the machine code, encoded once here so its hash and build time can be printed (D10) */ size_t need = omega_bw_program_code_bytes(&prog); void *words = calloc(1, need); - OmegaBlackwellKernel k; - if (!words || omega_blackwell_kernel_encode_into(&prog, words, need, &k) != 0) { printf("FAIL: the kernel did not encode\n"); free(words); return 1; } + size_t written = 0; + if (!words || omega_gpu_encode_program_target(&prog, target_sm, words, need, &written) != 0) { printf("FAIL: the kernel did not encode\n"); free(words); return 1; } double t1 = now_us(); - printf("kernel built in %.0f us: %zu instructions, %u registers, no compiler run, no cache\n", t1 - t0, k.insn_count, prog.regalloc.peak_gpr_usage); - print_sha("machine code", words, k.insn_count * 16u); + printf("kernel built in %.0f us: %zu instructions, %u registers, sm_%u, no compiler run, no cache\n", t1 - t0, written / 16u, prog.regalloc.peak_gpr_usage, target_sm); + print_sha("machine code", words, written); free(words); } if (sim) return run_sim(&prog, bug); @@ -293,16 +299,20 @@ int main(int argc, char **argv) { omega_gpu_session_unlock(); return 2; } + if (omega_gpu_session_target_sm() != target_sm) { + printf("NOT_RUN: requested sm_%u does not match opened device sm_%u\n", target_sm, omega_gpu_session_target_sm()); + rc = 2; goto done; + } /* ---- Step 3: upload. The code buffer is written by the CPU and executed by the GPU. */ size_t bytes = (size_t)N_TOTAL * sizeof(float), need = omega_bw_program_code_bytes(&prog); - OmegaBlackwellKernel kernel; - if (omega_gpu_session_alloc_code(need, &code) != 0 || omega_blackwell_kernel_encode_into(&prog, code.cpu, need, &kernel) != 0 || + size_t written = 0; + if (omega_gpu_session_alloc_code(need, &code) != 0 || omega_gpu_encode_program_target(&prog, target_sm, code.cpu, need, &written) != 0 || omega_gpu_session_alloc(bytes, &a) != 0 || omega_gpu_session_alloc(bytes, &b) != 0 || omega_gpu_session_alloc(bytes, &c) != 0) { printf("FAIL: could not set up buffers (stage: %s)\n", omega_gpu_session_last_error()); goto done; } - printf("kernel: %zu instructions, %u registers\n", kernel.insn_count, prog.regalloc.peak_gpr_usage); + printf("kernel: %zu instructions, %u registers\n", written / 16u, prog.regalloc.peak_gpr_usage); float *fa = a.cpu, *fb = b.cpu; uint32_t *wc = c.cpu; inputs(fa, fb, wc); @@ -323,7 +333,7 @@ int main(int argc, char **argv) { (uint32_t)(b.va + off), (uint32_t)((b.va + off) >> 32), (uint32_t)(c.va + off), (uint32_t)((c.va + off) >> 32), n }; OmegaGpuLaunch L = { .code_va = code.va, .gpr_count = declared < 64 ? 64 : declared, .threads_x = THREADS, .threads_y = 1, .grid_x = (n + THREADS - 1) / THREADS, .grid_y = 1, .num_elements = n, - .args = args, .n_args = OMEGA_BW_CBANK_MATMUL_ARGS_WORDS, .timeout_ms = 10000 }; + .args = args, .n_args = OMEGA_BW_CBANK_MATMUL_ARGS_WORDS, .timeout_ms = 10000, .target_sm = target_sm }; uint64_t el = 0; if (omega_gpu_session_launch(&L, &el, NULL) != 0) { printf("FAIL: launch at element %u (stage: %s)\n", base, omega_gpu_session_last_error()); goto done; } gpu_ns += el; diff --git a/m16/m16_concurrent.c b/m16/m16_concurrent.c index a85b82dd..fb82a8c9 100644 --- a/m16/m16_concurrent.c +++ b/m16/m16_concurrent.c @@ -54,7 +54,13 @@ #define WAIT_TOTAL_MS 2000u /* hard deadline: same 2 s window as the old wait */ #define WAIT_STALL_MS 2000u /* >= hard bound so the pass window is not narrower than the old wait */ -static void fence(void) { __asm__ volatile("dsb sy" ::: "memory"); } +static void fence(void) { +#if defined(__aarch64__) + __asm__ volatile("dsb sy" ::: "memory"); +#else + __sync_synchronize(); +#endif +} /* Marker stream: bind class, WFI release of payload at marker_va, L2_FLUSH_DIRTY * mem-op (NVC96F_MEM_OP_A..D = 0x28..0x34, D bits 31:27 = 0x10), then a second WFI diff --git a/m16/m16_native.c b/m16/m16_native.c index eb3ee96a..0216fc74 100644 --- a/m16/m16_native.c +++ b/m16/m16_native.c @@ -72,7 +72,11 @@ int m16_native_enqueue_methods(M16NativeContext *ctx, const uint32_t *methods, s if (!ctx || !methods || count == 0) return -1; if (count > UINT32_MAX || count > ctx->pb_mem.size / sizeof(uint32_t)) return -1; memcpy(ctx->pb_mem.cpu, methods, count * sizeof(uint32_t)); +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __sync_synchronize(); +#endif return nvrm_enqueue(&ctx->rm, &ctx->pb_mem, 0, (uint32_t)count); } @@ -104,7 +108,11 @@ int m16_native_wait_marker_ge(volatile uint32_t *marker, uint32_t target, uint64 while (now_ns() < end) { if ((int32_t)(*marker - target) >= 0) return 0; usleep(50); +#if defined(__aarch64__) __asm__ volatile("yield"); +#elif defined(__x86_64__) + __asm__ volatile("pause"); +#endif } return ((int32_t)(*marker - target) >= 0) ? 0 : -1; } diff --git a/mk/ampere-cubin.mk b/mk/ampere-cubin.mk new file mode 100644 index 00000000..ce9acdb2 --- /dev/null +++ b/mk/ampere-cubin.mk @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# Include from Makefile. Hosted .om packer, no GPU; regenerate the checked +# portable TUs with om/units.sh after changing om/cubin/cubin_elf.om. +AMPERE_CUBIN_DIR = $(OUT_DIR)/ampere-cubin +AMPERE_NVDISASM ?= /usr/local/cuda/bin/nvdisasm +AMPERE_CUBIN_SOURCES = tests/ampere_cubin_test.c src/omega_cubin.c $(CUDAPP_OM_UNIT_SRCS) +AMPERE_CUBIN_DEPS = $(AMPERE_CUBIN_SOURCES) src/omega_cubin.h src/cudapp_native.h + +.PHONY: test-ampere-cubin test-ampere-cubin-disasm +$(AMPERE_CUBIN_DIR)/host: $(AMPERE_CUBIN_DEPS) + @mkdir -p $(AMPERE_CUBIN_DIR) + $(CC) $(CFLAGS) -Isrc -pthread -o $@ $(AMPERE_CUBIN_SOURCES) + +$(AMPERE_CUBIN_DIR)/diff: $(AMPERE_CUBIN_DEPS) + @mkdir -p $(AMPERE_CUBIN_DIR) + $(CC) $(CFLAGS) -Isrc -pthread -DCUDAPP_MIGRATION_PENDING_CUBIN_DIFF -o $@ $(AMPERE_CUBIN_SOURCES) + +test-ampere-cubin: $(AMPERE_CUBIN_DIR)/host $(AMPERE_CUBIN_DIR)/diff + $(AMPERE_CUBIN_DIR)/host $(AMPERE_CUBIN_DIR)/sm86.cubin + $(AMPERE_CUBIN_DIR)/diff + +test-ampere-cubin-disasm: test-ampere-cubin + @test -x "$(AMPERE_NVDISASM)" || { echo 'NOT_RUN: missing offline nvdisasm'; exit 3; } + "$(AMPERE_NVDISASM)" -c $(AMPERE_CUBIN_DIR)/sm86.cubin > $(AMPERE_CUBIN_DIR)/sm86.sass + @grep -q 'EXIT' $(AMPERE_CUBIN_DIR)/sm86.sass || { echo 'FAIL: sm86 EXIT not decoded'; exit 1; } + @echo 'AMPERE CUBIN NVDISASM PASS; device NOT_RUN' + +# Independently runnable on a native x86 host before the bridge prerequisite. +.PHONY: test-ampere-numeric-host +$(AMPERE_CUBIN_DIR)/numeric-host: tests/ampere_numeric_host_test.c src/omega_numeric.c src/omega_numeric.h src/omega_numeric_reduce.c src/omega_numeric_reduce.h + @mkdir -p $(AMPERE_CUBIN_DIR) + $(CC) $(CFLAGS) -Isrc -ffp-contract=off -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@ tests/ampere_numeric_host_test.c src/omega_numeric.c src/omega_numeric_reduce.c -lm + +test-ampere-numeric-host: $(AMPERE_CUBIN_DIR)/numeric-host + $(AMPERE_CUBIN_DIR)/numeric-host diff --git a/mk/ampere-encoder.mk b/mk/ampere-encoder.mk new file mode 100644 index 00000000..1ef3d414 --- /dev/null +++ b/mk/ampere-encoder.mk @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# Offline-only tests; never a device qualification. The parent Makefile adds +# $(AMPERE_CORPUS_SRCS) to SRCS. Use a distinct OUT_DIR when enabling capture. +AMPERE_ENCODER_TEST = $(OUT_DIR)/ampere_encoder_test +AMPERE_ORACLE_CORPUS = $(OUT_DIR)/ampere-oracle-corpus +CUDAPP_AMPERE_CORPUS ?= 0 +ifeq ($(CUDAPP_AMPERE_CORPUS),1) +CFLAGS += -DCUDAPP_AMPERE_CORPUS +AMPERE_CORPUS_SRCS = tools/ampere_corpus.c +vpath ampere_corpus.c tools +endif + +$(AMPERE_ENCODER_TEST): tests/test_omega_ampere_encoder.c src/omega_ampere_codegen.h $(OUT_DIR)/libomega_gpu.a + $(CC) $(CFLAGS) -o $@ tests/test_omega_ampere_encoder.c $(OUT_DIR)/libomega_gpu.a -lpthread -lm + +$(OUT_DIR)/ampere_families: tools/ampere_families.c $(OUT_DIR)/libomega_gpu.a + $(CC) $(CFLAGS) -o $@ tools/ampere_families.c $(OUT_DIR)/libomega_gpu.a -lpthread -lm + +$(OUT_DIR)/ampere_matmul_families: tests/test_omega_codegen_freestanding.c $(OUT_DIR)/libomega_gpu.a + $(CC) $(CFLAGS) -o $@ tests/test_omega_codegen_freestanding.c $(OUT_DIR)/libomega_gpu.a -lpthread -lm + +.PHONY: test-ampere-encoder test-ampere-encoder-oracle +test-ampere-encoder: $(AMPERE_ENCODER_TEST) + ./$(AMPERE_ENCODER_TEST) + +# No recursive make/test. Existing producers execute serially in their documented +# host-only/simulator modes; raw-patched FP8 markers must be explicitly refused. +# make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle +test-ampere-encoder-oracle: $(AMPERE_ENCODER_TEST) $(OUT_DIR)/ampere_math_device \ + $(OUT_DIR)/ampere_families $(OUT_DIR)/ampere_matmul_families sm121dis-corpus-bins + @test "$(CUDAPP_AMPERE_CORPUS)" = 1 || { echo 'use CUDAPP_AMPERE_CORPUS=1 and a fresh OUT_DIR' >&2; exit 1; } + @mkdir -p $(AMPERE_ORACLE_CORPUS)/sm121 + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(AMPERE_ENCODER_TEST) + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_families + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_matmul_families + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) sh tools/sm121dis/corpus.sh $(OUT_DIR) $(AMPERE_ORACLE_CORPUS)/sm121 + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_math_device --emit-only + python3 tools/ampere_nvdisasm.py $(AMPERE_ORACLE_CORPUS) diff --git a/mk/ampere-plan.mk b/mk/ampere-plan.mk new file mode 100644 index 00000000..54360989 --- /dev/null +++ b/mk/ampere-plan.mk @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# Host checks never open a driver. Device targets build only; run.py requires --device. +AMPERE_MATH_DEVICE = $(OUT_DIR)/ampere_math_device +AMPERE_MEMORY_REFUSAL = $(OUT_DIR)/ampere_memory_refusal + +.PHONY: ampere-device-build test-ampere-plan +$(AMPERE_MATH_DEVICE): tests/ampere/math_device.c src/omega_ampere_codegen.h $(OUT_DIR)/libomega_gpu.a + $(CC) $(CFLAGS) -ffp-contract=off -o $@ $< $(OUT_DIR)/libomega_gpu.a -lpthread -lm + +$(AMPERE_MEMORY_REFUSAL): tests/ampere/memory_refusal.c src/omega_gpu_platform_linux.h $(OUT_DIR)/libomega_gpu.a + $(CC) $(CFLAGS) -Wl,--wrap=ioctl -o $@ $< $(OUT_DIR)/libomega_gpu.a -lpthread -lm + +ampere-device-build: $(AMPERE_MATH_DEVICE) $(AMPERE_MEMORY_REFUSAL) $(OUT_DIR)/hello_gpu $(OUT_DIR)/hello_gpu_control + +test-ampere-plan: ampere-device-build + python3 tests/ampere/test_doctor.py + $(AMPERE_MATH_DEVICE) --self-test + $(AMPERE_MATH_DEVICE) --emit-only + $(OUT_DIR)/hello_gpu --target=sm_86 --sim diff --git a/mk/ampere-runtime.mk b/mk/ampere-runtime.mk new file mode 100644 index 00000000..1084555b --- /dev/null +++ b/mk/ampere-runtime.mk @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# HOST_ONLY simulated RM/UVM and session paths; no /dev/nvidia opens. +AMPERE_RUNTIME_SRCS = src/omega_ampere_qmd.c $(CUDAPP_OM_UNIT_SRCS) +AMPERE_SESSION_SIM_SRCS = src/omega_gpu_session.c src/omega_gpu_platform.c src/omega_gpu_fmt.c src/omega_blackwell_qmd.c + +build/test_ampere_runtime: tests/test_ampere_runtime.c nvrm/nvrm.c nvrm/nvrm.h src/omega_ampere_qmd.h $(AMPERE_RUNTIME_SRCS) + @mkdir -p build + $(CC) -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE -Isrc $(GPU_ENGINE_PHYS_INC) -o $@ tests/test_ampere_runtime.c $(AMPERE_RUNTIME_SRCS) + +build/test_ampere_session: tests/test_ampere_session.c $(AMPERE_SESSION_SIM_SRCS) src/omega_gpu_session.h src/omega_ampere_qmd.h $(AMPERE_RUNTIME_SRCS) + @mkdir -p build + $(CC) -std=gnu11 -O2 -Wall -Wextra -Werror -pthread -Isrc -o $@ tests/test_ampere_session.c $(AMPERE_SESSION_SIM_SRCS) $(AMPERE_RUNTIME_SRCS) + +.PHONY: test-ampere-runtime +test-ampere-runtime: build/test_ampere_runtime build/test_ampere_session build/test_omega_gpu_platform_linux + ./build/test_ampere_runtime + ./build/test_ampere_session + ./build/test_omega_gpu_platform_linux diff --git a/mk/om-cubin.mk b/mk/om-cubin.mk index af4a4f9e..5b8e328a 100644 --- a/mk/om-cubin.mk +++ b/mk/om-cubin.mk @@ -1,5 +1,5 @@ # The sm_121 cubin packer in seeded Omega (om/cubin/cubin_elf.om), linked through the omega-bridge native binding -# src/cudapp_om_units.c that om/units.sh generates. The C writer in src/omega_cubin.c is migration-pending: the +# portable generated C units $(CUDAPP_OM_UNIT_SRCS) that om/units.sh generates. The C writer in src/omega_cubin.c is migration-pending: the # freestanding build and the oracle builds only (CUDAPP_MIGRATION_PENDING_C_CUBIN, CUDAPP_MIGRATION_PENDING_CUBIN_DIFF). # make test-om-cubin (in `make test`, no Omega tools needed) # 1. the cubin tests (gpu_artifact_export_test, native_artifact_manifest_test) through the .om packer; @@ -10,17 +10,17 @@ # (needs OMEGA_MV and OMEGA_BRIDGE_DIR as in mk/om-encoder.mk; without them exit 3, NOT_RUN, never PASS). OM_CUBIN_DIR = $(OUT_DIR)/om-cubin OM_CUBIN_BUILD = gcc -std=gnu11 -O2 -Wall -Wextra -Werror -pthread -Isrc -OM_CUBIN_DEPS = src/omega_cubin.c src/omega_cubin.h src/cudapp_om_units.c src/cudapp_native.h +OM_CUBIN_DEPS = src/omega_cubin.c src/omega_cubin.h $(CUDAPP_OM_UNIT_SRCS) src/cudapp_native.h OM_CUBIN_DIFF = -DCUDAPP_MIGRATION_PENDING_CUBIN_DIFF .PHONY: test-om-cubin test-om-cubin-mutants $(OM_CUBIN_DIR)/sweep_diff: tests/om_cubin_sweep_test.c $(OM_CUBIN_DEPS) @mkdir -p $(OM_CUBIN_DIR) - $(OM_CUBIN_BUILD) $(OM_CUBIN_DIFF) -o $@ tests/om_cubin_sweep_test.c src/omega_cubin.c src/cudapp_om_units.c + $(OM_CUBIN_BUILD) $(OM_CUBIN_DIFF) -o $@ tests/om_cubin_sweep_test.c src/omega_cubin.c $(CUDAPP_OM_UNIT_SRCS) $(OM_CUBIN_DIR)/sweep_diff_red: tests/om_cubin_sweep_test.c $(OM_CUBIN_DEPS) @mkdir -p $(OM_CUBIN_DIR) $(OM_CUBIN_BUILD) $(OM_CUBIN_DIFF) -DCUDAPP_CUBIN_DIFF_SELFTEST -o $@ tests/om_cubin_sweep_test.c src/omega_cubin.c \ - src/cudapp_om_units.c + $(CUDAPP_OM_UNIT_SRCS) $(OM_CUBIN_DIR)/artifact_diff: tests/gpu_artifact_export_test.c src/omega_native_artifact.c $(OM_CUBIN_DEPS) $(OUT_DIR)/libomega_gpu.a @mkdir -p $(OM_CUBIN_DIR) $(CC) $(CFLAGS) $(OM_CUBIN_DIFF) -o $@ tests/gpu_artifact_export_test.c src/omega_native_artifact.c src/omega_cubin.c \ @@ -30,7 +30,7 @@ $(OM_CUBIN_DIR)/manifest_diff: tests/native_artifact_manifest_test.c src/omega_n @mkdir -p $(OM_CUBIN_DIR) $(CC) $(CFLAGS) $(OM_CUBIN_DIFF) -ffunction-sections -fdata-sections -Wl,--gc-sections -o $@ \ tests/native_artifact_manifest_test.c src/omega_native_artifact.c \ - src/omega_cubin.c src/omega_blackwell_realize.c src/sha256.c src/cudapp_om_units.c -lpthread + src/omega_cubin.c src/omega_blackwell_realize.c src/sha256.c $(CUDAPP_OM_UNIT_SRCS) -lpthread test-om-cubin: $(ARTIFACT_TEST) $(OUT_DIR)/native_artifact_manifest_test $(OM_CUBIN_DIR)/artifact_diff \ $(OM_CUBIN_DIR)/manifest_diff $(OM_CUBIN_DIR)/sweep_diff $(OM_CUBIN_DIR)/sweep_diff_red @@ -61,7 +61,7 @@ test-om-cubin-mutants: OMEGA_UNITS=$$(pwd)/$$d/cubin_elf.om OMEGA_UNITS_DEST=$$d OMEGA_OMC=$(OMEGA_MV)/seed/out/omc \ OMEGA_BRIDGE=$(OMEGA_BRIDGE_DIR) sh om/units.sh > /dev/null || exit 1; \ $(OM_CUBIN_BUILD) $(OM_CUBIN_DIFF) -o $$d/sweep tests/om_cubin_sweep_test.c src/omega_cubin.c \ - $$d/cudapp_om_units.c || exit 1; \ + $$d/cudapp_om_cubin_elf.c || exit 1; \ if $$d/sweep > $$d/sweep.log 2>&1; then echo "MUTANT $$n SURVIVED: '$$m'"; exit 1; fi; \ echo "mutant $$n red ('$$m'): $$(grep -m1 -e 'CUBIN DIFF' -e FAIL $$d/sweep.log)"; \ done diff --git a/mk/om-encoder.mk b/mk/om-encoder.mk index e4d18388..5aa5681a 100644 --- a/mk/om-encoder.mk +++ b/mk/om-encoder.mk @@ -1,5 +1,5 @@ # CUDApp#79: the sm_121 instruction encoder in seeded Omega (om/encoder/bw_enc_sm121.om), linked through the -# omega-bridge native binding src/cudapp_om_units.c that om/units.sh generates. The C encoder in +# portable generated C units $(CUDAPP_OM_UNIT_SRCS) that om/units.sh generates. The C encoder in # src/omega_blackwell_codegen.c is migration-pending: the freestanding build and the oracle builds only. # make test-om-encoder (in `make test`, no Omega tools needed) # 1. the golden-word fixture verifiers (nvcc/nvdisasm oracles) through the .om encoder; @@ -20,17 +20,17 @@ OM_ENC_SRCS = src/omega_blackwell_codegen.c src/omega_blackwell_matmul.c src/sha OM_ENC_BUILD = gcc -std=gnu11 -O2 -Wall -Wextra -Werror -pthread -Isrc .PHONY: test-om-encoder test-om-encoder-corpus test-om-units test-om-encoder-mutants -$(OM_ENC_DIR)/codegen_om: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) src/cudapp_om_units.c src/cudapp_native.h +$(OM_ENC_DIR)/codegen_om: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) src/cudapp_native.h @mkdir -p $(OM_ENC_DIR) - $(OM_ENC_BUILD) -o $@ tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) src/cudapp_om_units.c -$(OM_ENC_DIR)/codegen_diff: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) src/cudapp_om_units.c src/cudapp_native.h + $(OM_ENC_BUILD) -o $@ tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) +$(OM_ENC_DIR)/codegen_diff: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) src/cudapp_native.h @mkdir -p $(OM_ENC_DIR) $(OM_ENC_BUILD) -DCUDAPP_MIGRATION_PENDING_ENCODER_DIFF -o $@ tests/test_omega_codegen_freestanding.c \ - $(OM_ENC_SRCS) src/cudapp_om_units.c -$(OM_ENC_DIR)/codegen_diff_red: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) src/cudapp_om_units.c src/cudapp_native.h + $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) +$(OM_ENC_DIR)/codegen_diff_red: $(OM_ENC_TEST_DEPS) $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) src/cudapp_native.h @mkdir -p $(OM_ENC_DIR) $(OM_ENC_BUILD) -DCUDAPP_MIGRATION_PENDING_ENCODER_DIFF -DCUDAPP_ENCODER_DIFF_SELFTEST -o $@ \ - tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) src/cudapp_om_units.c + tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) $(CUDAPP_OM_UNIT_SRCS) test-om-encoder: $(OM_ENC_DIR)/codegen_om $(OM_ENC_DIR)/codegen_diff $(OM_ENC_DIR)/codegen_diff_red $(OM_ENC_DIR)/codegen_om --golden @@ -79,7 +79,7 @@ test-om-encoder-mutants: build/test_codegen_freestanding if cmp -s $$d/bw_enc_sm121.om om/encoder/bw_enc_sm121.om; then echo "MUTANT $$n BROKEN: '$$m' changed nothing"; exit 1; fi; \ OMEGA_UNITS=$$(pwd)/$$d/bw_enc_sm121.om OMEGA_UNITS_DEST=$$d OMEGA_OMC=$(OMEGA_MV)/seed/out/omc \ OMEGA_BRIDGE=$(OMEGA_BRIDGE_DIR) sh om/units.sh > /dev/null || exit 1; \ - $(OM_ENC_BUILD) -o $$d/codegen tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) $$d/cudapp_om_units.c || exit 1; \ + $(OM_ENC_BUILD) -o $$d/codegen tests/test_omega_codegen_freestanding.c $(OM_ENC_SRCS) $$d/cudapp_om_bw_enc_sm121.c || exit 1; \ g=0; $$d/codegen --golden > $$d/golden.log 2>&1 || g=1; \ c=0; $$d/codegen --dump > $$d/dump.txt 2>&1; cmp -s $$d/dump.txt $(OM_ENC_DIR)/c-dump.txt || c=1; \ if [ $$g = 0 ] && [ $$c = 0 ]; then echo "MUTANT $$n SURVIVED: '$$m'"; exit 1; fi; \ diff --git a/mk/omega-gpu-engine.mk b/mk/omega-gpu-engine.mk index b7c6ad8a..283d1c61 100644 --- a/mk/omega-gpu-engine.mk +++ b/mk/omega-gpu-engine.mk @@ -54,7 +54,7 @@ test-gpu-engine-prod-build: # three core files the vector builder needs) with tests/fake_m16_native.c in place of the physics # m16_native.c and nvrm.c. Opens no device. GPU_ENGINE_SIM_SRCS = src/omega_blackwell_submit.c src/omega_blackwell_engine.c src/omega_gpu_engine.c \ - src/omega_blackwell_matmul.c src/omega_blackwell_codegen.c src/cudapp_om_units.c src/omega_blackwell_encoder.c \ + src/omega_blackwell_matmul.c src/omega_blackwell_codegen.c $(CUDAPP_OM_UNIT_SRCS) src/omega_blackwell_encoder.c \ src/omega_blackwell_qmd.c src/omega_blackwell_realize.c src/omega_vector.c \ src/omega_core.c src/omega_canonical.c src/sha256.c @@ -89,8 +89,8 @@ test-gpu-engine-gb10-compile: build/test_omega_gpu_engine_gb10.o # APIs while serving a Qwen3-4B-shaped sequence, against the simulated driver. Host only, no device. # Prints MEASURE lines; asserts only bookkeeping. Links no physics C sources, only its headers. GPU_SERVE_ALLOC_SRCS = src/omega_gpu_session.c src/omega_gpu_platform.c src/omega_gpu_platform_linux.c src/omega_gpu_fmt.c src/omega_gpu_matmul_api.c src/omega_gpu_attention_api.c src/omega_gpu_serving.c \ - src/omega_gpu_wait.c src/omega_blackwell_codegen.c src/cudapp_om_units.c src/omega_blackwell_encoder.c src/omega_blackwell_qmd.c \ - src/omega_blackwell_matmul.c src/sha256.c + src/omega_gpu_wait.c src/omega_blackwell_codegen.c $(CUDAPP_OM_UNIT_SRCS) src/omega_blackwell_encoder.c src/omega_blackwell_qmd.c \ + src/omega_blackwell_matmul.c src/omega_ampere_qmd.c src/sha256.c build/gpu_serving_alloc_count_test: tests/gpu_serving_alloc_count_test.c tests/fake_m16_native.c tests/fake_m16_native.h $(GPU_SERVE_ALLOC_SRCS) @mkdir -p build gcc -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE -pthread -ffp-contract=off -Isrc -Itests $(GPU_ENGINE_PHYS_INC) \ @@ -168,13 +168,13 @@ test-gpu-engine-freestanding: $(GPU_FS_LINK) build/test_omega_gpu_engine_freesta # nm -u check to refuse it (a check that can never fail proves nothing). .PHONY: test-codegen-freestanding test-gpu-fs-allowlist-control CODEGEN_FS_TEST_DEPS = tests/test_omega_codegen_freestanding.c src/omega_blackwell_codegen.h src/omega_blackwell_matmul.h -# The hosted side encodes through the .om encoder (om/encoder/bw_enc_sm121.om via src/cudapp_om_units.c), the +# The hosted side encodes through the .om encoder (om/encoder/bw_enc_sm121.om via portable generated C), the # freestanding side through the migration-pending C encoder, so the cmp below is also an .om-vs-C differential. -build/test_codegen_hosted: $(CODEGEN_FS_TEST_DEPS) src/omega_blackwell_codegen.c src/cudapp_om_units.c src/cudapp_native.h \ +build/test_codegen_hosted: $(CODEGEN_FS_TEST_DEPS) src/omega_blackwell_codegen.c $(CUDAPP_OM_UNIT_SRCS) src/cudapp_native.h \ src/omega_blackwell_matmul.c src/sha256.c @mkdir -p build gcc -std=gnu11 -O2 -Wall -Wextra -Werror -pthread -Isrc -o $@ tests/test_omega_codegen_freestanding.c \ - src/omega_blackwell_codegen.c src/cudapp_om_units.c src/omega_blackwell_matmul.c src/sha256.c + src/omega_blackwell_codegen.c $(CUDAPP_OM_UNIT_SRCS) src/omega_blackwell_matmul.c src/sha256.c build/test_codegen_freestanding: $(CODEGEN_FS_TEST_DEPS) $(GPU_FS_LINK) @mkdir -p build gcc -std=gnu11 -O2 -Wall -Wextra -Werror -Isrc -DOMEGA_GPU_NO_POSIX -o $@ tests/test_omega_codegen_freestanding.c \ @@ -207,10 +207,10 @@ test-gpu-fs-allowlist-control: $(GPU_FS_LINK) build/test_omega_gpu_session_platform: tests/test_omega_gpu_session_platform.c $(GPU_FS_LINK) @mkdir -p build gcc -std=gnu11 -O2 -Wall -Wextra -Werror -Isrc -DOMEGA_GPU_NO_POSIX -o $@ tests/test_omega_gpu_session_platform.c $(GPU_FS_LINK) -GPU_LINUX_REF_SRCS = src/omega_gpu_session.c src/omega_gpu_platform.c src/omega_gpu_platform_linux.c src/omega_gpu_fmt.c src/omega_blackwell_qmd.c +GPU_LINUX_REF_SRCS = src/omega_gpu_session.c src/omega_gpu_platform.c src/omega_gpu_platform_linux.c src/omega_gpu_fmt.c src/omega_blackwell_qmd.c src/omega_ampere_qmd.c # omega #459: the command list over the reference (near-full ring with the #457 L2 invalidate prefix pending) needs the # cached allocation, the command list and the codegen behind its nop kernel. -GPU_LINUX_REF_CMDLIST_SRCS = src/omega_gpu_mem_cached.c src/omega_gpu_cmdlist.c src/omega_blackwell_codegen.c src/cudapp_om_units.c src/omega_blackwell_encoder.c \ +GPU_LINUX_REF_CMDLIST_SRCS = src/omega_gpu_mem_cached.c src/omega_gpu_cmdlist.c src/omega_blackwell_codegen.c $(CUDAPP_OM_UNIT_SRCS) src/omega_blackwell_encoder.c \ src/omega_blackwell_matmul.c src/omega_blackwell_realize.c src/sha256.c build/test_omega_gpu_platform_linux: tests/test_omega_gpu_platform_linux.c tests/fake_m16_native.c tests/fake_m16_native.h $(GPU_LINUX_REF_SRCS) $(GPU_FS_HDRS) src/omega_gpu_platform_linux.h \ src/omega_gpu_cmdlist.h src/omega_gpu_mem_cached.h $(GPU_LINUX_REF_CMDLIST_SRCS) @@ -218,9 +218,9 @@ build/test_omega_gpu_platform_linux: tests/test_omega_gpu_platform_linux.c tests gcc -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE -pthread -Isrc -Itests $(GPU_ENGINE_PHYS_INC) \ -o $@ tests/test_omega_gpu_platform_linux.c tests/fake_m16_native.c $(GPU_LINUX_REF_SRCS) $(GPU_LINUX_REF_CMDLIST_SRCS) -lm # The driver client's VA slots and close path on the host (no device opened, nvrm_open never called). -build/test_nvrm_va_slots: tests/test_nvrm_va_slots.c $(PHYSICS_DIR)/nvrm/nvrm.c $(PHYSICS_DIR)/nvrm/nvrm.h +build/test_nvrm_va_slots: tests/test_nvrm_va_slots.c $(PHYSICS_DIR)/nvrm/nvrm.c $(PHYSICS_DIR)/nvrm/nvrm.h src/omega_ampere_qmd.c $(CUDAPP_OM_UNIT_SRCS) @mkdir -p build - gcc -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE $(GPU_ENGINE_PHYS_INC) -o $@ tests/test_nvrm_va_slots.c + gcc -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE -Isrc $(GPU_ENGINE_PHYS_INC) -o $@ tests/test_nvrm_va_slots.c src/omega_ampere_qmd.c $(CUDAPP_OM_UNIT_SRCS) test-gpu-session-platform: build/test_omega_gpu_session_platform build/test_omega_gpu_platform_linux build/test_nvrm_va_slots \ test-gpu-session-mutants ./build/test_omega_gpu_session_platform diff --git a/nvrm/nvrm.c b/nvrm/nvrm.c index 474f8946..71d22d67 100644 --- a/nvrm/nvrm.c +++ b/nvrm/nvrm.c @@ -7,6 +7,7 @@ */ #include "nvrm.h" +#include "omega_ampere_qmd.h" #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +51,42 @@ #include "ctrl/ctrla06c.h" #include "ctrl/ctrlc36f.h" +static int fail(Nvrm *rm, const char *fmt, ...); + +/* MMIO / PCIe publication fence, also used for the coherent GB10 path. */ +static void nvrm_fence(void) { +#if defined(__aarch64__) + __asm__ volatile("dsb sy" ::: "memory"); +#elif defined(__x86_64__) + __asm__ volatile("mfence" ::: "memory"); +#else + atomic_thread_fence(memory_order_seq_cst); +#endif +} + +/* Pure class admission lives in seeded Omega. Class IDs are vendor constants: + * open-gpu-doc clc7c0.h, clc56f.h, and vendored clc361.h / clc661.h. */ +static int select_classes(Nvrm *rm, const uint32_t *classes, uint32_t count) { + rm->compute_class = rm->gpfifo_class = rm->usermode_class = 0; + rm->target_sm = 0; rm->discrete = 0; + uint64_t m[16] = {1, rm->sm_version, + NV2080_CTRL_GR_INFO_SM_VERSION_8_06, NV2080_CTRL_GR_INFO_SM_VERSION_12_01, + OMEGA_AMPERE_COMPUTE_B, OMEGA_AMPERE_GPFIFO_A, VOLTA_USERMODE_A, + BLACKWELL_COMPUTE_B, BLACKWELL_CHANNEL_GPFIFO_A, HOPPER_USERMODE_A}; + /* Marshal the vendor's class-list presence, without selecting a target. */ + for (uint32_t i = 0; i < count; i++) { + for (uint32_t k = 0; k < 3; k++) { + if (classes[i] == m[4 + k]) m[10] |= 1u << k; + if (classes[i] == m[7 + k]) m[11] |= 1u << k; + } + } + uint32_t selected[64]; + if (omega_ampere_policy(m, selected) != 0) + return fail(rm, "unsupported SM 0x%x or missing target classes", rm->sm_version); + rm->target_sm = selected[0]; rm->discrete = (uint8_t)selected[1]; + rm->compute_class = selected[2]; rm->gpfifo_class = selected[3]; rm->usermode_class = selected[4]; + return 0; +} #define NV_IOWR(nr, sz) _IOC(_IOC_READ | _IOC_WRITE, NV_IOCTL_MAGIC, (nr), (sz)) static int fail(Nvrm *rm, const char *fmt, ...) { @@ -315,6 +353,23 @@ static int va_slot_cover(Nvrm *rm, uint64_t end) { memory_order_relaxed, memory_order_relaxed) ? 1 : 0; } +static int card_index(const nv_ioctl_card_info_t cards[64], const char *bdf) { + if (bdf) { + unsigned domain, bus, slot, function; + char end, canonical[32]; + if (sscanf(bdf, "%x:%x:%x.%x%c", &domain, &bus, &slot, &function, &end) != 4 || + domain > 0xffff || bus > 0xff || slot > 0x1f || function > 7) return -1; + snprintf(canonical, sizeof canonical, "%04x:%02x:%02x.%x", domain, bus, slot, function); + if (strcmp(bdf, canonical) != 0) return -1; + for (int i = 0; i < 64; i++) + if (cards[i].valid && cards[i].pci_info.domain == domain && + cards[i].pci_info.bus == bus && cards[i].pci_info.slot == slot && + cards[i].pci_info.function == function) return i; + return -1; + } + for (int i = 0; i < 64; i++) if (cards[i].valid) return i; + return -1; +} int nvrm_open(Nvrm *rm) { memset(rm, 0, sizeof *rm); rm->next_handle = 0xcf000001u; @@ -339,9 +394,9 @@ int nvrm_open(Nvrm *rm) { nv_ioctl_card_info_t cards[64]; memset(cards, 0, sizeof cards); if (nv_ioctl(rm->fd_ctl, NV_ESC_CARD_INFO, cards, sizeof cards) != 0) return fail(rm, "CARD_INFO errno %d", errno); - int found = -1; - for (int i = 0; i < 64; i++) if (cards[i].valid) { found = i; break; } - if (found < 0) return fail(rm, "no GPU"); + const char *bdf = getenv("CUDAPP_GPU_BDF"); + int found = card_index(cards, bdf); + if (found < 0) return fail(rm, "no GPU matches CUDAPP_GPU_BDF=%s (canonical dddd:bb:ss.f required)", bdf ? bdf : ""); rm->gpu_id = cards[found].gpu_id; rm->minor = cards[found].minor_number; @@ -367,7 +422,14 @@ int nvrm_open(Nvrm *rm) { vp.limit = 0x1ffffffffffffull; if (rm_alloc(rm, rm->device, NV01_MEMORY_VIRTUAL, &vp, sizeof vp, &rm->virtmem)) return -1; - /* Class list: pick the Blackwell classes that this RM exposes. */ + NV2080_CTRL_GR_INFO gi = { .index = NV2080_CTRL_GR_INFO_INDEX_SM_VERSION }; + NV2080_CTRL_GR_GET_INFO_PARAMS gp; + memset(&gp, 0, sizeof gp); + gp.grInfoListSize = 1; + gp.grInfoList = NV_PTR_TO_NvP64(&gi); + if (rm_control(rm, rm->subdevice, NV2080_CTRL_CMD_GR_GET_INFO, &gp, sizeof gp)) return -1; + rm->sm_version = gi.data; + NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS cl; memset(&cl, 0, sizeof cl); if (rm_control(rm, rm->device, NV0080_CTRL_CMD_GPU_GET_CLASSLIST, &cl, sizeof cl)) return -1; @@ -375,29 +437,13 @@ int nvrm_open(Nvrm *rm) { if (cl.numClasses > 512) return fail(rm, "too many classes"); cl.classList = NV_PTR_TO_NvP64(classes); if (rm_control(rm, rm->device, NV0080_CTRL_CMD_GPU_GET_CLASSLIST, &cl, sizeof cl)) return -1; - for (uint32_t i = 0; i < cl.numClasses; i++) { - if (classes[i] == BLACKWELL_COMPUTE_B) rm->compute_class = classes[i]; - if (classes[i] == BLACKWELL_CHANNEL_GPFIFO_A) rm->gpfifo_class = classes[i]; - if (classes[i] == HOPPER_USERMODE_A) rm->usermode_class = classes[i]; - } - if (!rm->compute_class || !rm->gpfifo_class || !rm->usermode_class) - return fail(rm, "missing class: compute 0x%x gpfifo 0x%x usermode 0x%x", - rm->compute_class, rm->gpfifo_class, rm->usermode_class); - + if (cl.numClasses > 512 || select_classes(rm, classes, cl.numClasses)) return -1; if (rm_alloc(rm, rm->subdevice, rm->usermode_class, NULL, 0, &rm->usermode)) return -1; void *mmio = map_to_cpu(rm, rm->usermode, 0x10000, NULL, 0, 0); if (mmio == MAP_FAILED) return -1; rm->usermode_cpu = mmio; rm->doorbell = (volatile uint32_t *)((uint8_t *)mmio + NVC361_NOTIFY_CHANNEL_PENDING); - NV2080_CTRL_GR_INFO gi = { .index = NV2080_CTRL_GR_INFO_INDEX_SM_VERSION }; - NV2080_CTRL_GR_GET_INFO_PARAMS gp; - memset(&gp, 0, sizeof gp); - gp.grInfoListSize = 1; - gp.grInfoList = NV_PTR_TO_NvP64(&gi); - if (rm_control(rm, rm->subdevice, NV2080_CTRL_CMD_GR_GET_INFO, &gp, sizeof gp)) return -1; - rm->sm_version = gi.data; - NV_VASPACE_ALLOCATION_PARAMETERS vap; memset(&vap, 0, sizeof vap); vap.vaBase = 0x1000; @@ -567,11 +613,11 @@ static void quarantine_allocation(Nvrm *rm, uint32_t h, uint64_t va, uint64_t si rm->faulted = 1; } -static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32_t gpu_cacheable); +static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32_t gpu_cacheable, int local); /* Coherent, CPU-mapped, GPU-mapped buffer at one shared virtual address. */ int nvrm_alloc(Nvrm *rm, uint64_t size, NvrmMem *out) { - return alloc_with_cacheability(rm, size, out, NVOS32_ATTR2_GPU_CACHEABLE_YES); + return alloc_with_cacheability(rm, size, out, NVOS32_ATTR2_GPU_CACHEABLE_YES, 0); } /* Same buffer, but the graphics chip does not keep it in its L2. The CPU @@ -579,10 +625,34 @@ int nvrm_alloc(Nvrm *rm, uint64_t size, NvrmMem *out) { * resident chip program polling the buffer keeps reading its own L2 copy and * never sees the store. For memory both sides poll, not for bulk data. */ int nvrm_alloc_gpu_uncached(Nvrm *rm, uint64_t size, NvrmMem *out) { - return alloc_with_cacheability(rm, size, out, NVOS32_ATTR2_GPU_CACHEABLE_NO); + return alloc_with_cacheability(rm, size, out, NVOS32_ATTR2_GPU_CACHEABLE_NO, 0); } -static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32_t gpu_cacheable) { +int nvrm_alloc_vram(Nvrm *rm, uint64_t size, NvrmMem *out) { + if (!rm || !rm->discrete || rm->target_sm != 86) + return rm ? fail(rm, "local framebuffer requires SM86") : -1; + return alloc_with_cacheability(rm, size, out, NVOS32_ATTR2_GPU_CACHEABLE_NO, 1); +} + +int nvrm_vram_info(Nvrm *rm, uint64_t *free_bytes, uint64_t *total_bytes) { + if (!rm || !free_bytes || !total_bytes || !rm->discrete) return -1; + /* NVIDIA nvos.h NVOS32_FUNCTION_INFO, Info.attr LOCATION_VIDMEM. + * This ioctl queries the selected device's framebuffer heap, not host RAM. */ + NVOS32_PARAMETERS p; + memset(&p, 0, sizeof p); + p.hRoot = rm->root; + p.hObjectParent = rm->device; + p.function = NVOS32_FUNCTION_INFO; + p.data.Info.attr = NVOS32_ATTR_LOCATION_VIDMEM << 25; + if (nv_ioctl(rm->fd_ctl, NV_ESC_RM_VID_HEAP_CONTROL, &p, sizeof p) != 0 || p.status) + return fail(rm, "VID_HEAP_INFO errno %d status 0x%x", errno, p.status); + if (!p.total || p.free > p.total) return fail(rm, "invalid framebuffer heap information"); + *free_bytes = p.free; + *total_bytes = p.total; + return 0; +} + +static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32_t gpu_cacheable, int local) { if (!rm || !out || !size || rm->faulted || size > SIZE_MAX - 0xfffULL) return rm ? fail(rm, "invalid or overflowed allocation size") : -1; size = (size + 0xfff) & ~0xfffull; @@ -603,29 +673,46 @@ static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32 mp.type = NVOS32_TYPE_IMAGE; mp.flags = NVOS32_ALLOC_FLAGS_MAP_NOT_REQUIRED | NVOS32_ALLOC_FLAGS_MEMORY_HANDLE_PROVIDED | NVOS32_ALLOC_FLAGS_ALIGNMENT_FORCE | NVOS32_ALLOC_FLAGS_IGNORE_BANK_PLACEMENT; - /* GB10 has no local video memory: everything is coherent system memory. */ - mp.attr = (NVOS32_ATTR_PHYSICALITY_ALLOW_NONCONTIGUOUS << 27) | (NVOS32_ATTR_LOCATION_PCI << 25); + /* GB10 stays coherent system memory. Discrete payloads explicitly request + * LOCAL_USER / VIDMEM; failure must never fall back into host RAM. */ + mp.attr = (NVOS32_ATTR_PHYSICALITY_ALLOW_NONCONTIGUOUS << 27) | + ((local ? NVOS32_ATTR_LOCATION_VIDMEM : NVOS32_ATTR_LOCATION_PCI) << 25); mp.attr2 = (gpu_cacheable << 2) | NVOS32_ATTR2_ZBC_PREFER_NO_ZBC; mp.format = 6; mp.size = size; mp.alignment = 0x1000; mp.limit = size - 1; uint32_t h; - if (rm_alloc(rm, rm->device, NV01_MEMORY_SYSTEM, &mp, sizeof mp, &h)) { + if (rm_alloc(rm, rm->device, local ? NV01_MEMORY_LOCAL_USER : NV01_MEMORY_SYSTEM, &mp, sizeof mp, &h)) { if (munmap(res, size) != 0) rm->faulted = 1; + if (local && !rm->faulted && rm->last_rm_status != 0) { + (void)va_release(rm, va, size); + return -1; + } rm->faulted = 1; /* unknown driver state: do not recycle this VA */ return fail_alloc_context(rm, size); } - void *cpu = map_to_cpu(rm, h, size, (void *)va, 0, 1); + void *cpu = map_to_cpu(rm, h, size, (void *)va, 0, !local); if (cpu != (void *)va) { char why[sizeof rm->err]; memcpy(why, rm->err, sizeof why); quarantine_allocation(rm, h, va, size, (void *)va, 0, 0); + if (local) { + NvrmMem failed = {.handle = h, .va = va, .size = size, .cpu = (void *)va}; + if (nvrm_free(rm, &failed) == 0) rm->faulted = 0; + } return fail(rm, "cpu map at 0x%lx failed: %s", (unsigned long)va, why); } uint8_t uvm_created = 0, dma_mapped = 0; if (uvm_map(rm, va, size, h, &uvm_created, &dma_mapped)) { quarantine_allocation(rm, h, va, size, cpu, uvm_created, dma_mapped); + if (local) { + char why[sizeof rm->err]; + memcpy(why, rm->err, sizeof why); + NvrmMem failed = {.handle = h, .va = va, .size = size, .cpu = cpu}; + if (nvrm_free(rm, &failed) == 0) rm->faulted = 0; + memcpy(rm->err, why, sizeof rm->err); + } return -1; } out->handle = h; @@ -646,6 +733,35 @@ static int alloc_with_cacheability(Nvrm *rm, uint64_t size, NvrmMem *out, uint32 return 0; } +static int copy_live(Nvrm *rm, const NvrmMem *m, uint64_t off, size_t bytes) { + if (!rm || !m || rm->faulted || !bytes || off > m->size || bytes > m->size - off) return -1; + for (uint32_t i = 0; i < rm->live_count; i++) { + const NvrmLiveAlloc *a = &rm->live[i]; + if (a->handle == m->handle && a->va == m->va && a->size == m->size && + a->cpu == m->cpu && a->cpu_live && a->rm_live && !a->quarantined) return 0; + } + return fail(rm, "copy requires a live allocation and an in-bounds span"); +} + +int nvrm_copy_to(Nvrm *rm, const NvrmMem *m, uint64_t off, const void *src, size_t bytes) { + if (!src || copy_live(rm, m, off, bytes)) return -1; + volatile uint8_t *dst = (volatile uint8_t *)m->cpu + off; + const uint8_t *in = src; + for (size_t i = 0; i < bytes; i++) dst[i] = in[i]; + nvrm_fence(); + return 0; +} + +int nvrm_copy_from(Nvrm *rm, const NvrmMem *m, uint64_t off, void *dst, size_t bytes) { + if (!dst || copy_live(rm, m, off, bytes)) return -1; + nvrm_fence(); + const volatile uint8_t *src = (const volatile uint8_t *)m->cpu + off; + uint8_t *out = dst; + for (size_t i = 0; i < bytes; i++) out[i] = src[i]; + nvrm_fence(); + return 0; +} + /* Reverse of nvrm_alloc(): drop the UVM external range, free the RM memory * object, unmap the CPU range, and return the VA range to the free list. */ int nvrm_free(Nvrm *rm, NvrmMem *m) { @@ -934,11 +1050,31 @@ volatile uint32_t *nvrm_userd_gpput(Nvrm *rm) { return (volatile uint32_t *)((uint8_t *)rm->fifo.cpu + rm->userd_off + offsetof(Nvc96fControl, GPPut)); } +/* Ampere admits only its implemented launch protocol, below both m16 and the + * platform queue. Decode the wire envelope here; method/class policy is Omega. */ +static int validate_ampere_push(Nvrm *rm, const NvrmMem *pb, uint32_t off, uint32_t nwords) { + if (!rm->discrete) return 0; + if (!pb->cpu) return fail(rm, "Ampere pushbuffer has no CPU mapping"); + const uint32_t *w = (const uint32_t *)((const uint8_t *)pb->cpu + off); + for (uint32_t i = 0; i < nwords;) { + const uint32_t h = w[i++], count = (h >> 16) & 0x1fffu; + if ((h >> 28) != 2 || !count || count > nwords - i) + return fail(rm, "Ampere push packet envelope refused"); + const uint64_t m[16] = {4, (h & 0x1fffu) << 2, count, (h >> 13) & 7u, + w[i], OMEGA_AMPERE_COMPUTE_B, 0x02b4, 0x02c0, 0x005c, 0x0028, + 0x021c, (1u << 0) | (1u << 4) | (1u << 12)}; + if (omega_ampere_policy(m, NULL)) return fail(rm, "Ampere method/class refused before submission"); + i += count; + } + return 0; +} + int nvrm_enqueue(Nvrm *rm, const NvrmMem *pb, uint32_t off, uint32_t nwords) { if (!rm || !pb || rm->faulted || !rm->gpfifo || !rm->fifo.cpu || rm->entries < 2) return rm ? fail(rm, "channel not ready") : -1; if ((off & 3u) || nwords == 0 || nwords > 0x1fffff || (uint64_t)off + (uint64_t)nwords * 4u > pb->size) return fail(rm, "bad pushbuffer span"); + if (validate_ampere_push(rm, pb, off, nwords)) return -1; if (pb->va > UINT64_MAX - off) return fail(rm, "pushbuffer VA overflow"); /* Blackwell USERD documents no GPGet (clc96f.h), so consumption is tracked by the * caller via nvrm_retire() after it observes completion. Never overrun unretired entries. */ @@ -946,9 +1082,9 @@ int nvrm_enqueue(Nvrm *rm, const NvrmMem *pb, uint32_t off, uint32_t nwords) { volatile uint64_t *ring = (volatile uint64_t *)rm->fifo.cpu; ring[rm->put % rm->entries] = nvrm_gp_entry(pb->va + off, nwords); rm->put++; - __asm__ volatile("dsb sy" ::: "memory"); + nvrm_fence(); *nvrm_userd_gpput(rm) = rm->put % rm->entries; - __asm__ volatile("dsb sy" ::: "memory"); + nvrm_fence(); return 0; } @@ -974,13 +1110,14 @@ int nvrm_chan_submit(Nvrm *rm, uint32_t ch, const NvrmMem *pb, uint32_t off, uin if ((off & 3u) || nwords == 0 || nwords > 0x1fffff || (uint64_t)off + (uint64_t)nwords * 4u > pb->size) return fail(rm, "bad pushbuffer span"); if (pb->va > UINT64_MAX - off) return fail(rm, "pushbuffer VA overflow"); + if (validate_ampere_push(rm, pb, off, nwords)) return -1; if (c->put - c->retired >= c->entries - 1) return fail(rm, "GPFIFO full (channel %u): %u entries unretired", ch, c->put - c->retired); volatile uint64_t *ring = (volatile uint64_t *)c->fifo.cpu; ring[c->put % c->entries] = nvrm_gp_entry(pb->va + off, nwords); c->put++; - __asm__ volatile("dsb sy" ::: "memory"); + nvrm_fence(); *(volatile uint32_t *)((uint8_t *)c->fifo.cpu + c->userd_off + offsetof(Nvc96fControl, GPPut)) = c->put % c->entries; - __asm__ volatile("dsb sy" ::: "memory"); + nvrm_fence(); *rm->doorbell = c->token; /* NVC361_NOTIFY_CHANNEL_PENDING: one doorbell page, the token names the channel */ return 0; } diff --git a/nvrm/nvrm.h b/nvrm/nvrm.h index ee9aa528..e8ad7349 100644 --- a/nvrm/nvrm.h +++ b/nvrm/nvrm.h @@ -93,6 +93,8 @@ typedef struct { uint32_t gpu_id, minor; uint32_t compute_class, gpfifo_class, usermode_class; uint32_t sm_version; /* NV2080_CTRL_GR_INFO_INDEX_SM_VERSION */ + uint32_t target_sm; /* exact execution target: 86 or 121 */ + uint8_t discrete; /* local framebuffer, not GB10 coherent system memory */ void *usermode_cpu; /* HOPPER_USERMODE_A MMIO mapping (RM-provided, BAR0-relative) */ volatile uint32_t *doorbell; /* usermode MMIO + NVC361_NOTIFY_CHANNEL_PENDING */ NvrmMem fifo; /* GPFIFO ring, then USERD at userd_off */ @@ -132,6 +134,15 @@ typedef struct { int nvrm_open(Nvrm *rm); int nvrm_alloc(Nvrm *rm, uint64_t size, NvrmMem *out); +/* Local framebuffer on discrete SM86, CPU BAR mapped by RM_MAP_MEMORY. The + * CPU and GPU views share a VA but not a cache. No system-memory fallback. */ +int nvrm_alloc_vram(Nvrm *rm, uint64_t size, NvrmMem *out); +/* Fresh driver framebuffer heap query. Never substitutes /proc/meminfo. */ +int nvrm_vram_info(Nvrm *rm, uint64_t *free_bytes, uint64_t *total_bytes); +/* Bounds/live-identity checked CPU BAR transfers. Caller proves GPU idle before + * readback or overwrite; the fence orders mapped PCIe writes before submission. */ +int nvrm_copy_to(Nvrm *rm, const NvrmMem *m, uint64_t off, const void *src, size_t bytes); +int nvrm_copy_from(Nvrm *rm, const NvrmMem *m, uint64_t off, void *dst, size_t bytes); /* Reverse of nvrm_alloc: drops the UVM external range, frees the RM memory * object, unmaps the CPU range, and returns the VA range for reuse by a * later nvrm_alloc. Idempotent on an already-zeroed NvrmMem (returns 0, @@ -169,7 +180,7 @@ static inline uint32_t nvrm_mthd(uint32_t subc, uint32_t mthd, uint32_t count) { return (2u << 28) | (count << 16) | (subc << 13) | (mthd >> 2); } -#endif /* As nvrm_alloc, but the graphics chip does not cache it in L2. For memory * that a resident chip program polls while the CPU writes it. */ int nvrm_alloc_gpu_uncached(Nvrm *rm, uint64_t size, NvrmMem *out); +#endif diff --git a/om/cubin/cubin_elf.om b/om/cubin/cubin_elf.om index 3edfaa23..62c75f66 100644 --- a/om/cubin/cubin_elf.om +++ b/om/cubin/cubin_elf.om @@ -1,10 +1,10 @@ -note cubin_elf.om: the sm_121 cubin ELF packer of CUDApp (OM-GPU-RETIRE, lane CudappOm). +note cubin_elf.om: explicitly selected sm_86/sm_121 cubin ELF packer. note It replaces the body of omega_cubin_pack in src/omega_cubin.c, which stays compiled only behind note CUDAPP_MIGRATION_PENDING_C_CUBIN as the differential oracle (make CUDAPP_CUBIN=c|diff). note note Input (omega_cubin.c packs it): note m: 0 strlen of the name 1 text_len 2 nparams 3 cbank_size 4 gpr_count 5 shared_reserved -note 6 7 unused; from 8 three per parameter: offset, size, is_pointer (only when nparams <= 32) +note 6 target SM (86 or 121; 0 retains historical 121) 7 unused; from 8 parameter triples note nm: the name's first 64 bytes; tx: the text (16777216 bytes, the C limit 1 shl 24) note o: the output image, little-endian words; byte p is bits 8 (p rem 8) of word p / 8 note Result: the image's byte count, or the refusal 1..7 of OMEGA_CUBIN_E_* (an image is never below 8 @@ -23,6 +23,20 @@ const OBYTES ulong 134217728 const MLEN ulong 104 const PBASE ulong 896 +fn parbase m view ulong MLEN to ulong +if eq get m 6 86 +ret 352 +end +ret PBASE +end + +fn smtarget m view ulong MLEN to ulong +if eq get m 6 0 +ret 121 +end +ret get m 6 +end + note one byte into the word image fn pb o edit ulong OWN p ulong v ulong to void k = shr p 3 @@ -127,7 +141,7 @@ end note the parameter walk and the bank checks, in the C order fn pchk m view ulong MLEN o edit ulong OWN to ulong -e = PBASE +e = parbase m np = get m 2 for i ulong np b = add 8 mul i 3 @@ -143,7 +157,7 @@ put o 0 5 put o 2 e ret 4 end -if or gt cb 1024 lt cb PBASE +if or gt cb 1024 lt cb parbase m put o 0 6 ret 4 end @@ -151,6 +165,9 @@ ret 0 end fn chk m view ulong MLEN nm view uchar 64 o edit ulong OWN to ulong +if not or eq smtarget m 86 eq smtarget m 121 +ret 1 +end if eq nmok nm get m 0 0 ret 1 end @@ -247,15 +264,31 @@ end end note ELF header: 0x7f E L F, ELFCLASS64, LSB, version 1, ELFOSABI_NV 0x41 as one word; ABI version 8 -fn whdr o edit ulong OWN l view ulong 16 to void +fn whdr o edit ulong OWN l view ulong 16 m view ulong MLEN to void p64 o 0 4684026196722992511 +if eq smtarget m 86 +pb o 7 51 +end +if eq smtarget m 86 +pb o 8 7 +else pb o 8 8 +end p16 o 16 2 p16 o 18 190 +if eq smtarget m 86 +p32 o 20 130 +else p32 o 20 1 +end p64 o 32 get l 12 p64 o 40 get l 11 +if eq smtarget m 86 +note ELF EF_CUDA_SM86 | EF_CUDA_VIRTUAL_SM86 | 64-bit addressing and unified texture mode. +p32 o 48 or shl ulong 86 16 or shl ulong 5 8 ulong 86 +else p32 o 48 100694274 +end p16 o 52 64 p16 o 54 56 p16 o 56 5 @@ -333,14 +366,14 @@ p16 o p 14084 p16 o add p 2 4 p32 o add p 4 130 q = add p 8 -e = PBASE +e = parbase m np = get m 2 for i ulong np b = add 8 mul i 3 of = get m b p16 o q 5892 p16 o add q 2 12 -p32 o add q 8 or i shl sub of PBASE 16 +p32 o add q 8 or i shl sub of parbase m 16 ty = ulong 1175552 if ne get m add b 2 0 ty = 2225408 @@ -355,13 +388,13 @@ ret e end note the attributes after the parameters, from q -fn wtail o edit ulong OWN q ulong e ulong gpr ulong to void +fn wtail o edit ulong OWN q ulong e ulong gpr ulong base ulong to void p16 o q 6403 -p16 o add q 2 sub e PBASE +p16 o add q 2 sub e base p16 o add q 4 2564 p16 o add q 6 8 p32 o add q 8 3 -p32 o add q 12 or PBASE shl sub e PBASE 16 +p32 o add q 12 or base shl sub e base 16 p16 o add q 16 20483 p16 o add q 20 6915 p16 o add q 22 gpr @@ -373,14 +406,14 @@ p16 o add q 34 4 end note .note.nv.cuinfo: namesz 12, descsz 8, type 0x3e8, "NVIDIA Corp", 2, sm 121, 130 -fn wnote o edit ulong OWN p ulong to void +fn wnote o edit ulong OWN p ulong sm ulong to void p32 o p 12 p32 o add p 4 8 p32 o add p 8 1000 q = ps o add p 12 4836937782729987662 8 q = ps o q 7369327 3 p16 o add p 24 2 -p16 o add p 26 121 +p16 o add p 26 sm p32 o add p 28 130 end @@ -484,12 +517,12 @@ fn winfo o edit ulong OWN l view ulong 16 m view ulong MLEN to void p = get l 8 e = wpar o p m q = add add p 8 mul 16 get m 2 -wtail o q e get m 4 +wtail o q e get m 4 parbase m end note every section payload and both header tables into the zeroed image fn wbody o edit ulong OWN l view ulong 16 m view ulong MLEN nm view uchar 64 tx view uchar TXN to void -whdr o l +whdr o l m n = get m 0 wshs o get l 1 nm n q = pn o add get l 2 1 nm n @@ -498,7 +531,7 @@ wtext o tx get l 4 get m 1 wginfo o get l 6 get m 4 wcompat o get l 7 winfo o l m -wnote o get l 10 +wnote o get l 10 smtarget m wsha o l m wshb o l m wph o l m diff --git a/om/encoder/amp_runtime.om b/om/encoder/amp_runtime.om new file mode 100644 index 00000000..35ae9514 --- /dev/null +++ b/om/encoder/amp_runtime.om @@ -0,0 +1,168 @@ +note SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +note Pure Ampere runtime decisions and QMD serialization. Host ioctls stay in nvrm.c. +note Vendor fields: NVIDIA open-gpu-doc classes/compute/clc7c0qmd.h QMDV03_00. +note m[0] operation: 1 class-set admission, 2 byte reserve admission, 3 QMD. +note Class selection m[1]=rawSM,m[2..3]=vendorSM86/121,m[4..9]=Ampere then Blackwell classes,m[10..11]=presence masks. +note Reserve m[1]=available bytes, m[2]=request bytes, m[3]=reserve bytes. +note QMD m[1..9]=code,cbank,semaphore,threadsX,threadsY,gridX,gridY,registers,sharedBytes. +note q is 64 zero-extended uint words, not a native struct. Return 1 accepted or 0 refused. +fn amp_field q edit ulong 64 lo ulong hi ulong val ulong to void +for bit ulong 64 +if gt add lo bit hi +break +end +idx = div add lo bit 32 +pos = rem add lo bit 32 +v = shl and shr val bit 1 pos +put q idx or get q idx v +end +end +fn amp_runtime m view ulong 16 q edit ulong 64 to ulong +if eq get m 0 1 +if eq get m 1 get m 2 +if ne get m 10 7 +ret 0 +end +put q 0 86 +put q 1 1 +put q 2 get m 4 +put q 3 get m 5 +put q 4 get m 6 +ret 1 +end +if eq get m 1 get m 3 +if ne get m 11 7 +ret 0 +end +put q 0 121 +put q 1 0 +put q 2 get m 7 +put q 3 get m 8 +put q 4 get m 9 +ret 1 +end +ret 0 +end +if eq get m 0 2 +if gt get m 2 get m 1 +ret 0 +end +if lt sub get m 1 get m 2 get m 3 +ret 0 +end +ret 1 +end +if eq get m 0 4 +note Packet admission: target-specific class/PCAS and shared host semaphore/memop. +note m[1]=method bytes, m[2]=count, m[3]=subchannel, m[4]=first payload word. +if eq get m 3 0 +if and eq get m 1 get m 8 eq get m 2 5 +ret 1 +end +if and eq get m 1 get m 9 eq get m 2 4 +ret 1 +end +ret 0 +end +if ne get m 3 1 +ret 0 +end +if ne get m 2 1 +ret 0 +end +if and eq get m 1 0 eq get m 4 get m 5 +ret 1 +end +if eq get m 1 get m 6 +ret 1 +end +if and eq get m 1 get m 10 eq get m 4 get m 11 +ret 1 +end +if and eq get m 1 get m 7 eq get m 4 3 +ret 1 +end +ret 0 +end +if ne get m 0 3 +ret 0 +end +if or eq get m 1 0 ne rem get m 1 128 0 +ret 0 +end +if or ge get m 1 shl ulong 1 49 ge get m 2 shl ulong 1 49 +ret 0 +end +if ne rem get m 2 16 0 +ret 0 +end +if or ge get m 3 shl ulong 1 40 ne and get m 3 15 0 +ret 0 +end +if or eq get m 4 0 eq get m 5 0 +ret 0 +end +if or gt get m 4 1024 gt get m 5 1024 +ret 0 +end +if gt mul get m 4 get m 5 1024 +ret 0 +end +if or eq get m 6 0 eq get m 7 0 +ret 0 +end +if or gt get m 6 2147483647 gt get m 7 65535 +ret 0 +end +if or eq get m 8 0 gt get m 8 255 +ret 0 +end +note NVIDIA Ampere tuning guide sections 1.4.1.1/1.4.2.3: SM86 block max99KiB, carveouts32/64/100KiB. +if gt get m 9 shl ulong 99 10 +ret 0 +end +smem = mul div add get m 9 255 256 256 +cfg = ulong 9 +if gt smem shl ulong 32 10 +cfg = add div ulong 64 4 1 +end +if gt smem shl ulong 64 10 +cfg = add div ulong 100 4 1 +end +for i ulong 64 +put q i 0 +end +note Invalidate shader data/instruction/constant caches. QMD3 uses per-release enable. +amp_field q 189 191 7 +amp_field q 368 369 1 +amp_field q 378 378 1 +amp_field q 384 415 get m 6 +amp_field q 416 431 get m 7 +amp_field q 448 463 1 +amp_field q 544 561 smem +note Hardware carveout encoding: sizeKiB/4+1, matching QMD read-only Mesa oracle. +amp_field q 562 567 cfg +amp_field q 569 574 add div ulong 100 4 1 +amp_field q 576 579 0 +amp_field q 580 583 3 +amp_field q 592 607 get m 4 +amp_field q 608 623 get m 5 +amp_field q 624 639 1 +amp_field q 640 640 1 +amp_field q 648 656 get m 8 +amp_field q 657 662 cfg +amp_field q 763 767 1 +amp_field q 768 799 get m 3 +amp_field q 800 807 shr get m 3 32 +amp_field q 819 819 1 +amp_field q 823 823 1 +amp_field q 830 831 1 +amp_field q 832 863 1 +amp_field q 1024 1055 get m 2 +amp_field q 1056 1072 shr get m 2 32 +amp_field q 1074 1074 1 +amp_field q 1075 1087 shr ulong 4096 4 +amp_field q 1536 1567 get m 1 +amp_field q 1568 1584 shr get m 1 32 +ret 1 +end diff --git a/om/encoder/ampere_enc_sm86.om b/om/encoder/ampere_enc_sm86.om new file mode 100644 index 00000000..728c432a --- /dev/null +++ b/om/encoder/ampere_enc_sm86.om @@ -0,0 +1,609 @@ +note ampere_enc_sm86.om: explicit SM86 encoder; the SM121 encoder is unchanged. +note Input layout matches bw_enc_sm121.om. Global addresses are plain 64-bit registers, +note not Blackwell descriptors. Parameter constants move from byte 896 to byte 352. +note The final preflight validates every operand and instruction before storing any output. +note Native binding compiler SHA256 2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f. +note New opcode constants: Wolfram FromDigits hexadecimal conversion, parent AmperePort receipt. +note SM86 words independently researched with nvdisasm -b SM86, never submitted to a GPU. + +const NEG ulong 9223372036854775808 +const NOPW ulong 31000 +const NOPC ulong 1032192 + +fn put4 w edit ulong 4 a ulong b ulong c ulong d ulong to void +put w 0 a +put w 1 b +put w 2 c +put w 3 d +end + +note the physical register of one operand field: phys + subreg, or dflt when the vreg is negative +fn preg phys view ulong 288 v ulong sb ulong dflt ulong to ulong +if ge v NEG +ret dflt +end +ret add get phys v sb +end + +note 1 when a vreg field is given (not negative), else 0 +fn pres v ulong to ulong +if ge v NEG +ret 0 +end +ret 1 +end + +fn isuld op ulong to bool +ret or eq op 6 eq op 7 +end + +fn param op ulong imm ulong to ulong +if and ge op 4 le op 7 +if ge imm 896 +ret add sub imm 896 352 +end +end +ret imm +end + +fn opnds ins view ulong 8192 i ulong phys view ulong 288 o edit ulong 16 to void +b = mul i 8 +f = get ins add b 7 +put o 0 get ins b +put o 1 preg phys get ins add b 1 and shr f 16 255 0 +put o 2 preg phys get ins add b 2 and shr f 24 255 0 +put o 3 preg phys get ins add b 3 and shr f 32 255 0 +put o 4 preg phys get ins add b 4 and shr f 40 255 255 +u = get ins add b 5 +put o 5 0 +if lt u NEG +put o 5 get phys add u 256 +end +put o 14 pres u +x = get ins add b 6 +put o 6 param get o 0 and x 4294967295 +put o 7 shr x 32 +put o 8 and f 1 +put o 9 and shr f 1 1 +put o 10 and shr f 2 1 +put o 11 and shr f 8 255 +put o 12 pres get ins add b 2 +put o 13 pres get ins add b 3 +d = get ins add b 1 +if and isuld get o 0 lt d NEG +put o 1 get phys add d 256 +end +end + +note the control word: the instruction's own, else the op's default +fn ctl o view ulong 16 dflt ulong to ulong +c = get o 7 +if ne c 0 +ret c +end +ret dflt +end + +note low 8 bits of operand slot k +fn rb o view ulong 16 k ulong to ulong +ret and get o k 255 +end + +note slot k when its vreg (presence slot h) is given, else RZ +fn rz o view ulong 16 k ulong h ulong to ulong +if ne get o h 0 +ret rb o k +end +ret 255 +end + +fn wd o view ulong 16 base ulong to ulong +ret or base shl rb o 1 16 +end + +fn wa o view ulong 16 base ulong to ulong +ret or base shl rb o 2 24 +end + +fn wda o view ulong 16 base ulong to ulong +ret or wd o base shl rb o 2 24 +end + +note the 4-bit guard predicate field: 7 always, 0 @P0, 8 @!P0 +fn pred o view ulong 16 to ulong +if eq get o 9 0 +ret 7 +end +if eq get o 10 0 +ret 0 +end +ret 8 +end + +note a signed 24-bit byte offset (imm read as int32) fits +fn off24 imm ulong to bool +ret or lt imm 8388608 ge imm 4286578688 +end + +note ops 0..14: moves, constants, integer multiply-add, compares and global memory +fn enc_a o view ulong 16 w edit ulong 4 to ulong +op = get o 0 +imm = get o 6 +if eq op 0 +put4 w NOPW 0 0 ctl o NOPC +ret 0 +end +if eq op 1 +put4 w wd o 29186 255 3840 ctl o 1040896 +ret 0 +end +if eq op 2 +put4 w wd o 30722 imm 3840 ctl o 1040896 +ret 0 +end +if eq op 3 +put4 w wd o 31001 0 shl and imm 255 8 ctl o 926208 +ret 0 +end +if eq op 4 +put4 w wd o 4278221698 and shl imm 6 16776960 2048 ctl o 1040896 +ret 0 +end +if eq op 5 +put4 w wd o 4278221698 and shl imm 6 16776960 2560 ctl o 926208 +ret 0 +end +if eq op 6 +put4 w wd o 31417 and shl imm 6 16776960 2048 ctl o 926208 +ret 0 +end +if eq op 7 +put4 w wd o 31417 and shl imm 6 16776960 2560 ctl o 945664 +ret 0 +end +if eq op 8 +if ne get o 13 0 +put4 w wda o 29220 rb o 3 or 126747136 rb o 4 ctl o 2083328 +ret 0 +end +if and ne get o 8 0 ne get o 14 0 +put4 w wda o 31780 rb o 5 or 260964864 rb o 4 ctl o 2083328 +ret 0 +end +put4 w wda o 30756 imm or 126747136 rb o 4 ctl o 2083328 +ret 0 +end +if eq op 9 +put4 w wda o 30757 imm or 126746624 rb o 4 ctl o 2083840 +ret 0 +end +if eq op 10 +if and ne get o 8 0 ne get o 14 0 +put4 w wda o 31756 rb o 5 200302704 ctl o 3136000 +ret 0 +end +put4 w wda o 30732 imm 66085488 ctl o 2087424 +ret 0 +end +if eq op 11 +put4 w wda o 31105 0 203299072 ctl o 991744 +ret 0 +end +if eq op 12 +if not off24 imm +ret 1 +end +put4 w wa o 31110 or rb o 3 shl and imm 16777215 8 202381568 ctl o 1040896 +ret 0 +end +if eq op 13 +put4 w wa o 31110 rb o 3 202447104 ctl o 1040896 +ret 0 +end +if eq op 14 +put4 w wda o 29200 rb o 3 134209791 ctl o 17811968 +ret 0 +end +ret 1 +end + +note ops 15..29: tensor core, shifts, wide and strong loads, stores, fences, atomics +fn enc_b o view ulong 16 w edit ulong 4 to ulong +op = get o 0 +imm = get o 6 +if or eq op 15 eq op 16 +p = ulong 0 +if eq op 16 +p = 262144 +end +put4 w wda o 29244 rb o 3 or or rb o 4 6144 p ctl o 1040896 +ret 0 +end +if eq op 17 +put4 w or wd o 30745 4278190080 imm or 71168 rb o 2 ctl o 2083328 +ret 0 +end +if eq op 18 +put4 w wda o 30738 imm 126796031 ctl o 2083328 +ret 0 +end +if eq op 19 +put4 w wda o 31105 0 203298048 ctl o 991744 +ret 0 +end +if eq op 20 +put4 w wda o 31105 0 203380992 ctl o 991744 +ret 0 +end +if eq op 21 +put4 w wda o 31105 0 203364608 ctl o 991744 +ret 0 +end +if eq op 22 +a = wa o 31110 +if ne get o 9 0 +a = or wa o 2438 shl pred o 12 +end +put4 w a rb o 3 202463488 ctl o 1040896 +ret 0 +end +if eq op 23 +put4 w 31122 0 45056 ctl o 1043456 +ret 0 +end +if eq op 24 +put4 w 31122 0 12288 ctl o 1043456 +ret 0 +end +if eq op 25 +put4 w 4278221199 0 33554432 ctl o 1042432 +ret 0 +end +if eq op 26 +put4 w wda o 31144 rb o 3 136266111 ctl o 3284480 +ret 0 +end +if eq op 27 +put4 w wda o 31144 rb o 3 203374975 ctl o 3284480 +ret 0 +end +if eq op 28 +put4 w wa o 29196 rb o 3 66084976 ctl o 2087424 +ret 0 +end +if eq op 29 +put4 w wda o 29202 rb o 3 126762239 ctl o 2083328 +ret 0 +end +ret 1 +end + +note ops 30..45: floating point, special functions, shuffles, shared memory, exit +fn enc_c o view ulong 16 w edit ulong 4 to ulong +op = get o 0 +imm = get o 6 +if eq op 30 +put4 w wda o 29217 rb o 3 0 ctl o 5227520 +ret 0 +end +if eq op 31 +put4 w wda o 29217 rb o 3 0 ctl o 5227520 +ret 0 +end +if eq op 32 +put4 w wda o 29216 rb o 3 4194304 ctl o 5227520 +ret 0 +end +if eq op 33 +put4 w wda o 29219 rb o 3 rb o 4 ctl o 5227520 +ret 0 +end +if eq op 34 +c = ulong 66084864 +if ne imm 0 +c = imm +end +a = or or 29195 shl and get o 1 7 16 shl rb o 2 24 +put4 w a rb o 3 c ctl o 5227520 +ret 0 +end +if eq op 35 +put4 w wda o 29192 rb o 3 and get o 4 7 ctl o 1034752 +ret 0 +end +if eq op 36 +put4 w wda o 29193 rb o 3 58720256 ctl o 5227520 +ret 0 +end +if eq op 37 +if eq imm 1177681920 +put4 w wda o 29246 rb o 3 4351 ctl o 5227520 +ret 0 +end +put4 w wda o 29193 rb o 3 125829120 ctl o 5227520 +ret 0 +end +if eq op 38 +put4 w wd o 29253 rb o 2 2102272 ctl o 5235200 +ret 0 +end +if eq op 39 +put4 w wd o 29445 rb o 2 2158848 ctl o 5120512 +ret 0 +end +if eq op 40 +put4 w wd o 29448 rb o 2 4096 ctl o 926720 +ret 0 +end +if eq op 41 +put4 w wd o 29448 rb o 2 5120 ctl o 926720 +ret 0 +end +if eq op 42 +a = or 134225664 shl and imm 31 21 +if ne and imm 2147483648 0 +a = or a shl ulong 1 26 +end +put4 w wda o 32649 a 917504 ctl o 926720 +ret 0 +end +if eq op 43 +put4 w wda o 31108 0 and imm 65535 ctl o 1040896 +ret 0 +end +if eq op 44 +put4 w wa o 29576 rb o 3 and imm 65535 ctl o 1040896 +ret 0 +end +if eq op 45 +a = ulong 31053 +if ne get o 9 0 +a = 2381 +end +put4 w a 0 58720256 ctl o 1042944 +ret 0 +end +ret 1 +end + +note op 46: BRA. rel = imm - 1 as int32; low 6 bits at w0 18..23, rel arithmetic-shifted by 6 at w1 bit 2 +fn enc_bra o view ulong 16 w edit ulong 4 to ulong +imm = get o 6 +rel = and sub imm 1 4294967295 +s = shr rel 6 +c = ulong 58720256 +if ge rel 2147483648 +s = or s 4227858432 +c = 58982399 +end +d = get o 7 +if eq d 0 +d = 1042944 +if and eq imm 0 eq get o 9 0 +d = NOPC +end +end +a = or or 2375 shl pred o 12 shl and rel 63 18 +put4 w a and shl s 2 4294967295 c d +ret 0 +end + +note ops 46..59: branches, reconvergence, barriers, wide shared loads, three-source integer ops +fn enc_d o view ulong 16 w edit ulong 4 to ulong +op = get o 0 +imm = get o 6 +bar = get o 11 +if eq op 46 +ret enc_bra o w +end +if eq op 47 +put4 w wd o 29448 rb o 2 2048 ctl o 926720 +ret 0 +end +if eq op 48 +put4 w 31517 0 65536 ctl o 1043456 +ret 0 +end +if eq op 49 +put4 w wda o 31108 255 134219776 ctl o 927744 +ret 0 +end +if eq op 50 +put4 w wa o 31112 rb o 3 134220031 ctl o 1040896 +ret 0 +end +if eq op 51 +a = or or 29202 shl rb o 1 16 shl rz o 2 12 24 +put4 w a rz o 3 13 or or 126746624 shl and imm 255 8 rb o 4 ctl o 2083328 +ret 0 +end +if eq op 52 +a = or or 29209 shl rb o 1 16 shl rz o 2 12 24 +put4 w a rz o 3 13 or 1536 rb o 4 ctl o 2083328 +ret 0 +end +if eq op 53 +a = or or 29223 shl rb o 1 16 shl rz o 2 12 24 +put4 w a rz o 3 13 or 126746624 rb o 4 ctl o 2083328 +ret 0 +end +if eq op 54 +if or or lt imm 2 ge imm 2147483648 ge bar 16 +ret 1 +end +a = or or 2373 shl pred o 12 shl bar 16 +put4 w a and mul sub imm 1 16 4294967295 58720768 ctl o 1040896 +ret 0 +end +if eq op 55 +if ge bar 16 +ret 1 +end +a = or or 2369 shl pred o 12 shl bar 16 +put4 w a 0 58720768 ctl o 1042944 +ret 0 +end +if eq op 56 +if not off24 imm +ret 1 +end +put4 w wda o 31105 shl and imm 16777215 8 203299584 ctl o 991744 +ret 0 +end +if eq op 57 +if not off24 imm +ret 1 +end +put4 w wda o 31105 shl and imm 16777215 8 203300096 ctl o 991744 +ret 0 +end +if eq op 58 +if ge imm 8388608 +ret 1 +end +put4 w wda o 31108 shl and imm 16777215 8 3072 ctl o 1042432 +ret 0 +end +if eq op 59 +put4 w wd o 29448 rb o 2 3072 ctl o 926720 +ret 0 +end +ret 1 +end + +fn enc1 o view ulong 16 w edit ulong 4 to ulong +op = get o 0 +if lt op 15 +ret enc_a o w +end +if lt op 30 +ret enc_b o w +end +if lt op 46 +ret enc_c o w +end +ret enc_d o w +end + +note the 16 bytes of instruction i, each word little-endian +fn store code edit uchar 16384 i ulong w view ulong 4 to void +for k ulong 4 +x = get w k +q = add mul i 16 mul k 4 +for j ulong 4 +put code add q j uchar and shr x mul j 8 255 +end +end +end + +note Full preflight: no destination byte changes on any refusal, including a late opcode. +fn valid ins view ulong 8192 phys view ulong 288 i ulong to bool +b = mul i 8 +op = get ins b +f = get ins add b 7 +imm = and get ins add b 6 4294967295 +if gt op 59 +ret false +end +note Blackwell native FP8 QMMA and FP8 pack have no SM86 instruction. +if and eq op 16 eq imm 1362114610 +ret false +end +if and eq op 37 eq imm 1178940467 +ret false +end +if and ge op 4 le op 7 +if or ge imm 65536 ne rem imm 4 0 +ret false +end +end +if or or eq op 12 eq op 56 eq op 57 +if not off24 imm +ret false +end +end +if and eq op 58 ge imm 8388608 +ret false +end +if and eq op 54 or lt imm 2 ge imm 2147483648 +ret false +end +if and or eq op 54 eq op 55 ge and shr f 8 255 16 +ret false +end +for j ulong 4 +v = get ins add add b 1 j +if lt v NEG +sb = and shr f add 16 mul j 8 255 +if and eq j 0 or eq op 6 eq op 7 +if ge v 32 +ret false +end +p = get phys add v 256 +if or ge p 64 ge add p sb 64 +ret false +end +else +if ge v 256 +ret false +end +p = get phys v +if or ge p 255 ge add p sb 255 +ret false +end +end +end +end +u = get ins add b 5 +if lt u NEG +if ge u 32 +ret false +end +if ge get phys add u 256 64 +ret false +end +end +ret true +end + +fn isdesc o view ulong 16 to bool +ret and eq get o 0 7 eq get o 6 856 +end + +fn ampere_enc_sm86 ins view ulong 8192 phys view ulong 288 n ulong pad ulong code edit uchar 16384 to ulong +o = new ulong 16 0 +w = new ulong 4 0 +if gt n 1024 +ret 0 +end +for i ulong n +if not valid ins phys i +ret 0 +end +end +cnt = n +if ne pad 0 +cnt = mul div add n 7 8 8 +if lt cnt 32 +cnt = 32 +end +end +for i ulong cnt +if lt i n +opnds ins i phys edit o +note Blackwell descriptor preamble is unused by Ampere memory instructions +note Keep its slot for branch deltas but do not read beyond CB0 +if isdesc view o +put4 edit w NOPW 0 0 NOPC +else +if ne enc1 view o edit w 0 +ret 0 +end +end +else +put4 edit w NOPW 0 0 NOPC +end +store code i view w +end +ret mul cnt 16 +end diff --git a/om/encoder/bw_enc_sm121.om b/om/encoder/bw_enc_sm121.om index 4c17bec4..5a09168c 100644 --- a/om/encoder/bw_enc_sm121.om +++ b/om/encoder/bw_enc_sm121.om @@ -45,6 +45,11 @@ end ret 1 end +note Only constant loads have uniform destinations; IMAD uses is_uniform for its source. +fn isuld op ulong to bool +ret or eq op 6 eq op 7 +end + fn opnds ins view ulong 8192 i ulong phys view ulong 288 o edit ulong 16 to void b = mul i 8 f = get ins add b 7 @@ -69,7 +74,7 @@ put o 11 and shr f 8 255 put o 12 pres get ins add b 2 put o 13 pres get ins add b 3 d = get ins add b 1 -if and eq and f 1 1 lt d NEG +if and isuld get o 0 lt d NEG put o 1 get phys add d 256 end end diff --git a/om/omega-bridge.lock b/om/omega-bridge.lock index 3eaa85d2..9f7e3895 100644 --- a/om/omega-bridge.lock +++ b/om/omega-bridge.lock @@ -1,2 +1,3 @@ -# omega-bridge commit whose src/native.om generates src/cudapp_om_units.c, cudapp_native.h (om/units.sh pins its sha256) -431fff0a95f84c0a8bf9d3383f94d7e1f02d913e +# omega-bridge seeded-portable-1 converter; src/toc.om + src/seeded.om. +# Draft omega-bridge#36; seed sha256 is checked by om/units.sh and the converter. +dfd8393aa3d4a67280349921c479b8dd52f88e58 diff --git a/om/units.sh b/om/units.sh index ea3f830e..eefe6da3 100755 --- a/om/units.sh +++ b/om/units.sh @@ -1,40 +1,64 @@ #!/bin/sh -# Regenerate the C binding of every Omega unit linked into the hosted CUDA++ build (UNITS below), or -# with --check confirm the committed files are exactly what the pinned tools produce (exit 1 on any -# difference, 3 NOT_RUN without the tools). Same pattern and pins as aien-dev/omega-mv om/units.sh. -# OMEGA_OMC seed-born omc (aien-dev/omega-mv seed/out/omc), sha256 pinned below -# OMEGA_BRIDGE an aien-dev/omega-bridge checkout at om/omega-bridge.lock; src/native.om sha256 pinned below -# Generated by the bridge's src/native.om (omega-bridge docs/NATIVE-ABI.md, ABI v1, OM-1 units): -# src/cudapp_om_units.c every unit's machine code, byte for byte as omc wrote it, and its binding -# src/cudapp_native.h the bindings' declarations -# src/cudapp_om_units.ident each unit's identity: source sha256, compiler pin, ABI, profile -# A unit or compiler that changes without regenerating these files fails --check (make test-om-units). +# Generate architecture-independent checked C from the seeded Omega units. +# The additive bridge-seeded frontend checks exactly the same source bytes with +# omega-mv@e5b32567 before emitting C. No C oracle replaces an Omega unit. +# Generation runs on AArch64; the committed GNU C11/POSIX output builds and +# runs natively on x86-64 without Omega binaries, emulation or GPU access. +# OMEGA_OMC: pinned seeded compiler; OMEGA_BRIDGE: converter extension checkout. +# --check compares every generated TU, declaration and source-to-C identity. set -eu OMC_PIN=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f -NATIVE_PIN=c77a5922f91d53d4a0bbd4e7b1c4703f7098263abc843be2918db1ece7496782 +CONVERTER_PIN=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b +FRONTEND_PIN=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 ROOT=$(cd "$(dirname "$0")/.." && pwd) -UNITS="${OMEGA_UNITS:-om/encoder/bw_enc_sm121.om om/cubin/cubin_elf.om}" -OUTS="cudapp_om_units.c cudapp_native.h cudapp_om_units.ident" +UNITS="${OMEGA_UNITS:-om/encoder/bw_enc_sm121.om om/cubin/cubin_elf.om om/encoder/ampere_enc_sm86.om om/encoder/amp_runtime.om}" DEST="${OMEGA_UNITS_DEST:-$ROOT/src}" +OUTS="cudapp_native.h cudapp_om_units.ident" [ -n "${OMEGA_OMC:-}" ] && [ -n "${OMEGA_BRIDGE:-}" ] || { echo "NOT_RUN: set OMEGA_OMC and OMEGA_BRIDGE"; exit 3; } [ "$(sha256sum < "$OMEGA_OMC" | cut -c1-64)" = "$OMC_PIN" ] || { echo "NOT_RUN: omc is not the pinned compiler"; exit 3; } -[ "$(sha256sum < "$OMEGA_BRIDGE/src/native.om" | cut -c1-64)" = "$NATIVE_PIN" ] || { echo "NOT_RUN: native.om is not the pinned generator"; exit 3; } +[ "$(sha256sum < "$OMEGA_BRIDGE/src/toc.om" | cut -c1-64)" = "$CONVERTER_PIN" ] || { echo "NOT_RUN: toc.om is not the pinned converter"; exit 3; } +[ "$(sha256sum < "$OMEGA_BRIDGE/tools/bridge-seeded" | cut -c1-64)" = "$FRONTEND_PIN" ] || { echo "NOT_RUN: bridge-seeded is not the pinned frontend"; exit 3; } T=$(mktemp -d); trap 'rm -rf "$T"' EXIT -"$OMEGA_OMC" < "$OMEGA_BRIDGE/src/native.om" > "$T/native"; chmod +x "$T/native" -: > "$T/units.in"; : > "$T/cudapp_om_units.ident" +cat > "$T/cudapp_native.h" <<'HEADER' +/* Generated checked portable Omega declarations. Regenerate with om/units.sh. + * Status: 0 done, 1..14 trap, 32 argument refused, 33 reentry. + * Only a successful call writes result. Views use exact declared lengths. + * Implementation is Omega lowered by omega-bridge, not the native AArch64 ABI. */ +#ifndef CUDAPP_PORTABLE_OMEGA_H +#define CUDAPP_PORTABLE_OMEGA_H +#include +#ifdef __cplusplus +extern "C" { +#endif +#define OMEGA_OK 0u +#define OMEGA_BAD_ARG 32u +#define OMEGA_REENTRY 33u +HEADER +: > "$T/cudapp_om_units.ident" for u in $UNITS; do case "$u" in /*) src=$u ;; *) src=$ROOT/$u ;; esac name=$(basename "$u" .om | tr -c 'A-Za-z0-9_\n' '_') - "$OMEGA_OMC" < "$src" > "$T/u.bin" - { cat "$src"; printf '\0'; printf '%08d' "$(wc -c < "$T/u.bin")"; cat "$T/u.bin"; } >> "$T/units.in" - echo "omega-ident 1 unit=$name abi=1 profile=OM-1 src=$(sha256sum < "$src" | cut -c1-64) omc=$OMC_PIN path=$u" >> "$T/cudapp_om_units.ident" + cp "$src" "$T/$name.om" + src="$T/$name.om" + file=cudapp_om_$name.c + OMEGA_SEEDED_OMC="$OMEGA_OMC" sh "$OMEGA_BRIDGE/tools/bridge-seeded" c "$src" > "$T/$file" + OMEGA_SEEDED_OMC="$OMEGA_OMC" sh "$OMEGA_BRIDGE/tools/bridge-seeded" h "$src" >> "$T/cudapp_native.h" + identity="omega-ident 2 unit=$name abi=portable-seeded-1 src=$(sha256sum < "$src" | cut -c1-64) c=$(sha256sum < "$T/$file" | cut -c1-64) omc=$OMC_PIN converter=$CONVERTER_PIN frontend=$FRONTEND_PIN path=$u" + printf '%s\n' "$identity" > "$T/cudapp_om_$name.ident" + printf '%s\n' "$identity" >> "$T/cudapp_om_units.ident" + OUTS="$OUTS $file cudapp_om_$name.ident" done -"$T/native" c < "$T/units.in" > "$T/cudapp_om_units.c" -"$T/native" h < "$T/units.in" > "$T/cudapp_native.h" +cat >> "$T/cudapp_native.h" <<'HEADER' +#ifdef __cplusplus +} +#endif +#endif +HEADER if [ "${1:-}" = --check ]; then bad=0 - for f in $OUTS; do cmp -s "$T/$f" "$DEST/$f" || { echo "FAIL src/$f differs from the pinned tools' output"; bad=1; }; done - [ $bad = 0 ] || exit 1 - echo "PASS src/{$(echo $OUTS | tr ' ' ,)} regenerate byte for byte"; exit 0 + for f in $OUTS; do cmp -s "$T/$f" "$DEST/$f" || { echo "FAIL $DEST/$f differs from pinned tools"; bad=1; }; done + [ "$bad" = 0 ] || exit 1 + echo "PASS portable Omega units regenerate byte for byte"; exit 0 fi -for f in $OUTS; do cp "$T/$f" "$DEST/$f"; done; echo "wrote $DEST/{$(echo $OUTS | tr ' ' ,)}" +for f in $OUTS; do cp "$T/$f" "$DEST/$f"; done +echo "wrote checked portable Omega units to $DEST" diff --git a/src/cudapp_native.h b/src/cudapp_native.h index 840996be..72577aab 100644 --- a/src/cudapp_native.h +++ b/src/cudapp_native.h @@ -1,11 +1,9 @@ -/* Generated by omega-bridge src/native.om: native call ABI v1 (docs/NATIVE-ABI.md). - * C and C++ declarations for libomega_native. Regenerate it; do not edit it. - * Status: 0 done; 1..14 the Omega trap code; 32 argument refused (null, wrong length, misaligned, - * overlap); 33 reentry; 34 bad runtime entry; 35 no stack. The result is written only on status 0. - * A long is its two's-complement bits; an array is its address then its element count. - * Parameter names carry o_ so no language's reserved words collide. */ -#ifndef OMEGA_NATIVE_H -#define OMEGA_NATIVE_H +/* Generated checked portable Omega declarations. Regenerate with om/units.sh. + * Status: 0 done, 1..14 trap, 32 argument refused, 33 reentry. + * Only a successful call writes result. Views use exact declared lengths. + * Implementation is Omega lowered by omega-bridge, not the native AArch64 ABI. */ +#ifndef CUDAPP_PORTABLE_OMEGA_H +#define CUDAPP_PORTABLE_OMEGA_H #include #ifdef __cplusplus extern "C" { @@ -13,12 +11,10 @@ extern "C" { #define OMEGA_OK 0u #define OMEGA_BAD_ARG 32u #define OMEGA_REENTRY 33u -#define OMEGA_BAD_RT 34u -#define OMEGA_NO_STACK 35u -/* fn bw_enc_sm121 ins view ulong 8192 phys view ulong 288 n ulong pad ulong code edit uchar 16384 to ulong */ -uint32_t omega_bw_enc_sm121(uint64_t *result, const void *o_ins, uint64_t o_ins_len, const void *o_phys, uint64_t o_phys_len, uint64_t o_n, uint64_t o_pad, void *o_code, uint64_t o_code_len); -/* fn cubin_elf m view ulong 104 nm view uchar 64 tx view uchar 16777216 o edit ulong 16777216 to ulong */ -uint32_t omega_cubin_elf(uint64_t *result, const void *o_m, uint64_t o_m_len, const void *o_nm, uint64_t o_nm_len, const void *o_tx, uint64_t o_tx_len, void *o_o, uint64_t o_o_len); +uint32_t omega_bw_enc_sm121(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, uint64_t p2, uint64_t p3, void *p4, uint64_t p4_n); +uint32_t omega_cubin_elf(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, const void *p2, uint64_t p2_n, void *p3, uint64_t p3_n); +uint32_t omega_ampere_enc_sm86(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, uint64_t p2, uint64_t p3, void *p4, uint64_t p4_n); +uint32_t omega_amp_runtime(uint64_t *result, const void *p0, uint64_t p0_n, void *p1, uint64_t p1_n); #ifdef __cplusplus } #endif diff --git a/src/cudapp_om_amp_runtime.c b/src/cudapp_om_amp_runtime.c new file mode 100644 index 00000000..383597f8 --- /dev/null +++ b/src/cudapp_om_amp_runtime.c @@ -0,0 +1,222 @@ +#if defined(__GNUC__) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-function" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wmisleading-indentation" +#endif +/* Emitted by Omega Bridge. GNU C11, POSIX. Scalars use canonical 64-bit bits. */ +#include +#include +#include +#include +#include +static _Thread_local jmp_buf o_jmp; +static _Thread_local int o_busy; +static __attribute__((noreturn)) void o_trap(int c){if(o_busy)longjmp(o_jmp,c);_exit(100+c);} +static _Thread_local unsigned o_depth; +static void o_enter(void){if(++o_depth>128)o_trap(6);} +static uint64_t o_leave(uint64_t v){--o_depth;return v;} +static unsigned o_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} +static __int128 o_value(unsigned t,uint64_t v){return t>=6 && v>>63 ? (__int128)v-(((__int128)1)<<64):(__int128)v;} +static uint64_t o_norm(unsigned t,__int128 v,int code){unsigned w=o_width(t);if(t>=6){__int128 m=((__int128)1)<<(w-1);if(v< -m||v>=m)o_trap(code);}else {if(v<0||(__uint128_t)v>=(((__uint128_t)1)<=6&&op<=11){switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}} + if(op==12)return a&b;if(op==13)return a|b;if(op==14)return a^b; + if(op==15||op==16){if(b>=w)o_trap(7);if(op==15)return t>=6?o_norm(t,x*(((__int128)1)<>b;if(!b)return a;return (a>>b)|((a>>63)?(UINT64_MAX<<(64-b)):0);} + if(op==17){if(t<6)return (0-a)&mask;return o_norm(t,-x,1);}if(op==18)return t==1?!a:(t>=6?~a:(~a)&mask); + if(op==4||op==5){if(!b)o_trap(2);z=op==4?x/y:x%y;return t>=6?o_norm(t,z,1):(uint64_t)z;} + if(t<6){if(op==1)return (a+b)&mask;if(op==2)return (a-b)&mask;return (a*b)&mask;} + if(op==1)z=x+y;if(op==2)z=x-y;if(op==3)z=x*y;return o_norm(t,z,1); +} +static uint64_t o_get(const void *p,uint64_t n,uint64_t i,unsigned t){if(i>=n)o_trap(3);switch(t){case 2:return ((const uint8_t*)p)[i];case 3:return ((const uint16_t*)p)[i];case 4:return ((const uint32_t*)p)[i];case 5:return ((const uint64_t*)p)[i];case 6:return (uint64_t)((const int8_t*)p)[i];case 7:return (uint64_t)((const int16_t*)p)[i];case 8:return (uint64_t)((const int32_t*)p)[i];default:return (uint64_t)((const int64_t*)p)[i];}} +static void o_put(void *p,uint64_t n,uint64_t i,uint64_t v,unsigned t){if(i>=n)o_trap(3);o_norm(t,o_value(t,v),5);switch(t){case 2:((uint8_t*)p)[i]=(uint8_t)v;break;case 3:((uint16_t*)p)[i]=(uint16_t)v;break;case 4:((uint32_t*)p)[i]=(uint32_t)v;break;case 5:((uint64_t*)p)[i]=v;break;case 6:((int8_t*)p)[i]=(int8_t)o_value(t,v);break;case 7:((int16_t*)p)[i]=(int16_t)o_value(t,v);break;case 8:((int32_t*)p)[i]=(int32_t)o_value(t,v);break;default:((int64_t*)p)[i]=(int64_t)o_value(t,v);}} +static void o_fill(void *p,uint64_t n,uint64_t v,unsigned t){for(uint64_t i=0;in||len>n-off)o_trap(3);int f=(int)o_value(8,fd);ssize_t r=op==1?read(f,(uint8_t*)p+off,(size_t)len):write(f,(const uint8_t*)p+off,(size_t)len);return r<0?(uint64_t)(-(int64_t)errno):(uint64_t)r;} +static int o_valid(unsigned t,uint64_t v){unsigned w=o_width(t);__int128 x=o_value(t,v);__int128 m=((__int128)1)<<(t>=6?w-1:w);return t>=6?x>=-m&&x=0&&x +#include +#include +#include +#include +static _Thread_local jmp_buf o_jmp; +static _Thread_local int o_busy; +static __attribute__((noreturn)) void o_trap(int c){if(o_busy)longjmp(o_jmp,c);_exit(100+c);} +static _Thread_local unsigned o_depth; +static void o_enter(void){if(++o_depth>128)o_trap(6);} +static uint64_t o_leave(uint64_t v){--o_depth;return v;} +static unsigned o_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} +static __int128 o_value(unsigned t,uint64_t v){return t>=6 && v>>63 ? (__int128)v-(((__int128)1)<<64):(__int128)v;} +static uint64_t o_norm(unsigned t,__int128 v,int code){unsigned w=o_width(t);if(t>=6){__int128 m=((__int128)1)<<(w-1);if(v< -m||v>=m)o_trap(code);}else {if(v<0||(__uint128_t)v>=(((__uint128_t)1)<=6&&op<=11){switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}} + if(op==12)return a&b;if(op==13)return a|b;if(op==14)return a^b; + if(op==15||op==16){if(b>=w)o_trap(7);if(op==15)return t>=6?o_norm(t,x*(((__int128)1)<>b;if(!b)return a;return (a>>b)|((a>>63)?(UINT64_MAX<<(64-b)):0);} + if(op==17){if(t<6)return (0-a)&mask;return o_norm(t,-x,1);}if(op==18)return t==1?!a:(t>=6?~a:(~a)&mask); + if(op==4||op==5){if(!b)o_trap(2);z=op==4?x/y:x%y;return t>=6?o_norm(t,z,1):(uint64_t)z;} + if(t<6){if(op==1)return (a+b)&mask;if(op==2)return (a-b)&mask;return (a*b)&mask;} + if(op==1)z=x+y;if(op==2)z=x-y;if(op==3)z=x*y;return o_norm(t,z,1); +} +static uint64_t o_get(const void *p,uint64_t n,uint64_t i,unsigned t){if(i>=n)o_trap(3);switch(t){case 2:return ((const uint8_t*)p)[i];case 3:return ((const uint16_t*)p)[i];case 4:return ((const uint32_t*)p)[i];case 5:return ((const uint64_t*)p)[i];case 6:return (uint64_t)((const int8_t*)p)[i];case 7:return (uint64_t)((const int16_t*)p)[i];case 8:return (uint64_t)((const int32_t*)p)[i];default:return (uint64_t)((const int64_t*)p)[i];}} +static void o_put(void *p,uint64_t n,uint64_t i,uint64_t v,unsigned t){if(i>=n)o_trap(3);o_norm(t,o_value(t,v),5);switch(t){case 2:((uint8_t*)p)[i]=(uint8_t)v;break;case 3:((uint16_t*)p)[i]=(uint16_t)v;break;case 4:((uint32_t*)p)[i]=(uint32_t)v;break;case 5:((uint64_t*)p)[i]=v;break;case 6:((int8_t*)p)[i]=(int8_t)o_value(t,v);break;case 7:((int16_t*)p)[i]=(int16_t)o_value(t,v);break;case 8:((int32_t*)p)[i]=(int32_t)o_value(t,v);break;default:((int64_t*)p)[i]=(int64_t)o_value(t,v);}} +static void o_fill(void *p,uint64_t n,uint64_t v,unsigned t){for(uint64_t i=0;in||len>n-off)o_trap(3);int f=(int)o_value(8,fd);ssize_t r=op==1?read(f,(uint8_t*)p+off,(size_t)len):write(f,(const uint8_t*)p+off,(size_t)len);return r<0?(uint64_t)(-(int64_t)errno):(uint64_t)r;} +static int o_valid(unsigned t,uint64_t v){unsigned w=o_width(t);__int128 x=o_value(t,v);__int128 m=((__int128)1)<<(t>=6?w-1:w);return t>=6?x>=-m&&x=0&&x=16777216)o_trap(4); +if(({uint64_t _a=({uint64_t p2=v7;f21(v0, v0_n, v1, v1_n, p2);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +return o_leave(0ULL); +} +} +} +uint64_t __attribute__((unused)) v7=v2; +if(({uint64_t _a=v3;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +v7=({uint64_t _a=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=7ULL;o_op(1, 5, _a,_b);});uint64_t _b=8ULL;o_op(4, 5, _a,_b);});uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); +if(({uint64_t _a=v7;uint64_t _b=32ULL;o_op(8, 5, _a,_b);})){ +v7=32ULL; +} +} +{ +uint64_t v8=0; +uint64_t c1=0; +for(;o_op(8,5, v8, v7);v8=o_op(1,5, v8,1)){ +if(c1++>=16777216)o_trap(4); +if(({uint64_t _a=v8;uint64_t _b=v2;o_op(8, 5, _a,_b);})){ +({uint64_t p1=v8;f5(v0, v0_n, p1, v1, v1_n, v5, v5_n);}); +if(({f22(v5, v5_n);})){ +({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;f0(v6, v6_n, p1, p2, p3, p4);}); +}else{ +if(({uint64_t _a=({f19(v5, v5_n, v6, v6_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +return o_leave(0ULL); +} +} +}else{ +({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;f0(v6, v6_n, p1, p2, p3, p4);}); +} +({uint64_t p1=v8;f20(v4, v4_n, p1, v6, v6_n);}); +} +} +return o_leave(({uint64_t _a=v7;uint64_t _b=16ULL;o_op(3, 5, _a,_b);})); +} +uint32_t omega_ampere_enc_sm86(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, uint64_t p2, uint64_t p3, void *p4, uint64_t p4_n){ +if(!o_buf(result,1,1,5))return 32; +if(!o_buf(p0, p0_n,8192, 5))return 32; +if(o_overlap(result,8,p0, p0_n*8))return 32; +if(!o_buf(p1, p1_n,288, 5))return 32; +if(o_overlap(result,8,p1, p1_n*8))return 32; +if(!o_valid(5, p2))return 32; +if(!o_valid(5, p3))return 32; +if(!o_buf(p4, p4_n,16384, 2))return 32; +if(o_overlap(result,8,p4, p4_n*1))return 32; +if(o_overlap(p4, p4_n*1, p0, p0_n*8))return 32; +if(o_overlap(p4, p4_n*1, p1, p1_n*8))return 32; +if(o_busy)return 33; +o_busy=1;o_depth=0;int code=setjmp(o_jmp); +if(!code)*result=f23(p0, p0_n, p1, p1_n, p2, p3, p4, p4_n); +o_busy=0;o_depth=0;return (uint32_t)code; +} +#if defined(__GNUC__) +#pragma GCC diagnostic pop +#endif diff --git a/src/cudapp_om_ampere_enc_sm86.ident b/src/cudapp_om_ampere_enc_sm86.ident new file mode 100644 index 00000000..5ec192be --- /dev/null +++ b/src/cudapp_om_ampere_enc_sm86.ident @@ -0,0 +1 @@ +omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=7b3d08840f141c8b16e31603aa1051fcc0517a8f9f67798287ee177222654145 c=1ef525ed7fc17d536afebd7349cd0682750ce77e376de24c24ccb61cace54e5e omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om diff --git a/src/cudapp_om_bw_enc_sm121.c b/src/cudapp_om_bw_enc_sm121.c new file mode 100644 index 00000000..8fb87320 --- /dev/null +++ b/src/cudapp_om_bw_enc_sm121.c @@ -0,0 +1,583 @@ +#if defined(__GNUC__) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-function" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wmisleading-indentation" +#endif +/* Emitted by Omega Bridge. GNU C11, POSIX. Scalars use canonical 64-bit bits. */ +#include +#include +#include +#include +#include +static _Thread_local jmp_buf o_jmp; +static _Thread_local int o_busy; +static __attribute__((noreturn)) void o_trap(int c){if(o_busy)longjmp(o_jmp,c);_exit(100+c);} +static _Thread_local unsigned o_depth; +static void o_enter(void){if(++o_depth>128)o_trap(6);} +static uint64_t o_leave(uint64_t v){--o_depth;return v;} +static unsigned o_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} +static __int128 o_value(unsigned t,uint64_t v){return t>=6 && v>>63 ? (__int128)v-(((__int128)1)<<64):(__int128)v;} +static uint64_t o_norm(unsigned t,__int128 v,int code){unsigned w=o_width(t);if(t>=6){__int128 m=((__int128)1)<<(w-1);if(v< -m||v>=m)o_trap(code);}else {if(v<0||(__uint128_t)v>=(((__uint128_t)1)<=6&&op<=11){switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}} + if(op==12)return a&b;if(op==13)return a|b;if(op==14)return a^b; + if(op==15||op==16){if(b>=w)o_trap(7);if(op==15)return t>=6?o_norm(t,x*(((__int128)1)<>b;if(!b)return a;return (a>>b)|((a>>63)?(UINT64_MAX<<(64-b)):0);} + if(op==17){if(t<6)return (0-a)&mask;return o_norm(t,-x,1);}if(op==18)return t==1?!a:(t>=6?~a:(~a)&mask); + if(op==4||op==5){if(!b)o_trap(2);z=op==4?x/y:x%y;return t>=6?o_norm(t,z,1):(uint64_t)z;} + if(t<6){if(op==1)return (a+b)&mask;if(op==2)return (a-b)&mask;return (a*b)&mask;} + if(op==1)z=x+y;if(op==2)z=x-y;if(op==3)z=x*y;return o_norm(t,z,1); +} +static uint64_t o_get(const void *p,uint64_t n,uint64_t i,unsigned t){if(i>=n)o_trap(3);switch(t){case 2:return ((const uint8_t*)p)[i];case 3:return ((const uint16_t*)p)[i];case 4:return ((const uint32_t*)p)[i];case 5:return ((const uint64_t*)p)[i];case 6:return (uint64_t)((const int8_t*)p)[i];case 7:return (uint64_t)((const int16_t*)p)[i];case 8:return (uint64_t)((const int32_t*)p)[i];default:return (uint64_t)((const int64_t*)p)[i];}} +static void o_put(void *p,uint64_t n,uint64_t i,uint64_t v,unsigned t){if(i>=n)o_trap(3);o_norm(t,o_value(t,v),5);switch(t){case 2:((uint8_t*)p)[i]=(uint8_t)v;break;case 3:((uint16_t*)p)[i]=(uint16_t)v;break;case 4:((uint32_t*)p)[i]=(uint32_t)v;break;case 5:((uint64_t*)p)[i]=v;break;case 6:((int8_t*)p)[i]=(int8_t)o_value(t,v);break;case 7:((int16_t*)p)[i]=(int16_t)o_value(t,v);break;case 8:((int32_t*)p)[i]=(int32_t)o_value(t,v);break;default:((int64_t*)p)[i]=(int64_t)o_value(t,v);}} +static void o_fill(void *p,uint64_t n,uint64_t v,unsigned t){for(uint64_t i=0;in||len>n-off)o_trap(3);int f=(int)o_value(8,fd);ssize_t r=op==1?read(f,(uint8_t*)p+off,(size_t)len):write(f,(const uint8_t*)p+off,(size_t)len);return r<0?(uint64_t)(-(int64_t)errno):(uint64_t)r;} +static int o_valid(unsigned t,uint64_t v){unsigned w=o_width(t);__int128 x=o_value(t,v);__int128 m=((__int128)1)<<(t>=6?w-1:w);return t>=6?x>=-m&&x=0&&x=16777216)o_trap(4); +if(({uint64_t _a=v8;uint64_t _b=v2;o_op(8, 5, _a,_b);})){ +({uint64_t p1=v8;f4(v0, v0_n, p1, v1, v1_n, v5, v5_n);}); +if(({uint64_t _a=({f18(v5, v5_n, v6, v6_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +return o_leave(0ULL); +} +}else{ +({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;f0(v6, v6_n, p1, p2, p3, p4);}); +} +({uint64_t p1=v8;f19(v4, v4_n, p1, v6, v6_n);}); +} +} +return o_leave(({uint64_t _a=v7;uint64_t _b=16ULL;o_op(3, 5, _a,_b);})); +} +uint32_t omega_bw_enc_sm121(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, uint64_t p2, uint64_t p3, void *p4, uint64_t p4_n){ +if(!o_buf(result,1,1,5))return 32; +if(!o_buf(p0, p0_n,8192, 5))return 32; +if(o_overlap(result,8,p0, p0_n*8))return 32; +if(!o_buf(p1, p1_n,288, 5))return 32; +if(o_overlap(result,8,p1, p1_n*8))return 32; +if(!o_valid(5, p2))return 32; +if(!o_valid(5, p3))return 32; +if(!o_buf(p4, p4_n,16384, 2))return 32; +if(o_overlap(result,8,p4, p4_n*1))return 32; +if(o_overlap(p4, p4_n*1, p0, p0_n*8))return 32; +if(o_overlap(p4, p4_n*1, p1, p1_n*8))return 32; +if(o_busy)return 33; +o_busy=1;o_depth=0;int code=setjmp(o_jmp); +if(!code)*result=f20(p0, p0_n, p1, p1_n, p2, p3, p4, p4_n); +o_busy=0;o_depth=0;return (uint32_t)code; +} +#if defined(__GNUC__) +#pragma GCC diagnostic pop +#endif diff --git a/src/cudapp_om_bw_enc_sm121.ident b/src/cudapp_om_bw_enc_sm121.ident new file mode 100644 index 00000000..4b83804f --- /dev/null +++ b/src/cudapp_om_bw_enc_sm121.ident @@ -0,0 +1 @@ +omega-ident 2 unit=bw_enc_sm121 abi=portable-seeded-1 src=675f92514e2b0ee9b147e4f2ee159f94c632c14b5fae1dac85249bb537959a38 c=a500db18e6d197dbd1f45eb2ae8e6a2e5161fd219458275209b220e8a7be505d omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/bw_enc_sm121.om diff --git a/src/cudapp_om_cubin_elf.c b/src/cudapp_om_cubin_elf.c new file mode 100644 index 00000000..230770a1 --- /dev/null +++ b/src/cudapp_om_cubin_elf.c @@ -0,0 +1,681 @@ +#if defined(__GNUC__) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-function" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wmisleading-indentation" +#endif +/* Emitted by Omega Bridge. GNU C11, POSIX. Scalars use canonical 64-bit bits. */ +#include +#include +#include +#include +#include +static _Thread_local jmp_buf o_jmp; +static _Thread_local int o_busy; +static __attribute__((noreturn)) void o_trap(int c){if(o_busy)longjmp(o_jmp,c);_exit(100+c);} +static _Thread_local unsigned o_depth; +static void o_enter(void){if(++o_depth>128)o_trap(6);} +static uint64_t o_leave(uint64_t v){--o_depth;return v;} +static unsigned o_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} +static __int128 o_value(unsigned t,uint64_t v){return t>=6 && v>>63 ? (__int128)v-(((__int128)1)<<64):(__int128)v;} +static uint64_t o_norm(unsigned t,__int128 v,int code){unsigned w=o_width(t);if(t>=6){__int128 m=((__int128)1)<<(w-1);if(v< -m||v>=m)o_trap(code);}else {if(v<0||(__uint128_t)v>=(((__uint128_t)1)<=6&&op<=11){switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}} + if(op==12)return a&b;if(op==13)return a|b;if(op==14)return a^b; + if(op==15||op==16){if(b>=w)o_trap(7);if(op==15)return t>=6?o_norm(t,x*(((__int128)1)<>b;if(!b)return a;return (a>>b)|((a>>63)?(UINT64_MAX<<(64-b)):0);} + if(op==17){if(t<6)return (0-a)&mask;return o_norm(t,-x,1);}if(op==18)return t==1?!a:(t>=6?~a:(~a)&mask); + if(op==4||op==5){if(!b)o_trap(2);z=op==4?x/y:x%y;return t>=6?o_norm(t,z,1):(uint64_t)z;} + if(t<6){if(op==1)return (a+b)&mask;if(op==2)return (a-b)&mask;return (a*b)&mask;} + if(op==1)z=x+y;if(op==2)z=x-y;if(op==3)z=x*y;return o_norm(t,z,1); +} +static uint64_t o_get(const void *p,uint64_t n,uint64_t i,unsigned t){if(i>=n)o_trap(3);switch(t){case 2:return ((const uint8_t*)p)[i];case 3:return ((const uint16_t*)p)[i];case 4:return ((const uint32_t*)p)[i];case 5:return ((const uint64_t*)p)[i];case 6:return (uint64_t)((const int8_t*)p)[i];case 7:return (uint64_t)((const int16_t*)p)[i];case 8:return (uint64_t)((const int32_t*)p)[i];default:return (uint64_t)((const int64_t*)p)[i];}} +static void o_put(void *p,uint64_t n,uint64_t i,uint64_t v,unsigned t){if(i>=n)o_trap(3);o_norm(t,o_value(t,v),5);switch(t){case 2:((uint8_t*)p)[i]=(uint8_t)v;break;case 3:((uint16_t*)p)[i]=(uint16_t)v;break;case 4:((uint32_t*)p)[i]=(uint32_t)v;break;case 5:((uint64_t*)p)[i]=v;break;case 6:((int8_t*)p)[i]=(int8_t)o_value(t,v);break;case 7:((int16_t*)p)[i]=(int16_t)o_value(t,v);break;case 8:((int32_t*)p)[i]=(int32_t)o_value(t,v);break;default:((int64_t*)p)[i]=(int64_t)o_value(t,v);}} +static void o_fill(void *p,uint64_t n,uint64_t v,unsigned t){for(uint64_t i=0;in||len>n-off)o_trap(3);int f=(int)o_value(8,fd);ssize_t r=op==1?read(f,(uint8_t*)p+off,(size_t)len):write(f,(const uint8_t*)p+off,(size_t)len);return r<0?(uint64_t)(-(int64_t)errno):(uint64_t)r;} +static int o_valid(unsigned t,uint64_t v){unsigned w=o_width(t);__int128 x=o_value(t,v);__int128 m=((__int128)1)<<(t>=6?w-1:w);return t>=6?x>=-m&&x=0&&x=16777216)o_trap(4); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=v4;o_op(1, 5, _a,_b);});uint64_t p2=({uint64_t _a=v2;uint64_t _b=({uint64_t _a=v4;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(16, 5, _a,_b);});f2(v0, v0_n, p1, p2);}); +} +} +return o_leave(({uint64_t _a=v1;uint64_t _b=v3;o_op(1, 5, _a,_b);})); +} +static uint64_t f7(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, uint64_t v3){ +o_enter(); +{ +uint64_t v4=0; +uint64_t c1=0; +for(;o_op(8,5, v4, v3);v4=o_op(1,5, v4,1)){ +if(c1++>=16777216)o_trap(4); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=v4;o_op(1, 5, _a,_b);});uint64_t p2=o_cast(5, 2, o_get(v2, v2_n, v4, 2));f2(v0, v0_n, p1, p2);}); +} +} +return o_leave(({uint64_t _a=v1;uint64_t _b=v3;o_op(1, 5, _a,_b);})); +} +static uint64_t f8(uint64_t v0, uint64_t v1){ +o_enter(); +return o_leave(({uint64_t _a=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=({uint64_t _a=v1;uint64_t _b=1ULL;o_op(2, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t _b=v1;o_op(4, 5, _a,_b);});uint64_t _b=v1;o_op(3, 5, _a,_b);})); +} +static uint64_t f9(uint64_t v0){ +o_enter(); +if(({uint64_t _a=({uint64_t _a=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=65ULL;o_op(11, 2, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=90ULL;o_op(9, 2, _a,_b);});o_op(12, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=97ULL;o_op(11, 2, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=122ULL;o_op(9, 2, _a,_b);});o_op(12, 1, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=95ULL;o_op(6, 2, _a,_b);});o_op(13, 1, _a,_b);})){ +return o_leave(1ULL); +} +return o_leave(0ULL); +} +static uint64_t f10(uint64_t v0){ +o_enter(); +if(({uint64_t _a=({uint64_t _a=({uint64_t p0=v0;f9(p0);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=48ULL;o_op(11, 2, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=57ULL;o_op(9, 2, _a,_b);});o_op(12, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +return o_leave(1ULL); +} +return o_leave(0ULL); +} +static uint64_t f11(const void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=64ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ +return o_leave(0ULL); +} +if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, 0ULL, 2);f9(p0);});uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ +return o_leave(0ULL); +} +{ +uint64_t v2=0; +uint64_t c1=0; +for(;o_op(8,5, v2, v1);v2=o_op(1,5, v2,1)){ +if(c1++>=16777216)o_trap(4); +if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, v2, 2);f10(p0);});uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ +return o_leave(0ULL); +} +} +} +return o_leave(1ULL); +} +static uint64_t f12(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +o_enter(); +{uint64_t _i=0ULL;uint64_t _v=v1;o_put(v0, v0_n, _i,_v,5);} +{uint64_t _i=1ULL;uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} +return o_leave(3ULL); +} +static uint64_t f13(uint64_t v0, uint64_t v1, uint64_t v2, uint64_t v3){ +o_enter(); +if(({uint64_t _a=v0;uint64_t _b=v3;o_op(8, 5, _a,_b);})){ +return o_leave(1ULL); +} +if(({uint64_t _a=({uint64_t _a=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=1ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +return o_leave(2ULL); +} +if(({uint64_t _a=({uint64_t _a=v2;uint64_t _b=0ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ +return o_leave(3ULL); +} +if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=7ULL;o_op(12, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ +return o_leave(4ULL); +} +if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=3ULL;o_op(12, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ +return o_leave(4ULL); +} +if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ +return o_leave(4ULL); +} +return o_leave(0ULL); +} +static uint64_t f14(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +o_enter(); +uint64_t __attribute__((unused)) v2=({f0(v0, v0_n);}); +uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 2ULL, 5); +{ +uint64_t v4=0; +uint64_t c1=0; +for(;o_op(8,5, v4, v3);v4=o_op(1,5, v4,1)){ +if(c1++>=16777216)o_trap(4); +uint64_t __attribute__((unused)) v5=({uint64_t _a=8ULL;uint64_t _b=({uint64_t _a=v4;uint64_t _b=3ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); +uint64_t __attribute__((unused)) v6=({uint64_t p0=o_get(v0, v0_n, v5, 5);uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v5;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=o_get(v0, v0_n, ({uint64_t _a=v5;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=v2;f13(p0, p1, p2, p3);}); +if(({uint64_t _a=v6;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +return o_leave(({uint64_t p1=v6;uint64_t p2=v4;f12(v1, v1_n, p1, p2);})); +} +v2=({uint64_t _a=o_get(v0, v0_n, v5, 5);uint64_t _b=o_get(v0, v0_n, ({uint64_t _a=v5;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_op(1, 5, _a,_b);}); +} +} +uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, 3ULL, 5); +if(({uint64_t _a=v2;uint64_t _b=v4;o_op(10, 5, _a,_b);})){ +{uint64_t _i=0ULL;uint64_t _v=5ULL;o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=2ULL;uint64_t _v=v2;o_put(v1, v1_n, _i,_v,5);} +return o_leave(4ULL); +} +if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1024ULL;o_op(10, 5, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=({f0(v0, v0_n);});o_op(8, 5, _a,_b);});o_op(13, 1, _a,_b);})){ +{uint64_t _i=0ULL;uint64_t _v=6ULL;o_put(v1, v1_n, _i,_v,5);} +return o_leave(4ULL); +} +return o_leave(0ULL); +} +static uint64_t f15(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +o_enter(); +if(({uint64_t _a=({uint64_t _a=({uint64_t _a=({f1(v0, v0_n);});uint64_t _b=86ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({f1(v0, v0_n);});uint64_t _b=121ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +return o_leave(1ULL); +} +if(({uint64_t _a=({uint64_t p1=o_get(v0, v0_n, 0ULL, 5);f11(v1, v1_n, p1);});uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ +return o_leave(1ULL); +} +uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 1ULL, 5); +if(({uint64_t _a=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=15ULL;o_op(12, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=({uint64_t _a=v3;uint64_t _b=16777216ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ +return o_leave(2ULL); +} +if(({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=32ULL;o_op(10, 5, _a,_b);})){ +return o_leave(({uint64_t p1=0ULL;uint64_t p2=0ULL;f12(v2, v2_n, p1, p2);})); +} +if(({uint64_t _a=o_get(v0, v0_n, 4ULL, 5);uint64_t _b=255ULL;o_op(10, 5, _a,_b);})){ +return o_leave(5ULL); +} +if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 5ULL, 5);uint64_t _b=3ULL;o_op(12, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +return o_leave(6ULL); +} +return o_leave(({f14(v0, v0_n, v2, v2_n);})); +} +static uint64_t f16(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +o_enter(); +uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); +uint64_t __attribute__((unused)) v3=64ULL; +{uint64_t _i=1ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=({uint64_t _a=117ULL;uint64_t _b=({uint64_t _a=3ULL;uint64_t _b=v2;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});o_op(1, 5, _a,_b);}); +{uint64_t _i=2ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=({uint64_t _a=v2;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=8ULL;f8(p0, p1);}); +{uint64_t _i=3ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=96ULL;o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=128ULL;f8(p0, p1);}); +{uint64_t _i=4ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=16ULL;f8(p0, p1);}); +{uint64_t _i=5ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=o_get(v0, v0_n, 3ULL, 5);o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=4ULL;f8(p0, p1);}); +{uint64_t _i=6ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=36ULL;o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=4ULL;f8(p0, p1);}); +{uint64_t _i=7ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=36ULL;o_op(1, 5, _a,_b);}); +uint64_t __attribute__((unused)) v4=({uint64_t _a=48ULL;uint64_t _b=({uint64_t _a=16ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); +{uint64_t _i=14ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t p0=v3;uint64_t p1=4ULL;f8(p0, p1);}); +{uint64_t _i=8ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=v4;o_op(1, 5, _a,_b);}); +{uint64_t _i=9ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=o_get(v0, v0_n, 5ULL, 5);o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=4ULL;f8(p0, p1);}); +{uint64_t _i=10ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +v3=({uint64_t _a=v3;uint64_t _b=32ULL;o_op(1, 5, _a,_b);}); +v3=({uint64_t p0=v3;uint64_t p1=8ULL;f8(p0, p1);}); +{uint64_t _i=11ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=12ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=704ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=13ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=984ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} +return o_leave(0); +} +static uint64_t f17(void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +uint64_t __attribute__((unused)) v2=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=7ULL;o_op(1, 5, _a,_b);});uint64_t _b=3ULL;o_op(16, 5, _a,_b);}); +uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=4095ULL;o_op(1, 5, _a,_b);});uint64_t _b=12ULL;o_op(16, 5, _a,_b);}); +{ +uint64_t v4=0; +uint64_t c1=0; +for(;o_op(8,5, v4, v3);v4=o_op(1,5, v4,1)){ +if(c1++>=16777216)o_trap(4); +{ +uint64_t v5=0; +uint64_t k2=4096ULL; +for(;o_op(8,5, v5, k2);v5=o_op(1,5, v5,1)){ +uint64_t __attribute__((unused)) v6=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=12ULL;o_op(15, 5, _a,_b);});uint64_t _b=v5;o_op(1, 5, _a,_b);}); +if(({uint64_t _a=v6;uint64_t _b=v2;o_op(8, 5, _a,_b);})){ +{uint64_t _i=v6;uint64_t _v=0ULL;o_put(v0, v0_n, _i,_v,5);} +} +} +} +} +} +return o_leave(0); +} +static uint64_t f18(const void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +uint64_t __attribute__((unused)) v2=0ULL; +{ +uint64_t v3=0; +uint64_t k1=8ULL; +for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ +v2=({uint64_t _a=v2;uint64_t _b=({uint64_t _a=o_cast(5, 2, o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=v3;o_op(1, 5, _a,_b);}), 2));uint64_t _b=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +} +} +return o_leave(v2); +} +static uint64_t f19(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3){ +o_enter(); +uint64_t __attribute__((unused)) v4=({uint64_t _a=v3;uint64_t _b=3ULL;o_op(16, 5, _a,_b);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=4095ULL;o_op(1, 5, _a,_b);});uint64_t _b=12ULL;o_op(16, 5, _a,_b);}); +uint64_t __attribute__((unused)) v6=({uint64_t _a=v2;uint64_t _b=3ULL;o_op(16, 5, _a,_b);}); +{ +uint64_t v7=0; +uint64_t c1=0; +for(;o_op(8,5, v7, v5);v7=o_op(1,5, v7,1)){ +if(c1++>=16777216)o_trap(4); +{ +uint64_t v8=0; +uint64_t k2=4096ULL; +for(;o_op(8,5, v8, k2);v8=o_op(1,5, v8,1)){ +uint64_t __attribute__((unused)) v9=({uint64_t _a=({uint64_t _a=v7;uint64_t _b=12ULL;o_op(15, 5, _a,_b);});uint64_t _b=v8;o_op(1, 5, _a,_b);}); +if(({uint64_t _a=v9;uint64_t _b=v4;o_op(8, 5, _a,_b);})){ +{uint64_t _i=({uint64_t _a=v6;uint64_t _b=v9;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t p1=({uint64_t _a=v9;uint64_t _b=3ULL;o_op(15, 5, _a,_b);});f18(v1, v1_n, p1);});o_put(v0, v0_n, _i,_v,5);} +} +} +} +} +} +return o_leave(0); +} +static uint64_t f20(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +o_enter(); +({uint64_t p1=0ULL;uint64_t p2=4684026196722992511ULL;f5(v0, v0_n, p1, p2);}); +if(({uint64_t _a=({f1(v2, v2_n);});uint64_t _b=86ULL;o_op(6, 5, _a,_b);})){ +({uint64_t p1=7ULL;uint64_t p2=51ULL;f2(v0, v0_n, p1, p2);}); +} +if(({uint64_t _a=({f1(v2, v2_n);});uint64_t _b=86ULL;o_op(6, 5, _a,_b);})){ +({uint64_t p1=8ULL;uint64_t p2=7ULL;f2(v0, v0_n, p1, p2);}); +}else{ +({uint64_t p1=8ULL;uint64_t p2=8ULL;f2(v0, v0_n, p1, p2);}); +} +({uint64_t p1=16ULL;uint64_t p2=2ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=18ULL;uint64_t p2=190ULL;f3(v0, v0_n, p1, p2);}); +if(({uint64_t _a=({f1(v2, v2_n);});uint64_t _b=86ULL;o_op(6, 5, _a,_b);})){ +({uint64_t p1=20ULL;uint64_t p2=130ULL;f4(v0, v0_n, p1, p2);}); +}else{ +({uint64_t p1=20ULL;uint64_t p2=1ULL;f4(v0, v0_n, p1, p2);}); +} +({uint64_t p1=32ULL;uint64_t p2=o_get(v1, v1_n, 12ULL, 5);f5(v0, v0_n, p1, p2);}); +({uint64_t p1=40ULL;uint64_t p2=o_get(v1, v1_n, 11ULL, 5);f5(v0, v0_n, p1, p2);}); +if(({uint64_t _a=({f1(v2, v2_n);});uint64_t _b=86ULL;o_op(6, 5, _a,_b);})){ +({uint64_t p1=48ULL;uint64_t p2=({uint64_t _a=({uint64_t _a=86ULL;uint64_t _b=16ULL;o_op(15, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=5ULL;uint64_t _b=8ULL;o_op(15, 5, _a,_b);});uint64_t _b=86ULL;o_op(13, 5, _a,_b);});o_op(13, 5, _a,_b);});f4(v0, v0_n, p1, p2);}); +}else{ +({uint64_t p1=48ULL;uint64_t p2=100694274ULL;f4(v0, v0_n, p1, p2);}); +} +({uint64_t p1=52ULL;uint64_t p2=64ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=54ULL;uint64_t p2=56ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=56ULL;uint64_t p2=5ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=58ULL;uint64_t p2=64ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=60ULL;uint64_t p2=11ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=62ULL;uint64_t p2=1ULL;f3(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f21(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, uint64_t v3){ +o_enter(); +uint64_t __attribute__((unused)) v4=({uint64_t _a=v1;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=7022363563455443758ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=98ULL;uint64_t p3=1ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=27691700481979182ULL;uint64_t p3=7ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=27691700398420782ULL;uint64_t p3=7ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=51077770998830ULL;uint64_t p3=6ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p3=v3;f7(v0, v0_n, p1, v2, v2_n, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=8317708033571843630ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t p1=v4;uint64_t p2=50785646698868ULL;uint64_t p3=6ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p3=v3;f7(v0, v0_n, p1, v2, v2_n, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=8027224783864622638ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=8101253776481349166ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=29793ULL;uint64_t p3=2ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=8027224783864622638ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t p1=v4;uint64_t p2=46ULL;uint64_t p3=1ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p3=v3;f7(v0, v0_n, p1, v2, v2_n, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=8241983636974759470ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t p1=v4;uint64_t p2=8243121572516095077ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=206936761718ULL;uint64_t p3=5ULL;f6(v0, v0_n, p1, p2, p3);});uint64_t _b=1ULL;o_op(1, 5, _a,_b);}); +v4=({uint64_t p1=v4;uint64_t p2=8533809357193702958ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t p1=v4;uint64_t p2=31356346816619310ULL;uint64_t p3=7ULL;f6(v0, v0_n, p1, p2, p3);}); +return o_leave(0); +} +static uint64_t f22(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +o_enter(); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=28ULL;o_op(1, 5, _a,_b);});uint64_t p2=3ULL;f2(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=30ULL;o_op(1, 5, _a,_b);});uint64_t p2=4ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=48ULL;o_op(1, 5, _a,_b);});uint64_t p2=1ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=52ULL;o_op(1, 5, _a,_b);});uint64_t p2=18ULL;f2(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=53ULL;o_op(1, 5, _a,_b);});uint64_t p2=16ULL;f2(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=54ULL;o_op(1, 5, _a,_b);});uint64_t p2=4ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=64ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=76ULL;o_op(1, 5, _a,_b);});uint64_t p2=3ULL;f2(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=78ULL;o_op(1, 5, _a,_b);});uint64_t p2=5ULL;f3(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f23(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=12036ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=2ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=12ULL;o_op(1, 5, _a,_b);});uint64_t p2=4356ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=14ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=16ULL;o_op(1, 5, _a,_b);});uint64_t p2=2ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=24ULL;o_op(1, 5, _a,_b);});uint64_t p2=4612ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=26ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=28ULL;o_op(1, 5, _a,_b);});uint64_t p2=2ULL;f4(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f24(void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=2306ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=131586ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=328962ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=12ULL;o_op(1, 5, _a,_b);});uint64_t p2=16844547ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=16ULL;o_op(1, 5, _a,_b);});uint64_t p2=770ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=20ULL;o_op(1, 5, _a,_b);});uint64_t p2=67074ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=24ULL;o_op(1, 5, _a,_b);});uint64_t p2=527108ULL;f4(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f25(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=14084ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t p2=4ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=130ULL;f4(v0, v0_n, p1, p2);}); +uint64_t __attribute__((unused)) v3=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);}); +uint64_t __attribute__((unused)) v4=({f0(v2, v2_n);}); +uint64_t __attribute__((unused)) v5=o_get(v2, v2_n, 2ULL, 5); +{ +uint64_t v6=0; +uint64_t c1=0; +for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ +if(c1++>=16777216)o_trap(4); +uint64_t __attribute__((unused)) v7=({uint64_t _a=8ULL;uint64_t _b=({uint64_t _a=v6;uint64_t _b=3ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); +uint64_t __attribute__((unused)) v8=o_get(v2, v2_n, v7, 5); +({uint64_t p1=v3;uint64_t p2=5892ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t p2=12ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=({uint64_t _a=v6;uint64_t _b=({uint64_t _a=({uint64_t _a=v8;uint64_t _b=({f0(v2, v2_n);});o_op(2, 5, _a,_b);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});f4(v0, v0_n, p1, p2);}); +uint64_t __attribute__((unused)) v9=1175552ULL; +if(({uint64_t _a=o_get(v2, v2_n, ({uint64_t _a=v7;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +v9=2225408ULL; +} +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=12ULL;o_op(1, 5, _a,_b);});uint64_t p2=v9;f4(v0, v0_n, p1, p2);}); +v3=({uint64_t _a=v3;uint64_t _b=16ULL;o_op(1, 5, _a,_b);}); +if(({uint64_t _a=({uint64_t _a=v8;uint64_t _b=o_get(v2, v2_n, ({uint64_t _a=v7;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_op(1, 5, _a,_b);});uint64_t _b=v4;o_op(10, 5, _a,_b);})){ +v4=({uint64_t _a=v8;uint64_t _b=o_get(v2, v2_n, ({uint64_t _a=v7;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_op(1, 5, _a,_b);}); +} +} +} +return o_leave(v4); +} +static uint64_t f26(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=6403ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t p2=({uint64_t _a=v2;uint64_t _b=v4;o_op(2, 5, _a,_b);});f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=2564ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=3ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=12ULL;o_op(1, 5, _a,_b);});uint64_t p2=({uint64_t _a=v4;uint64_t _b=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=v4;o_op(2, 5, _a,_b);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=16ULL;o_op(1, 5, _a,_b);});uint64_t p2=20483ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=20ULL;o_op(1, 5, _a,_b);});uint64_t p2=6915ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=22ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=24ULL;o_op(1, 5, _a,_b);});uint64_t p2=24323ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=26ULL;o_op(1, 5, _a,_b);});uint64_t p2=257ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=28ULL;o_op(1, 5, _a,_b);});uint64_t p2=18946ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=32ULL;o_op(1, 5, _a,_b);});uint64_t p2=13828ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=34ULL;o_op(1, 5, _a,_b);});uint64_t p2=4ULL;f3(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f27(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=12ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=1000ULL;f4(v0, v0_n, p1, p2);}); +uint64_t __attribute__((unused)) v3=({uint64_t p1=({uint64_t _a=v1;uint64_t _b=12ULL;o_op(1, 5, _a,_b);});uint64_t p2=4836937782729987662ULL;uint64_t p3=8ULL;f6(v0, v0_n, p1, p2, p3);}); +v3=({uint64_t p1=v3;uint64_t p2=7369327ULL;uint64_t p3=3ULL;f6(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=24ULL;o_op(1, 5, _a,_b);});uint64_t p2=2ULL;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=26ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f3(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=28ULL;o_op(1, 5, _a,_b);});uint64_t p2=130ULL;f4(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f28(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=v2;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=v4;f5(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f29(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +o_enter(); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=24ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=32ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=40ULL;o_op(1, 5, _a,_b);});uint64_t p2=v4;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=44ULL;o_op(1, 5, _a,_b);});uint64_t p2=v5;f4(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f30(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +o_enter(); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=48ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=56ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f5(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f31(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +o_enter(); +uint64_t __attribute__((unused)) v3=o_get(v2, v2_n, 0ULL, 5); +uint64_t __attribute__((unused)) v4=({uint64_t _a=o_get(v1, v1_n, 11ULL, 5);uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=0ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 1ULL, 5);uint64_t p3=({uint64_t _a=117ULL;uint64_t _b=({uint64_t _a=3ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p4=0ULL;uint64_t p5=0ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=1ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=11ULL;uint64_t p3=3ULL;uint64_t p4=0ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 2ULL, 5);uint64_t p3=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t p4=0ULL;uint64_t p5=0ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=1ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=19ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 3ULL, 5);uint64_t p3=96ULL;uint64_t p4=2ULL;uint64_t p5=2ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=8ULL;uint64_t p3=24ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=27ULL;uint64_t p3=1ULL;uint64_t p4=6ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 4ULL, 5);uint64_t p3=o_get(v2, v2_n, 1ULL, 5);uint64_t p4=3ULL;uint64_t p5=2ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=128ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=34ULL;uint64_t _b=v3;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;uint64_t p4=66ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 5ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);uint64_t p4=3ULL;uint64_t p5=4ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=16ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +return o_leave(0); +} +static uint64_t f32(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +o_enter(); +uint64_t __attribute__((unused)) v3=o_get(v2, v2_n, 0ULL, 5); +uint64_t __attribute__((unused)) v4=({uint64_t _a=o_get(v1, v1_n, 11ULL, 5);uint64_t _b=384ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=49ULL;uint64_t _b=({uint64_t _a=2ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p3=1879048192ULL;uint64_t p4=0ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 6ULL, 5);uint64_t p3=36ULL;uint64_t p4=3ULL;uint64_t p5=0ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=4ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=58ULL;uint64_t _b=({uint64_t _a=2ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p3=1879048326ULL;uint64_t p4=0ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 7ULL, 5);uint64_t p3=36ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=4ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=69ULL;uint64_t _b=({uint64_t _a=2ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p3=1879048192ULL;uint64_t p4=64ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 8ULL, 5);uint64_t p3=o_get(v1, v1_n, 14ULL, 5);uint64_t p4=3ULL;uint64_t p5=4ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=4ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=79ULL;uint64_t _b=({uint64_t _a=3ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p3=8ULL;uint64_t p4=3ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 9ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=0ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=1ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +v4=({uint64_t _a=v4;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t _a=101ULL;uint64_t _b=({uint64_t _a=3ULL;uint64_t _b=v3;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t p3=7ULL;uint64_t p4=16777280ULL;f28(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=o_get(v1, v1_n, 10ULL, 5);uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=2ULL;f29(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=v4;uint64_t p2=4ULL;uint64_t p3=0ULL;f30(v0, v0_n, p1, p2, p3);}); +return o_leave(0); +} +static uint64_t f33(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4){ +o_enter(); +({uint64_t p1=v1;uint64_t p2=v2;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f4(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t p2=v4;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=48ULL;o_op(1, 5, _a,_b);});uint64_t p2=8ULL;f5(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f34(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +o_enter(); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=32ULL;o_op(1, 5, _a,_b);});uint64_t p2=v2;f5(v0, v0_n, p1, p2);}); +({uint64_t p1=({uint64_t _a=v1;uint64_t _b=40ULL;o_op(1, 5, _a,_b);});uint64_t p2=v3;f5(v0, v0_n, p1, p2);}); +return o_leave(0); +} +static uint64_t f35(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +o_enter(); +uint64_t __attribute__((unused)) v3=o_get(v1, v1_n, 12ULL, 5); +({uint64_t p1=v3;uint64_t p2=6ULL;uint64_t p3=4ULL;uint64_t p4=v3;f33(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=v3;uint64_t p2=280ULL;uint64_t p3=280ULL;f34(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);});uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=v3;f33(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);});uint64_t p2=280ULL;uint64_t p3=280ULL;f34(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=112ULL;o_op(1, 5, _a,_b);});uint64_t p2=1ULL;uint64_t p3=5ULL;uint64_t p4=o_get(v1, v1_n, 4ULL, 5);f33(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=112ULL;o_op(1, 5, _a,_b);});uint64_t p2=o_get(v2, v2_n, 1ULL, 5);uint64_t p3=o_get(v2, v2_n, 1ULL, 5);f34(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=168ULL;o_op(1, 5, _a,_b);});uint64_t p2=1ULL;uint64_t p3=6ULL;uint64_t p4=o_get(v1, v1_n, 9ULL, 5);f33(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=168ULL;o_op(1, 5, _a,_b);});uint64_t p2=0ULL;uint64_t p3=o_get(v2, v2_n, 5ULL, 5);f34(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=224ULL;o_op(1, 5, _a,_b);});uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=o_get(v1, v1_n, 5ULL, 5);f33(v0, v0_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t _a=v3;uint64_t _b=224ULL;o_op(1, 5, _a,_b);});uint64_t p2=o_get(v2, v2_n, 3ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);f34(v0, v0_n, p1, p2, p3);}); +return o_leave(0); +} +static uint64_t f36(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +o_enter(); +uint64_t __attribute__((unused)) v3=o_get(v1, v1_n, 8ULL, 5); +uint64_t __attribute__((unused)) v4=({uint64_t p1=v3;f25(v0, v0_n, p1, v2, v2_n);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=16ULL;uint64_t _b=o_get(v2, v2_n, 2ULL, 5);o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, 4ULL, 5);uint64_t p4=({f0(v2, v2_n);});f26(v0, v0_n, p1, p2, p3, p4);}); +return o_leave(0); +} +static uint64_t f37(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n, const void *v4, uint64_t v4_n){ +o_enter(); +({f20(v0, v0_n, v1, v1_n, v2, v2_n);}); +uint64_t __attribute__((unused)) v5=o_get(v2, v2_n, 0ULL, 5); +({uint64_t p1=o_get(v1, v1_n, 1ULL, 5);uint64_t p3=v5;f21(v0, v0_n, p1, v3, v3_n, p3);}); +uint64_t __attribute__((unused)) v6=({uint64_t p1=({uint64_t _a=o_get(v1, v1_n, 2ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=v5;f7(v0, v0_n, p1, v3, v3_n, p3);}); +({uint64_t p1=o_get(v1, v1_n, 3ULL, 5);uint64_t p2=o_get(v2, v2_n, 1ULL, 5);f22(v0, v0_n, p1, p2);}); +({uint64_t p2=o_get(v1, v1_n, 4ULL, 5);uint64_t p3=o_get(v2, v2_n, 1ULL, 5);f19(v0, v0_n, v4, v4_n, p2, p3);}); +({uint64_t p1=o_get(v1, v1_n, 6ULL, 5);uint64_t p2=o_get(v2, v2_n, 4ULL, 5);f23(v0, v0_n, p1, p2);}); +({uint64_t p1=o_get(v1, v1_n, 7ULL, 5);f24(v0, v0_n, p1);}); +({f36(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p1=o_get(v1, v1_n, 10ULL, 5);uint64_t p2=({f1(v2, v2_n);});f27(v0, v0_n, p1, p2);}); +({f31(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f32(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f35(v0, v0_n, v1, v1_n, v2, v2_n);}); +return o_leave(0); +} +static uint64_t f38(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +o_enter(); +uint64_t v4[16]={0}; +uint64_t v4_n=16; +o_fill(v4, v4_n, 0ULL, 5); +uint64_t __attribute__((unused)) v5=({f15(v0, v0_n, v1, v1_n, v3, v3_n);}); +if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +return o_leave(v5); +} +({f16(v0, v0_n, v4, v4_n);}); +uint64_t __attribute__((unused)) v6=o_get(v4, v4_n, 13ULL, 5); +if(({uint64_t _a=v6;uint64_t _b=134217728ULL;o_op(10, 5, _a,_b);})){ +{uint64_t _i=0ULL;uint64_t _v=7ULL;o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=2ULL;uint64_t _v=v6;o_put(v3, v3_n, _i,_v,5);} +return o_leave(7ULL); +} +({uint64_t p1=v6;f17(v3, v3_n, p1);}); +({f37(v3, v3_n, v4, v4_n, v0, v0_n, v1, v1_n, v2, v2_n);}); +return o_leave(v6); +} +uint32_t omega_cubin_elf(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, const void *p2, uint64_t p2_n, void *p3, uint64_t p3_n){ +if(!o_buf(result,1,1,5))return 32; +if(!o_buf(p0, p0_n,104, 5))return 32; +if(o_overlap(result,8,p0, p0_n*8))return 32; +if(!o_buf(p1, p1_n,64, 2))return 32; +if(o_overlap(result,8,p1, p1_n*1))return 32; +if(!o_buf(p2, p2_n,16777216, 2))return 32; +if(o_overlap(result,8,p2, p2_n*1))return 32; +if(!o_buf(p3, p3_n,16777216, 5))return 32; +if(o_overlap(result,8,p3, p3_n*8))return 32; +if(o_overlap(p3, p3_n*8, p0, p0_n*8))return 32; +if(o_overlap(p3, p3_n*8, p1, p1_n*1))return 32; +if(o_overlap(p3, p3_n*8, p2, p2_n*1))return 32; +if(o_busy)return 33; +o_busy=1;o_depth=0;int code=setjmp(o_jmp); +if(!code)*result=f38(p0, p0_n, p1, p1_n, p2, p2_n, p3, p3_n); +o_busy=0;o_depth=0;return (uint32_t)code; +} +#if defined(__GNUC__) +#pragma GCC diagnostic pop +#endif diff --git a/src/cudapp_om_cubin_elf.ident b/src/cudapp_om_cubin_elf.ident new file mode 100644 index 00000000..bb080be0 --- /dev/null +++ b/src/cudapp_om_cubin_elf.ident @@ -0,0 +1 @@ +omega-ident 2 unit=cubin_elf abi=portable-seeded-1 src=3611fd7bf1a560b6cf1075cfeb15b4b17496a388d837d886280c8cb80f301646 c=899ff3055a58f4fb1646ee31696248d3a87eafbae8fb2cdeec477ab65b1054cd omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/cubin/cubin_elf.om diff --git a/src/cudapp_om_units.c b/src/cudapp_om_units.c deleted file mode 100644 index 6b7c8a67..00000000 --- a/src/cudapp_om_units.c +++ /dev/null @@ -1,162 +0,0 @@ -/* Generated by omega-bridge src/native.om: native call ABI v1 (docs/NATIVE-ABI.md). - * The Omega machine code below is embedded byte for byte as the seeded compiler wrote it. - * This file only adapts the C calling convention to it. Regenerate it; do not edit it. */ -#include -#include -#include -#include -#define OMEGA_OK 0u -#define OMEGA_BAD_ARG 32u -#define OMEGA_REENTRY 33u -#define OMEGA_BAD_RT 34u -#define OMEGA_NO_STACK 35u -#define OMBR_STACK (8u << 20) -#define OMBR_GUARD (8u << 20) -/* entry[2] is the trap entry (OSC-1 section 7). */ -typedef struct ombr_rt { const void *entry[32]; } ombr_rt; -typedef struct ombr_span { uintptr_t lo, hi; int w; } ombr_span; -static _Thread_local volatile sig_atomic_t ombr_active; -static _Thread_local unsigned char *ombr_stk; -static pthread_key_t ombr_key; -static int ombr_keyok; -static pthread_once_t ombr_once = PTHREAD_ONCE_INIT; -uint32_t ombr_enter(const void *code, const uint64_t *args, const ombr_rt *rt, uint64_t *out, void *top) - __attribute__((visibility("hidden"))); -extern const unsigned char ombr_trap[] __attribute__((visibility("hidden"))); -extern const unsigned char ombr_no_entry[] __attribute__((visibility("hidden"))); -/* ombr_enter saves the callee-saved registers on the caller's stack, keeps that stack pointer in x19 and - * runs the code on the binding's own stack. A normal return stores x0 through out and - * returns 0. A runtime entry restores the stack pointer from x19 and returns a status; out is not - * written. The seeded compiler never writes x19..x28. Runtime entries are reached by blr/br, so they - * start with bti jc. */ -__asm__(".text\n.balign 4\n.globl ombr_enter\n.hidden ombr_enter\n.type ombr_enter,%function\nombr_enter:\n" - "hint #34\nstp x29,x30,[sp,#-176]!\nmov x29,sp\nstp x19,x20,[sp,#16]\nstp x21,x22,[sp,#32]\n" - "stp x23,x24,[sp,#48]\nstp x25,x26,[sp,#64]\nstp x27,x28,[sp,#80]\nstp d8,d9,[sp,#96]\n" - "stp d10,d11,[sp,#112]\nstp d12,d13,[sp,#128]\nstp d14,d15,[sp,#144]\nstr x3,[sp,#160]\n" - "mov x19,sp\nmov x16,x0\nmov x17,x1\nmov x7,x2\nmov sp,x4\n" - "ldp x0,x1,[x17]\nldp x2,x3,[x17,#16]\nldp x4,x5,[x17,#32]\nblr x16\n" - "mov sp,x19\nldr x9,[sp,#160]\nstr x0,[x9]\nmov w0,#0\n" - "ombr_leave:\nldp d14,d15,[sp,#144]\nldp d12,d13,[sp,#128]\nldp d10,d11,[sp,#112]\n" - "ldp d8,d9,[sp,#96]\nldp x27,x28,[sp,#80]\nldp x25,x26,[sp,#64]\nldp x23,x24,[sp,#48]\n" - "ldp x21,x22,[sp,#32]\nldp x19,x20,[sp,#16]\nldp x29,x30,[sp],#176\nret\n.size ombr_enter,.-ombr_enter\n" - ".globl ombr_trap\n.hidden ombr_trap\n.type ombr_trap,%function\nombr_trap:\nhint #38\n" - "mov sp,x19\nsub x2,x1,#1\nmov w3,#34\ncmp x2,#13\ncsel w0,w1,w3,ls\nb ombr_leave\n" - ".size ombr_trap,.-ombr_trap\n" - ".globl ombr_no_entry\n.hidden ombr_no_entry\n.type ombr_no_entry,%function\nombr_no_entry:\nhint #38\n" - "mov sp,x19\nmov w0,#34\nb ombr_leave\n.size ombr_no_entry,.-ombr_no_entry\n"); -static void ombr_free(void *p) -{ - munmap(p, OMBR_STACK + OMBR_GUARD); -} -static void ombr_init(void) -{ - ombr_keyok = pthread_key_create(&ombr_key, ombr_free) == 0; -} -/* The thread's Omega stack: OMBR_STACK usable bytes above an OMBR_GUARD no-access region. A function-mode - * unit has no call cycles and at most 4 MiB of local arrays per function (OMEGESE, local arrays), so a frame that - * would pass the bottom starts inside the guard and faults there; nothing below the guard is touched. */ -static unsigned char *ombr_stack(void) -{ - if (ombr_stk) - return ombr_stk; - pthread_once(&ombr_once, ombr_init); - if (!ombr_keyok) - return 0; - unsigned char *p = mmap(0, OMBR_STACK + OMBR_GUARD, PROT_READ | PROT_WRITE, - MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE, -1, 0); - if (p == MAP_FAILED) - return 0; - if (mprotect(p, OMBR_GUARD, PROT_NONE) != 0 || pthread_setspecific(ombr_key, p) != 0) { - munmap(p, OMBR_STACK + OMBR_GUARD); - return 0; - } - ombr_stk = p + OMBR_GUARD + OMBR_STACK; - return ombr_stk; -} -static int ombr_span_add(ombr_span *sp, unsigned *ns, const void *p, uint64_t n, uint64_t want, uint64_t es, int w) -{ - uintptr_t lo = (uintptr_t)p; - if (!p || n != want || lo % es != 0u || n > (UINTPTR_MAX - lo) / es) - return 1; - sp[*ns].lo = lo; - sp[*ns].hi = lo + n * es; - sp[*ns].w = w; - (*ns)++; - return 0; -} -static int ombr_overlap(const ombr_span *sp, unsigned ns) -{ - for (unsigned i = 0; i < ns; i++) - for (unsigned j = i + 1; j < ns; j++) - if ((sp[i].w || sp[j].w) && sp[i].lo < sp[j].hi && sp[j].lo < sp[i].hi) - return 1; - return 0; -} -/* One read-only runtime table for every call and thread: the code only reads it (a write would fault). */ -static const ombr_rt ombr_rt_table = {{ ombr_no_entry, ombr_no_entry, ombr_trap, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry, ombr_no_entry }}; -static uint32_t ombr_run(const void *code, const uint64_t *args, uint64_t *result, int has_value) -{ - if (ombr_active) - return OMEGA_REENTRY; - ombr_active = 1; - unsigned char *top = ombr_stack(); - if (!top) { - ombr_active = 0; - return OMEGA_NO_STACK; - } - uint64_t v = 0; - uint32_t s = ombr_enter(code, args, &ombr_rt_table, &v, top); - ombr_active = 0; - if (s == OMEGA_OK) - *result = has_value ? v : 0u; - return s; -} -__asm__(".section .text.omega_bridge,\"ax\",@progbits\n.balign 4\n.globl ombr_code_bw_enc_sm121\n.hidden ombr_code_bw_enc_sm121\nombr_code_bw_enc_sm121:\n.byte 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ombr_entry_bw_enc_sm121\n.hidden ombr_entry_bw_enc_sm121\nombr_entry_bw_enc_sm121:\nhint #34\nb ombr_code_bw_enc_sm121\n.previous\n"); -extern const unsigned char ombr_entry_bw_enc_sm121[] __attribute__((visibility("hidden"))); -__attribute__((visibility("default"))) uint32_t omega_bw_enc_sm121(uint64_t *result, const void *o_ins, uint64_t o_ins_len, const void *o_phys, uint64_t o_phys_len, uint64_t o_n, uint64_t o_pad, void *o_code, uint64_t o_code_len) -{ - ombr_span sp[7]; - unsigned ns = 0; - uint64_t a[6] = {0}; - if (ombr_span_add(sp, &ns, result, 1u, 1u, 8u, 1)) - return OMEGA_BAD_ARG; - if (ombr_span_add(sp, &ns, o_ins, o_ins_len, 8192u, 8u, 0)) - return OMEGA_BAD_ARG; - a[0] = (uint64_t)(uintptr_t)o_ins; - if (ombr_span_add(sp, &ns, o_phys, o_phys_len, 288u, 8u, 0)) - return OMEGA_BAD_ARG; - a[1] = (uint64_t)(uintptr_t)o_phys; - a[2] = o_n; - a[3] = o_pad; - if (ombr_span_add(sp, &ns, o_code, o_code_len, 16384u, 1u, 1)) - return OMEGA_BAD_ARG; - a[4] = (uint64_t)(uintptr_t)o_code; - if (ombr_overlap(sp, ns)) - return OMEGA_BAD_ARG; - return ombr_run(ombr_entry_bw_enc_sm121, a, result, 1); -} -__asm__(".section .text.omega_bridge,\"ax\",@progbits\n.balign 4\n.globl ombr_code_cubin_elf\n.hidden ombr_code_cubin_elf\nombr_code_cubin_elf:\n.byte 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ombr_entry_cubin_elf\n.hidden ombr_entry_cubin_elf\nombr_entry_cubin_elf:\nhint #34\nb ombr_code_cubin_elf\n.previous\n"); -extern const unsigned char ombr_entry_cubin_elf[] __attribute__((visibility("hidden"))); -__attribute__((visibility("default"))) uint32_t omega_cubin_elf(uint64_t *result, const void *o_m, uint64_t o_m_len, const void *o_nm, uint64_t o_nm_len, const void *o_tx, uint64_t o_tx_len, void *o_o, uint64_t o_o_len) -{ - ombr_span sp[7]; - unsigned ns = 0; - uint64_t a[6] = {0}; - if (ombr_span_add(sp, &ns, result, 1u, 1u, 8u, 1)) - return OMEGA_BAD_ARG; - if (ombr_span_add(sp, &ns, o_m, o_m_len, 104u, 8u, 0)) - return OMEGA_BAD_ARG; - a[0] = (uint64_t)(uintptr_t)o_m; - if (ombr_span_add(sp, &ns, o_nm, o_nm_len, 64u, 1u, 0)) - return OMEGA_BAD_ARG; - a[1] = (uint64_t)(uintptr_t)o_nm; - if (ombr_span_add(sp, &ns, o_tx, o_tx_len, 16777216u, 1u, 0)) - return OMEGA_BAD_ARG; - a[2] = (uint64_t)(uintptr_t)o_tx; - if (ombr_span_add(sp, &ns, o_o, o_o_len, 16777216u, 8u, 1)) - return OMEGA_BAD_ARG; - a[3] = (uint64_t)(uintptr_t)o_o; - if (ombr_overlap(sp, ns)) - return OMEGA_BAD_ARG; - return ombr_run(ombr_entry_cubin_elf, a, result, 1); -} diff --git a/src/cudapp_om_units.ident b/src/cudapp_om_units.ident index db03fef0..d759eb77 100644 --- a/src/cudapp_om_units.ident +++ b/src/cudapp_om_units.ident @@ -1,2 +1,4 @@ -omega-ident 1 unit=bw_enc_sm121 abi=1 profile=OM-1 src=12369bf1e383e79a4926e7758aaf5f3f778f2945c91327ce0aa570babffc05e6 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f path=om/encoder/bw_enc_sm121.om -omega-ident 1 unit=cubin_elf abi=1 profile=OM-1 src=1a8afe658da10819ab9259a1356bccbefb429561bdf01c5be4affe11847983d6 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f path=om/cubin/cubin_elf.om +omega-ident 2 unit=bw_enc_sm121 abi=portable-seeded-1 src=675f92514e2b0ee9b147e4f2ee159f94c632c14b5fae1dac85249bb537959a38 c=a500db18e6d197dbd1f45eb2ae8e6a2e5161fd219458275209b220e8a7be505d omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/bw_enc_sm121.om +omega-ident 2 unit=cubin_elf abi=portable-seeded-1 src=3611fd7bf1a560b6cf1075cfeb15b4b17496a388d837d886280c8cb80f301646 c=899ff3055a58f4fb1646ee31696248d3a87eafbae8fb2cdeec477ab65b1054cd omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/cubin/cubin_elf.om +omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=7b3d08840f141c8b16e31603aa1051fcc0517a8f9f67798287ee177222654145 c=1ef525ed7fc17d536afebd7349cd0682750ce77e376de24c24ccb61cace54e5e omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om +omega-ident 2 unit=amp_runtime abi=portable-seeded-1 src=22e738d06c9a60275a6770ed6809eb76eabbd8429eeb121eaac3ee23c79f1d57 c=5d30f33b39142c14139ce0b560fab56abcb6967f471e7345d1a39b6eb0164ac9 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/amp_runtime.om diff --git a/src/omega_ampere_codegen.c b/src/omega_ampere_codegen.c new file mode 100644 index 00000000..6171fa6f --- /dev/null +++ b/src/omega_ampere_codegen.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Foreign ABI packing only. The complete SM86 encoding implementation is + * om/encoder/ampere_enc_sm86.om, translated by the pinned omega-bridge. */ +#include "omega_ampere_codegen.h" +#include "cudapp_native.h" + +int omega_gpu_encode_program_target(const BlackwellIRProgram *prog, uint32_t target_sm, + uint8_t *code_buf, size_t max_len, size_t *out_len) +{ + if (!out_len) return -1; + *out_len = 0; + if (!prog || !code_buf || prog->count > BW_MAX_IR_INSNS) return -1; + if (target_sm != 86 && target_sm != 121) return OMEGA_GPU_ENCODE_UNSUPPORTED; + const size_t needed = omega_bw_program_code_bytes(prog); + if (needed > max_len) return -1; + if (target_sm == 121) return omega_bw_encode_program(prog, code_buf, max_len, out_len); + + uint64_t ins[8192], phys[288]; + /* Fixed native output extent; staging permits short caller buffers and + * leaves them unchanged on a refused instruction or native trap. */ + uint8_t code[16384]; + for (size_t i = 0; i < prog->count; ++i) { + const BlackwellIRInsn *in = &prog->insns[i]; + uint64_t *p = ins + i * 8; + p[0] = (uint64_t)in->op; + p[1] = (uint64_t)(int64_t)in->dst_vreg; + p[2] = (uint64_t)(int64_t)in->src1_vreg; + p[3] = (uint64_t)(int64_t)in->src2_vreg; + p[4] = (uint64_t)(int64_t)in->src3_vreg; + p[5] = (uint64_t)(int64_t)in->ureg; + p[6] = (uint64_t)in->imm | ((uint64_t)in->control << 32); + p[7] = (uint64_t)in->is_uniform | ((uint64_t)in->predicate_p0 << 1) + | ((uint64_t)in->predicate_not << 2) | ((uint64_t)in->bar_reg << 8) + | ((uint64_t)in->dst_subreg << 16) | ((uint64_t)in->src1_subreg << 24) + | ((uint64_t)in->src2_subreg << 32) | ((uint64_t)in->src3_subreg << 40); + } + for (size_t i = 0; i < BW_MAX_VREGS; ++i) + phys[i] = (uint64_t)(int64_t)prog->regalloc.vreg_to_phys[i]; + for (size_t i = 0; i < BW_MAX_UVREGS; ++i) + phys[256 + i] = (uint64_t)(int64_t)prog->regalloc.uvreg_to_phys[i]; + uint64_t bytes = 0; + uint32_t status = omega_ampere_enc_sm86(&bytes, ins, 8192, phys, 288, + prog->count, 1, code, 16384); + if (status != OMEGA_OK || bytes != needed) return OMEGA_GPU_ENCODE_UNSUPPORTED; + for (size_t i = 0; i < needed; ++i) code_buf[i] = code[i]; + *out_len = (size_t)bytes; + return 0; +} diff --git a/src/omega_ampere_codegen.h b/src/omega_ampere_codegen.h new file mode 100644 index 00000000..e6a5317a --- /dev/null +++ b/src/omega_ampere_codegen.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +#ifndef OMEGA_AMPERE_CODEGEN_H +#define OMEGA_AMPERE_CODEGEN_H +#include "omega_blackwell_codegen.h" +#ifdef __cplusplus +extern "C" { +#endif +/* Explicit target; never guesses from the host or a GPU. 121 preserves the existing + * encoder. 86 lowers solved IR to Ampere, including parameter-bank offsets and + * BF16 PACK / butterfly placeholders. Native FP8 QMMA and E4M3 PACK are refused. + * 0 success, -1 invalid arguments/capacity, -2 unsupported target/IR/native trap. + * Refusal writes no code bytes and sets *out_len=0. No driver access occurs. */ +#define OMEGA_GPU_ENCODE_UNSUPPORTED (-2) +int omega_gpu_encode_program_target(const BlackwellIRProgram *prog, uint32_t target_sm, + uint8_t *code_buf, size_t max_len, size_t *out_len); +#ifdef __cplusplus +} +#endif +#endif diff --git a/src/omega_ampere_qmd.c b/src/omega_ampere_qmd.c new file mode 100644 index 00000000..33ada5a0 --- /dev/null +++ b/src/omega_ampere_qmd.c @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +#include "omega_ampere_qmd.h" +#include +/* Declaration also emitted by pinned omega-bridge native.om. Until the main + * integration regenerates cudapp_native.h, keep this exact ABI declaration. */ +extern uint32_t omega_amp_runtime(uint64_t *, const void *, uint64_t, void *, uint64_t); +int omega_ampere_policy(const uint64_t m[16], uint32_t q[64]) { + uint64_t out[64] = {0}, accepted = 0; + if (!m || omega_amp_runtime(&accepted, m, 16, out, 64) != 0 || accepted != 1) return -1; + if (q) for (size_t i = 0; i < 64; i++) q[i] = (uint32_t)out[i]; + return 0; +} +int omega_ampere_build_qmd(uint32_t q[64], uint64_t code, uint64_t cbank, + uint64_t semaphore, uint32_t tx, uint32_t ty, + uint32_t gx, uint32_t gy, uint32_t registers, + uint32_t shared_bytes) { + const uint64_t m[16] = {3, code, cbank, semaphore, tx, ty, gx, gy, registers, shared_bytes}; + return q ? omega_ampere_policy(m, q) : -1; +} diff --git a/src/omega_ampere_qmd.h b/src/omega_ampere_qmd.h new file mode 100644 index 00000000..a7435f0a --- /dev/null +++ b/src/omega_ampere_qmd.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +#ifndef OMEGA_AMPERE_QMD_H +#define OMEGA_AMPERE_QMD_H +#include +/* NVIDIA open-gpu-doc classes/compute/clc7c0.h AMPERE_COMPUTE_B, + * Vendor source pin: NVIDIA open-gpu-doc@9fdf5c4062007929d9f4e6cbad9c9771fe61b880. + * clc6c0.h AMPERE_COMPUTE_A, host/clc56f.h AMPERE_CHANNEL_GPFIFO_A. + * SM86 uses COMPUTE_B, not the GA100 COMPUTE_A class. These are not qualifications. */ +#define OMEGA_AMPERE_COMPUTE_A 0xc6c0u +#define OMEGA_AMPERE_COMPUTE_B 0xc7c0u +#define OMEGA_AMPERE_GPFIFO_A 0xc56fu +#define OMEGA_AMPERE_QMD_WORDS 64u +/* Internal bridge entry shared by NVRM's class/reserve admission and QMD host glue. + * om/encoder/amp_runtime.om is the implementation; no C fallback. */ +int omega_ampere_policy(const uint64_t m[16], uint32_t q[64]); +int omega_ampere_build_qmd(uint32_t q[64], uint64_t code, uint64_t cbank, + uint64_t semaphore, uint32_t tx, uint32_t ty, + uint32_t gx, uint32_t gy, uint32_t registers, + uint32_t shared_bytes); +#endif diff --git a/src/omega_blackwell_codegen.c b/src/omega_blackwell_codegen.c index a740e29f..23983e67 100644 --- a/src/omega_blackwell_codegen.c +++ b/src/omega_blackwell_codegen.c @@ -264,11 +264,11 @@ int omega_bw_regalloc_solve(BlackwellIRProgram *prog) { } /* ---- sm_121 instruction encoder (aien-dev/CUDApp#79) --------------------------------------------------- - * The hosted build encodes through om/encoder/bw_enc_sm121.om: seeded Omega, compiled by the pinned omc and - * linked through the omega-bridge native binding src/cudapp_om_units.c (generated by om/units.sh, never edited - * by hand). The C encoder below is migration-pending: it is compiled only - * - in the freestanding build (OMEGA_GPU_NO_POSIX), because the bridge binding needs pthread and mmap and the - * freestanding binding is still a proposal (successor: the same .om unit behind a caller-stack binding); + * The hosted build encodes through om/encoder/bw_enc_sm121.om, translated by the pinned omega-bridge into + * portable src/cudapp_om_bw_enc_sm121.c (generated by om/units.sh; never edited by hand). The C encoder + * below is migration-pending and is compiled only: + * - in the freestanding build (OMEGA_GPU_NO_POSIX), because the current portable binding still uses hosted + * POSIX trap handling; a freestanding caller-stack binding is a separate requirement; * - with CUDAPP_MIGRATION_PENDING_C_ENCODER, the differential oracle build (make CUDAPP_ENCODER=c); * - with CUDAPP_MIGRATION_PENDING_ENCODER_DIFF, which encodes every instruction and program both ways, aborts on * any byte difference and logs each agreement to $CUDAPP_ENCODER_DIFF_LOG (make CUDAPP_ENCODER=diff). @@ -289,7 +289,7 @@ static int bw_c_encode_insn(const BlackwellIRInsn *insn, const OmegaRegAlloc *ra int src3 = (insn->src3_vreg >= 0) ? (ra->vreg_to_phys[insn->src3_vreg] + insn->src3_subreg) : 0xff; /* Default to RZ (0xff) */ int ureg = (insn->ureg >= 0) ? ra->uvreg_to_phys[insn->ureg] : 0; - if (insn->is_uniform && insn->dst_vreg >= 0) { + if ((insn->op == BW_IR_LDCU || insn->op == BW_IR_LDCU64) && insn->dst_vreg >= 0) { dst = ra->uvreg_to_phys[insn->dst_vreg]; } @@ -1213,6 +1213,11 @@ int omega_bw_encode_program(const BlackwellIRProgram *prog, uint8_t *code_buf, s if (max_len < req_bytes) return -1; if (bw_encode_program_bytes(prog, code_buf, req_bytes) != 0) return -1; +#ifdef CUDAPP_AMPERE_CORPUS + /* Offline-only capture of the original solved IR, before family raw patches. */ + extern void omega_ampere_corpus_capture(const BlackwellIRProgram *, const uint8_t *, size_t); + omega_ampere_corpus_capture(prog, code_buf, req_bytes); +#endif omega_kernel_dump(code_buf, req_bytes); *out_len = req_bytes; diff --git a/src/omega_blackwell_engine.c b/src/omega_blackwell_engine.c index bc053f13..3716f8fb 100644 --- a/src/omega_blackwell_engine.c +++ b/src/omega_blackwell_engine.c @@ -390,7 +390,11 @@ static int be_build(void *ctx, const OmegaGpuJob *job) *c->hmarker = 0; *c->hmarker2 = 0; if (!c->c3) c->hmarker2 = NULL; /* never waited for, never reported */ +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif /* ---- unified pushbuffer, SUB@676f16f lines 130-195 ---- */ c->pb_len = 0; @@ -555,7 +559,11 @@ static int be_barrier(void *ctx, uint64_t timeout_ms) BeCtx *c = (BeCtx *)ctx; (void)timeout_ms; begin(c); +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif return 0; } diff --git a/src/omega_blackwell_submit.c b/src/omega_blackwell_submit.c index 8ec564e3..98db2f16 100644 --- a/src/omega_blackwell_submit.c +++ b/src/omega_blackwell_submit.c @@ -281,7 +281,11 @@ int omega_blackwell_execute_matmul(const OmegaMatMulSpec *spec, *hsem = 0; *hmarker = 0; *hmarker2 = 0; +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif /* Assemble unified pushbuffer */ uint32_t pb[1024]; @@ -374,7 +378,11 @@ int omega_blackwell_execute_matmul(const OmegaMatMulSpec *spec, /* Wait for hardware completion marker */ /* CHIPWAIT-2: marker with marker2 required (C3: the second release lands only after the L2 flush). */ if (bw_wait_one(__func__, "marker", hmarker, OMEGA_BW_MARKER_COMPLETION_PAYLOAD, hmarker2, OMEGA_BW_MARKER2_PAYLOAD) != 0) { m16_native_close(&ctx); return -1; } +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif uint64_t t_end = current_time_ns(); /* Validate intermediate semaphore updated to 6 */ @@ -538,7 +546,11 @@ int omega_blackwell_execute_matmul_tensor(const OmegaMatMulSpec *spec, *hsem = 0; *hmarker = 0; *hmarker2 = 0; +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif uint32_t pb[1024]; size_t pb_len = 0; @@ -619,7 +631,11 @@ int omega_blackwell_execute_matmul_tensor(const OmegaMatMulSpec *spec, /* CHIPWAIT-2: marker with marker2 required (C3: the second release lands only after the L2 flush). */ if (bw_wait_one(__func__, "marker", hmarker, OMEGA_BW_MARKER_COMPLETION_PAYLOAD, hmarker2, OMEGA_BW_MARKER2_PAYLOAD) != 0) { m16_native_close(&ctx); return -1; } +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif uint64_t t_end = current_time_ns(); if (*hsem != OMEGA_BW_SEMAPHORE_INTERMEDIATE_DONE) { m16_native_close(&ctx); return -1; } diff --git a/src/omega_cubin.c b/src/omega_cubin.c index 46241992..769670ad 100644 --- a/src/omega_cubin.c +++ b/src/omega_cubin.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ -/* omega_cubin: sm_121 cubin container writer. See omega_cubin.h for the ABI +/* omega_cubin: explicitly selected sm_86/sm_121 cubin container writer. See omega_cubin.h for the ABI * facts and for what this file deliberately does not do. No device is opened, * no address is produced, no launch is performed. * - * The hosted build packs through om/cubin/cubin_elf.om: seeded Omega, compiled by the pinned omc and linked - * through the omega-bridge native binding src/cudapp_om_units.c (generated by om/units.sh, never edited by - * hand). This file keeps the pointer checks, the buffers the unit reads and writes, and the refusal messages. - * The C writer below is migration-pending: it is compiled only - * - in the freestanding build (OMEGA_GPU_NO_POSIX), because the bridge binding needs pthread and mmap; + * The hosted build packs through om/cubin/cubin_elf.om, translated by the pinned omega-bridge into portable + * src/cudapp_om_cubin_elf.c (generated by om/units.sh; never edited by hand). + * This file keeps pointer checks, input/output buffers and refusal messages. + * The C writer below is migration-pending and is compiled only: + * - in the freestanding build (OMEGA_GPU_NO_POSIX), because the portable binding uses POSIX trap handling; * - with CUDAPP_MIGRATION_PENDING_C_CUBIN, the differential oracle build (make CUDAPP_CUBIN=c); * - with CUDAPP_MIGRATION_PENDING_CUBIN_DIFF, which packs every call both ways, aborts on any difference * of return code, bytes or message and logs each agreement to $CUDAPP_CUBIN_DIFF_LOG (make CUDAPP_CUBIN=diff). @@ -32,6 +32,7 @@ const char *omega_cubin_rc_name(int rc) { case OMEGA_CUBIN_E_GPR: return "GPR"; case OMEGA_CUBIN_E_SHARED: return "SHARED"; case OMEGA_CUBIN_E_MEM: return "MEM"; + case OMEGA_CUBIN_E_TARGET: return "TARGET"; default: return "UNKNOWN"; } } @@ -116,15 +117,14 @@ static size_t put_attr2(uint8_t *p, uint16_t id) { return 4; } -static size_t build_param_info(uint8_t *p, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size) { +static size_t build_param_info(uint8_t *p, const OmegaCubinParam *params, size_t nparams, uint32_t pbase) { size_t o = 0; - uint32_t end = OMEGA_CUBIN_PARAM_BASE; - (void)cbank_size; + uint32_t end = pbase; for (size_t i = 0; i < nparams; i++) { /* ptxas ABI: ordinal in bits 0..15, offset relative to the parameter * base in bits 16..31. An absolute offset here makes every loader bind * the wrong argument (REVIEW C-01). */ - uint32_t w2 = (uint32_t)i | ((params[i].offset - OMEGA_CUBIN_PARAM_BASE) << 16); + uint32_t w2 = (uint32_t)i | ((params[i].offset - pbase) << 16); uint32_t type = params[i].is_pointer ? 0x0021f500u : 0x0011f000u; uint8_t d[12]; put32(d, 0); @@ -135,22 +135,23 @@ static size_t build_param_info(uint8_t *p, const OmegaCubinParam *params, size_t } /* ptxas uses the end of the last parameter, not the sum of sizes: gaps * between parameters are part of the constant bank (REVIEW C-04). */ - o += put_attr3(p + o, 0x19, (uint16_t)(end - OMEGA_CUBIN_PARAM_BASE)); + o += put_attr3(p + o, 0x19, (uint16_t)(end - pbase)); { uint8_t d[8]; put32(d, 3); /* symbol index of .nv.constant0. in this writer */ - put32(d + 4, OMEGA_CUBIN_PARAM_BASE | ((end - OMEGA_CUBIN_PARAM_BASE) << 16)); + put32(d + 4, pbase | ((end - pbase) << 16)); o += put_attr4(p + o, 0x0a, d, sizeof d); } return o; } -static int c_cubin_pack(const char *fn_name, +static int c_cubin_pack(uint32_t target_sm, const char *fn_name, const uint8_t *text, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, uint8_t **out, size_t *out_len, char *err, size_t err_cap) { + const uint32_t pbase = target_sm == OMEGA_CUBIN_SM_86 ? OMEGA_CUBIN_PARAM_BASE_SM86 : OMEGA_CUBIN_PARAM_BASE; if (err && err_cap) err[0] = 0; if (!out || !out_len) return OMEGA_CUBIN_E_ARG; *out = NULL; @@ -176,7 +177,7 @@ static int c_cubin_pack(const char *fn_name, return OMEGA_CUBIN_E_SHARED; } { - uint64_t end = OMEGA_CUBIN_PARAM_BASE; + uint64_t end = pbase; for (size_t i = 0; i < nparams; i++) { const OmegaCubinParam *q = ¶ms[i]; if (q->offset < end) { @@ -202,9 +203,9 @@ static int c_cubin_pack(const char *fn_name, (unsigned long long)end, cbank_size); return OMEGA_CUBIN_E_CBANK; } - if (cbank_size > OMEGA_CUBIN_CBANK_MAX || cbank_size < OMEGA_CUBIN_PARAM_BASE) { + if (cbank_size > OMEGA_CUBIN_CBANK_MAX || cbank_size < pbase) { if (err) snprintf(err, err_cap, "cbank size 0x%x outside 0x%x..0x%x", - cbank_size, OMEGA_CUBIN_PARAM_BASE, OMEGA_CUBIN_CBANK_MAX); + cbank_size, pbase, OMEGA_CUBIN_CBANK_MAX); return OMEGA_CUBIN_E_CBANK; } } @@ -234,7 +235,7 @@ static int c_cubin_pack(const char *fn_name, { put32(note, 12); put32(note + 4, 8); put32(note + 8, 0x3e8); memcpy(note + 12, "NVIDIA Corp\0", 12); - put16(note + 24, 2); put16(note + 26, OMEGA_CUBIN_SM_121); + put16(note + 24, 2); put16(note + 26, (uint16_t)target_sm); put32(note + 28, 130); } uint8_t *info = malloc(4096), *text_copy = malloc(text_len), *cbank = calloc(1, cbank_size); @@ -249,7 +250,7 @@ static int c_cubin_pack(const char *fn_name, put32(d, 130); io += put_attr4(info + io, 0x37, d, 4); } - io += build_param_info(info + io, params, nparams, cbank_size); + io += build_param_info(info + io, params, nparams, pbase); io += put_attr3(info + io, 0x50, 0); io += put_attr3(info + io, 0x1b, (uint16_t)gpr_count); io += put_attr3(info + io, 0x5f, 0x0101); @@ -331,15 +332,15 @@ static int c_cubin_pack(const char *fn_name, /* ELF header. */ memcpy(buf, "\177ELF", 4); buf[4] = 2; buf[5] = 1; buf[6] = 1; - buf[7] = 0x41; /* ELFOSABI_NV */ - buf[8] = OMEGA_CUBIN_ABI_VERSION; /* EI_ABIVERSION */ + buf[7] = target_sm == OMEGA_CUBIN_SM_86 ? 0x33 : 0x41; /* ELFOSABI_CUDA / NV */ + buf[8] = target_sm == OMEGA_CUBIN_SM_86 ? 7 : OMEGA_CUBIN_ABI_VERSION; put16(buf + 16, 2); /* ET_EXEC */ put16(buf + 18, 190); /* EM_CUDA */ - put32(buf + 20, 1); + put32(buf + 20, target_sm == OMEGA_CUBIN_SM_86 ? 130 : 1); put64(buf + 24, 0); /* e_entry */ put64(buf + 32, phoff); /* e_phoff */ put64(buf + 40, shoff); - put32(buf + 48, OMEGA_CUBIN_EFLAGS_SM121); + put32(buf + 48, target_sm == OMEGA_CUBIN_SM_86 ? OMEGA_CUBIN_EFLAGS_SM86 : OMEGA_CUBIN_EFLAGS_SM121); put16(buf + 52, ELF_HDR); put16(buf + 54, PHDR_ENT); put16(buf + 56, PHDR_COUNT); /* e_phnum */ @@ -384,13 +385,13 @@ static int c_cubin_pack(const char *fn_name, #endif /* C packer, migration-pending */ #ifdef CUBIN_C_PRIMARY -int omega_cubin_pack(const char *fn_name, +static int cubin_pack_impl(uint32_t target_sm, const char *fn_name, const uint8_t *text, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, uint8_t **out, size_t *out_len, char *err, size_t err_cap) { - return c_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + return c_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, out, out_len, err, err_cap); } #else @@ -408,7 +409,7 @@ _Static_assert(OMEGA_CUBIN_E_ARG == 1 && OMEGA_CUBIN_E_TEXT == 2 && OMEGA_CUBIN_ _Static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__, "the image is read out of the unit's words in host order"); /* The C writer's message for a refusal of the unit; d is its detail (cubin_elf.om header). */ -static void om_cubin_refusal(int rc, const uint64_t *d, size_t text_len, const OmegaCubinParam *params, +static void om_cubin_refusal(uint32_t target_sm, int rc, const uint64_t *d, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, char *err, size_t err_cap) { size_t i = (size_t)d[1]; @@ -434,7 +435,8 @@ static void om_cubin_refusal(int rc, const uint64_t *d, size_t text_len, const O snprintf(err, err_cap, "parameter area ends at 0x%llx beyond cbank size 0x%x", (unsigned long long)d[2], cbank_size); else - snprintf(err, err_cap, "cbank size 0x%x outside 0x%x..0x%x", cbank_size, OMEGA_CUBIN_PARAM_BASE, + snprintf(err, err_cap, "cbank size 0x%x outside 0x%x..0x%x", cbank_size, + target_sm == OMEGA_CUBIN_SM_86 ? OMEGA_CUBIN_PARAM_BASE_SM86 : OMEGA_CUBIN_PARAM_BASE, OMEGA_CUBIN_CBANK_MAX); break; case OMEGA_CUBIN_E_GPR: snprintf(err, err_cap, "gpr count %u exceeds 255", gpr_count); break; @@ -446,7 +448,7 @@ static void om_cubin_refusal(int rc, const uint64_t *d, size_t text_len, const O } } -static int om_cubin_pack(const char *fn_name, +static int om_cubin_pack(uint32_t target_sm, const char *fn_name, const uint8_t *text, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, @@ -470,6 +472,7 @@ static int om_cubin_pack(const char *fn_name, m[3] = cbank_size; m[4] = gpr_count; m[5] = shared_reserved; + m[6] = target_sm; if (nparams <= OMEGA_CUBIN_MAX_PARAMS) for (size_t i = 0; i < nparams; i++) { m[8 + 3 * i] = params[i].offset; @@ -492,7 +495,7 @@ static int om_cubin_pack(const char *fn_name, rc = OMEGA_CUBIN_E_MEM; } else if (r <= OMEGA_CUBIN_E_MEM) { rc = (int)r; - om_cubin_refusal(rc, o, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, err, err_cap); + om_cubin_refusal(target_sm, rc, o, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, err, err_cap); } else { uint8_t *buf = malloc((size_t)r); if (!buf) { @@ -508,13 +511,13 @@ static int om_cubin_pack(const char *fn_name, } #ifndef CUDAPP_MIGRATION_PENDING_CUBIN_DIFF -int omega_cubin_pack(const char *fn_name, +static int cubin_pack_impl(uint32_t target_sm, const char *fn_name, const uint8_t *text, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, uint8_t **out, size_t *out_len, char *err, size_t err_cap) { - return om_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + return om_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, out, out_len, err, err_cap); } #else @@ -534,16 +537,16 @@ static void cubin_diff_note(int rc, size_t len, int agree) { } } -int omega_cubin_pack(const char *fn_name, +static int cubin_pack_impl(uint32_t target_sm, const char *fn_name, const uint8_t *text, size_t text_len, const OmegaCubinParam *params, size_t nparams, uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, uint8_t **out, size_t *out_len, char *err, size_t err_cap) { if (!out || !out_len) { - int a = om_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + int a = om_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, out, out_len, err, err_cap); - int b = c_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + int b = c_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, out, out_len, err, err_cap); cubin_diff_note(a, 0, a == b); return a; @@ -551,12 +554,12 @@ int omega_cubin_pack(const char *fn_name, char e1[256], e2[256]; uint8_t *b1 = NULL, *b2 = NULL; size_t n1 = 0, n2 = 0; - int r1 = om_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + int r1 = om_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, &b1, &n1, e1, sizeof e1); #ifdef CUDAPP_CUBIN_DIFF_SELFTEST if (r1 == OMEGA_CUBIN_OK && n1) b1[n1 / 2] ^= 1; /* red check of the comparison itself: one flipped bit must abort */ #endif - int r2 = c_cubin_pack(fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, + int r2 = c_cubin_pack(target_sm, fn_name, text, text_len, params, nparams, cbank_size, gpr_count, shared_reserved, &b2, &n2, e2, sizeof e2); cubin_diff_note(r1, n1, r1 == r2 && n1 == n2 && (n1 == 0 || memcmp(b1, b2, n1) == 0) && strcmp(e1, e2) == 0); free(b2); @@ -567,3 +570,32 @@ int omega_cubin_pack(const char *fn_name, } #endif #endif + +int omega_cubin_pack_target(uint32_t target_sm, const char *fn_name, + const uint8_t *text, size_t text_len, + const OmegaCubinParam *params, size_t nparams, + uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, + uint8_t **out, size_t *out_len, char *err, size_t err_cap) { + if (err && err_cap) err[0] = 0; + if (out) *out = NULL; + if (out_len) *out_len = 0; + if (target_sm != OMEGA_CUBIN_SM_86 && target_sm != OMEGA_CUBIN_SM_121) { + if (err && err_cap) snprintf(err, err_cap, "unsupported cubin target sm_%u", target_sm); + return OMEGA_CUBIN_E_TARGET; + } + if (nparams && !params) { + if (err && err_cap) snprintf(err, err_cap, "null parameter array"); + return OMEGA_CUBIN_E_ARG; + } + return cubin_pack_impl(target_sm, fn_name, text, text_len, params, nparams, + cbank_size, gpr_count, shared_reserved, out, out_len, err, err_cap); +} + +int omega_cubin_pack(const char *fn_name, const uint8_t *text, size_t text_len, + const OmegaCubinParam *params, size_t nparams, + uint32_t cbank_size, uint32_t gpr_count, uint32_t shared_reserved, + uint8_t **out, size_t *out_len, char *err, size_t err_cap) { + return omega_cubin_pack_target(OMEGA_CUBIN_SM_121, fn_name, text, text_len, + params, nparams, cbank_size, gpr_count, shared_reserved, + out, out_len, err, err_cap); +} diff --git a/src/omega_cubin.h b/src/omega_cubin.h index 43be03fd..c453c0a0 100644 --- a/src/omega_cubin.h +++ b/src/omega_cubin.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ /* - * omega_cubin: package Omega-generated sm_121 machine code into the NVIDIA - * cubin ELF container that the CUDA driver (and MAX's device layer) can load. + * omega_cubin: package Omega-generated sm_86 or sm_121 machine code into the + * NVIDIA cubin ELF container. Device loading is separately qualified. * * This is a container writer, not a GPU driver, compiler or verifier. It does * not know a device address, open a device, allocate memory or launch work. It @@ -28,9 +28,9 @@ * host as an oracle only; see PROVENANCE.md). * * Limits, deliberate and recorded: - * - e_phoff/e_phnum are 0: this is a section-based container. The ptxas - * reference also carries PT_LOAD program headers; whether cuModuleLoadData - * needs them is exactly what the NOT_RUN device probe must decide. + * - PT_LOAD headers describe text, constant bank and reserved shared memory. + * - sm_86 has no Blackwell capmerc dependency. sm_121 output is preserved; + * this writer does not synthesize capmerc or assert driver loadability. * - EIATTR_EXIT_INSTR_OFFSETS is omitted because this writer does not decode * SASS and will not fabricate the EXIT byte offset. ptxas emits it; the * driver treats it as optional metadata until a device load proves else. @@ -46,6 +46,9 @@ #define OMEGA_CUBIN_ABI_VERSION 8u #define OMEGA_CUBIN_EFLAGS_SM121 0x6007902u #define OMEGA_CUBIN_SM_121 121u +#define OMEGA_CUBIN_SM_86 86u +#define OMEGA_CUBIN_EFLAGS_SM86 ((86u << 16) | 0x500u | 86u) +#define OMEGA_CUBIN_PARAM_BASE_SM86 0x160u #define OMEGA_CUBIN_PARAM_BASE 0x380u #define OMEGA_CUBIN_CBANK_MAX 1024u #define OMEGA_CUBIN_MAX_PARAMS 32u @@ -60,7 +63,8 @@ enum { OMEGA_CUBIN_E_CBANK = 4, /* parameter area exceeds the 1024-byte bank */ OMEGA_CUBIN_E_GPR = 5, /* register count above 255 */ OMEGA_CUBIN_E_SHARED = 6, /* reserved shared size not a multiple of 4 */ - OMEGA_CUBIN_E_MEM = 7 /* allocation failure */ + OMEGA_CUBIN_E_MEM = 7, /* allocation failure */ + OMEGA_CUBIN_E_TARGET = 8 /* unsupported explicit SM target */ }; /* One kernel parameter: its byte offset in constant bank 0, its size (8 for a @@ -84,6 +88,17 @@ int omega_cubin_pack(const char *fn_name, uint32_t shared_reserved, uint8_t **out, size_t *out_len, char *err, size_t err_cap); +/* Explicit target; no auto-detection or architecture fallback. Parameters use + * the selected target's constant-bank ABI (sm_86: 0x160; sm_121: 0x380). + * The legacy entry above remains exactly the sm_121 contract. + * This only packages bytes: callers must select the matching encoder too. */ +int omega_cubin_pack_target(uint32_t target_sm, const char *fn_name, + const uint8_t *text, size_t text_len, + const OmegaCubinParam *params, size_t nparams, + uint32_t cbank_size, uint32_t gpr_count, + uint32_t shared_reserved, + uint8_t **out, size_t *out_len, char *err, size_t err_cap); + void omega_cubin_free(uint8_t *p); #endif /* OMEGA_CUBIN_H */ diff --git a/src/omega_gpu_elementwise_api.c b/src/omega_gpu_elementwise_api.c index 3df511ce..95793a99 100644 --- a/src/omega_gpu_elementwise_api.c +++ b/src/omega_gpu_elementwise_api.c @@ -930,7 +930,11 @@ static int kernel_for(OmegaGpuEwOp op, bool upload, Slot **out, bool *hit) { if (upload && !s->code.cpu) { if (omega_gpu_session_alloc_code(s->kernel.code_size, &s->code) != 0) return OMEGA_GPU_EW_CHIP_FAIL; memcpy(s->code.cpu, s->kernel.code, s->kernel.code_size); +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif } *out = s; return OMEGA_GPU_EW_OK; @@ -983,7 +987,11 @@ static int run_abc(const Slot *ks, const void *a, size_t a_bytes, const void *b, size_t c_words = c_bytes / 4; uint32_t *c_dev = (uint32_t *)g_c.mem.cpu; for (size_t i = 0; i < c_words; i++) c_dev[i] = EW_POISON; +#if defined(__aarch64__) __asm__ volatile("dsb sy" ::: "memory"); +#else + __atomic_thread_fence(__ATOMIC_SEQ_CST); +#endif uint32_t args[OMEGA_BW_CBANK_MATMUL_ARGS_WORDS]; args[0] = (uint32_t)g_a.mem.va; args[1] = (uint32_t)(g_a.mem.va >> 32); diff --git a/src/omega_gpu_platform_linux.c b/src/omega_gpu_platform_linux.c index 7b1c507d..fc9a009a 100644 --- a/src/omega_gpu_platform_linux.c +++ b/src/omega_gpu_platform_linux.c @@ -21,7 +21,9 @@ #include "m16_native.h" #include "nvrm.h" +#include "omega_ampere_qmd.h" +#include #include #include #include @@ -224,11 +226,38 @@ static void human_bytes(char *out, size_t n, uint64_t b) { if (b < (1ull << 30)) snprintf(out, n, "%.1f MiB", (double)b / (double)(1ull << 20)); else snprintf(out, n, "%.1f GiB", (double)b / (double)(1ull << 30)); } -static int mem_reserve_check(LinuxRef *r, uint64_t bytes) { +static int mem_reserve_check(LinuxRef *r, uint64_t bytes, int local) { unsigned long long reserve_mib = CUDAPP_MEM_RESERVE_DEFAULT_MIB; const char *e = getenv("CUDAPP_MEM_RESERVE_MIB"); if (e && *e) { char *end = NULL; unsigned long long v = strtoull(e, &end, 10); if (end && end != e && *end == 0) reserve_mib = v; } - if (reserve_mib == 0) return OMEGA_GPU_PLAT_OK; + uint64_t reserve = reserve_mib > (UINT64_MAX >> 20) ? UINT64_MAX : (uint64_t)reserve_mib << 20; + const char *minimum = local ? getenv("CUDAPP_GPU_MIN_FREE_BYTES") : NULL; + if (minimum && *minimum) { + char *end = NULL; + errno = 0; + unsigned long long value = strtoull(minimum, &end, 10); + if (errno || !end || end == minimum || *end || *minimum == '-') { + snprintf(r->diag, sizeof r->diag, "dma_alloc: invalid CUDAPP_GPU_MIN_FREE_BYTES"); + return OMEGA_GPU_PLAT_REFUSED_LIMIT; + } + reserve = value; + } + if (!reserve) return OMEGA_GPU_PLAT_OK; + if (local) { + uint64_t avail = 0, total = 0; + if (bytes > UINT64_MAX - 0xfffull || + nvrm_vram_info(&r->m16.rm, &avail, &total) != 0) { + snprintf(r->diag, sizeof r->diag, "dma_alloc: refused: selected GPU framebuffer free-memory query failed"); + return OMEGA_GPU_PLAT_REFUSED_LIMIT; + } + bytes = (bytes + 0xfffull) & ~0xfffull; + const uint64_t m[16] = {2, avail, bytes, reserve}; + if (omega_ampere_policy(m, NULL) == 0) return OMEGA_GPU_PLAT_OK; + snprintf(r->diag, sizeof r->diag, + "dma_alloc: refused local VRAM allocation: free=%llu bytes request=%llu bytes reserve=%llu bytes; host RAM is not VRAM", + (unsigned long long)avail, (unsigned long long)bytes, (unsigned long long)reserve); + return OMEGA_GPU_PLAT_REFUSED_LIMIT; + } const char *path = getenv("CUDAPP_MEMINFO"); FILE *f = fopen(path && *path ? path : "/proc/meminfo", "r"); if (!f) return OMEGA_GPU_PLAT_OK; @@ -238,7 +267,6 @@ static int mem_reserve_check(LinuxRef *r, uint64_t bytes) { if (!have) return OMEGA_GPU_PLAT_OK; /* Saturate rather than wrap: 2^44 MiB shifted by 20 is 2^64, and 2^54 kB times 1024 is 2^64 (RtMem F9). */ const uint64_t avail = avail_kb > UINT64_MAX / 1024ull ? UINT64_MAX : (uint64_t)avail_kb * 1024ull; - const uint64_t reserve = reserve_mib > (UINT64_MAX >> 20) ? UINT64_MAX : (uint64_t)reserve_mib << 20; if (bytes <= avail && avail - bytes >= reserve) return OMEGA_GPU_PLAT_OK; char want[32], free_[32], keep[32]; human_bytes(want, sizeof want, bytes); human_bytes(free_, sizeof free_, avail); human_bytes(keep, sizeof keep, reserve); @@ -263,17 +291,23 @@ static int ref_dma_alloc(void *ctx, OmegaGpuDeviceHandle dev, const OmegaGpuBuff * coherent with direct CPU mappings"). omega_gpu_mem_cached.c (OWN-30B L2) writes such a buffer from the CPU exactly once, * before any GPU read, then syncs; omega_gpu_devmem.h (T3b) fills them with GPU writes only. Either way no stale L2 line exists. */ const int cached = desc->gpu_cache == OMEGA_GPU_CACHE_GPU_CACHED; + const int local = r->m16.rm.discrete && desc->kind != OMEGA_GPU_HANDLE_BUF_QUEUE && + !(desc->rights & OMEGA_GPU_RIGHT_HOST_POLLED); + /* Cached host/BAR alias maintenance is not yet exposed for Ampere. Do not + * silently use the GB10-only SYSMEM_NCOH invalidation for local framebuffer. */ + if (rc == OMEGA_GPU_PLAT_OK && local && cached) rc = OMEGA_GPU_PLAT_REFUSED_CACHE_POLICY; if (rc == OMEGA_GPU_PLAT_OK && cached && (desc->kind != OMEGA_GPU_HANDLE_BUF_DATA || (desc->rights & (OMEGA_GPU_RIGHT_CPU_READ | OMEGA_GPU_RIGHT_HOST_POLLED)))) rc = OMEGA_GPU_PLAT_REFUSED_CACHE_POLICY; if (rc != OMEGA_GPU_PLAT_OK) { rc = refuse(r, rc, "dma_alloc"); ref_unlock(r); return rc; } - rc = mem_reserve_check(r, desc->bytes); /* D1: before any slot or driver call; the sentence is in r->diag */ + rc = mem_reserve_check(r, desc->bytes, local); /* D1 before handle/driver allocation */ if (rc != OMEGA_GPU_PLAT_OK) { ref_unlock(r); return rc; } uint32_t idx = 0, gen = 0; rc = omega_gpu_handles_open(&r->t, desc->kind, desc->bytes, LINUX_REF_BUFFERS, g_caps.max_total_bytes, &idx, &gen); if (rc != OMEGA_GPU_PLAT_OK) { rc = refuse(r, rc, "dma_alloc"); ref_unlock(r); return rc; } NvrmMem m; - if ((cached ? nvrm_alloc(&r->m16.rm, desc->bytes, &m) : nvrm_alloc_gpu_uncached(&r->m16.rm, desc->bytes, &m)) != 0) { + if ((local ? nvrm_alloc_vram(&r->m16.rm, desc->bytes, &m) : + cached ? nvrm_alloc(&r->m16.rm, desc->bytes, &m) : nvrm_alloc_gpu_uncached(&r->m16.rm, desc->bytes, &m)) != 0) { (void)omega_gpu_handles_close(&r->t, idx, gen, desc->kind); /* this slot never got memory: its generation moves on */ rc = refuse(r, OMEGA_GPU_PLAT_REFUSED_DEVICE, cached ? "nvrm_alloc" : "nvrm_alloc_gpu_uncached"); ref_unlock(r); @@ -300,7 +334,11 @@ static int ref_dma_free(void *ctx, OmegaGpuBufferHandle b) { for (uint32_t i = 0; rc == OMEGA_GPU_PLAT_OK && i + 1u < r->nchan; i++) if (r->xq[i].generation != 0u && r->xring[i].handle == r->mem[b.index].handle) rc = OMEGA_GPU_PLAT_REFUSED_BUSY; if (rc != OMEGA_GPU_PLAT_OK) { rc = refuse(r, rc, "dma_free"); ref_unlock(r); return rc; } - (void)nvrm_free(&r->m16.rm, &r->mem[b.index]); + if (nvrm_free(&r->m16.rm, &r->mem[b.index]) != 0) { + rc = refuse(r, OMEGA_GPU_PLAT_REFUSED_DEVICE, "nvrm_free (allocation retained for cleanup)"); + ref_unlock(r); + return rc; + } (void)omega_gpu_handles_close(&r->t, b.index, b.generation, kind); memset(&r->mem[b.index], 0, sizeof r->mem[b.index]); r->rights[b.index] = 0; @@ -503,3 +541,18 @@ const OmegaGpuPlatform *omega_gpu_platform_linux(OmegaGpuPlatformCaps *caps) { if (caps) *caps = g_caps; return &g_platform; } + +uint32_t omega_gpu_platform_linux_target_sm(void) { + ref_lock(&g_ref); + const uint32_t target = g_ref.dev.generation ? + (g_ref.m16.rm.target_sm ? g_ref.m16.rm.target_sm : 121u) : 0; + ref_unlock(&g_ref); + return target; +} + +int omega_gpu_platform_linux_vram_info(uint64_t *free_bytes, uint64_t *total_bytes) { + ref_lock(&g_ref); + int rc = g_ref.dev.generation ? nvrm_vram_info(&g_ref.m16.rm, free_bytes, total_bytes) : -1; + ref_unlock(&g_ref); + return rc; +} diff --git a/src/omega_gpu_platform_linux.h b/src/omega_gpu_platform_linux.h index 834ad934..33f86dd7 100644 --- a/src/omega_gpu_platform_linux.h +++ b/src/omega_gpu_platform_linux.h @@ -39,6 +39,9 @@ const OmegaGpuPlatform *omega_gpu_platform_linux(OmegaGpuPlatformCaps *caps); * anything not 2..4) is today's single channel exactly; 2..4 adds that many minus one channels in the same channel group * (nvrm_channel_n). Queue i (0-based, in queue_open order) submits on channel i. Read at every device_open. */ uint32_t omega_gpu_platform_linux_channels_env(void); +/* Exact target of the open Linux device, or 0 while closed. */ +uint32_t omega_gpu_platform_linux_target_sm(void); +int omega_gpu_platform_linux_vram_info(uint64_t *free_bytes, uint64_t *total_bytes); #ifdef __cplusplus } diff --git a/src/omega_gpu_session.c b/src/omega_gpu_session.c index 7e37ba8b..d13d4725 100644 --- a/src/omega_gpu_session.c +++ b/src/omega_gpu_session.c @@ -16,6 +16,7 @@ #include "omega_gpu_code_alloc.h" #include "omega_gpu_fmt.h" #include "omega_blackwell_qmd.h" +#include "omega_ampere_qmd.h" #include "omega_blackwell_submit.h" /* launch constants only (macros); the vector executor itself stays Linux-private */ #include @@ -42,6 +43,7 @@ static const OmegaGpuPlatform *g_p; /* installed platform (atomic load / store) static OmegaGpuPlatformCaps g_caps; static OmegaGpuSession g_s; static bool g_open; +static uint32_t g_target_sm; static uint32_t g_blocked; /* latched (atomic) */ static uint32_t g_locked; /* session lock held (atomic) */ static uint32_t g_cancel; /* cancel requested (atomic) */ @@ -359,6 +361,10 @@ OmegaGpuSession *omega_gpu_session_open(void) { g_s.opens = opens; int rc = p->device_open(p->ctx, 0, &g_s.dev); if (rc != OMEGA_GPU_PLAT_OK) { fail_plat("device_open", rc); memset(&g_s.dev, 0, sizeof g_s.dev); return NULL; } + g_target_sm = 121; /* custom/freestanding platforms retain the SM121 contract */ +#ifndef OMEGA_GPU_NO_POSIX + if (p == omega_gpu_platform_linux(NULL)) g_target_sm = omega_gpu_platform_linux_target_sm(); +#endif g_open = true; /* so alloc / free work during the rest of the open */ /* same four buffers, same sizes, same order as before cut C; every one GPU-uncached */ if (mem_alloc(OMEGA_GPU_HANDLE_BUF_QUEUE, RIGHTS_RING, 0x10000, &g_s.pb) || @@ -527,14 +533,23 @@ int omega_gpu_session_launch(const OmegaGpuLaunch *L, uint64_t *elapsed_ns, uint L->spin_us > OMEGA_GPU_SESSION_MAX_SPIN_US || L->timeout_ms == 0) { omega_gpu_session_set_error("launch arguments"); return -1; } + const uint32_t requested = L->target_sm ? L->target_sm : 121u; + if (requested != g_target_sm || (requested != 86 && requested != 121)) { + omega_gpu_session_set_error("launch target does not match selected GPU; SM86 requires target_sm=86"); + return -1; + } + const int ampere = requested == 86; if (take_cancel()) { omega_gpu_session_set_error("launch cancelled before submit"); return OMEGA_GPU_SESSION_CANCELLED; } const uint32_t threads_y = L->threads_y ? L->threads_y : 1; uint32_t cbank_data[OMEGA_BW_CBANK_DRIVER_WORDS]; - omega_blackwell_build_cbank_driver_2d(cbank_data, g_s.cbank.va, L->threads_x, threads_y, L->grid_x, L->grid_y); + if (ampere) memset(cbank_data, 0, sizeof cbank_data); + else omega_blackwell_build_cbank_driver_2d(cbank_data, g_s.cbank.va, L->threads_x, threads_y, L->grid_x, L->grid_y); memcpy(g_s.cbank.cpu, cbank_data, sizeof cbank_data); - memcpy((uint8_t *)g_s.cbank.cpu + 0x380, L->args, (size_t)L->n_args * 4u); + const uint32_t args_offset = ampere ? 0x160u : 0x380u; + memcpy((uint8_t *)g_s.cbank.cpu + args_offset, L->args, (size_t)L->n_args * 4u); - const uint64_t qmd0_va = g_s.qmd.va, qmd1_va = g_s.qmd.va + 0x1000, sem_va = g_s.qmd.va + 0x2000, scratch_va = g_s.qmd.va + 0x4000; + const uint64_t qmd0_va = g_s.qmd.va, qmd1_va = g_s.qmd.va + 0x1000, + sem_va = ampere ? g_s.marker.va + 0x20 : g_s.qmd.va + 0x2000, scratch_va = g_s.qmd.va + 0x4000; uint32_t gpr = L->gpr_count > 64u ? round_up(L->gpr_count, 8u) : 64u; OmegaBlackwellQmdConfig cfg = { .code_va = L->code_va, .cbank_va = g_s.cbank.va, .scratch_va = scratch_va, .sem_va = sem_va, @@ -544,24 +559,54 @@ int omega_gpu_session_launch(const OmegaGpuLaunch *L, uint64_t *elapsed_ns, uint .shared_bytes = L->shared_bytes, }; uint32_t qmd0_words[OMEGA_BW_QMD_WORDS], qmd1_words[OMEGA_BW_QMD_WORDS]; - omega_blackwell_build_qmd0(qmd0_words, qmd0_va, qmd1_va); - if (omega_blackwell_build_qmd1(qmd1_words, &cfg) != 0) { omega_gpu_session_set_error("qmd build (shared_bytes)"); return -1; } - if (omega_blackwell_verify_qmd_invariants(qmd1_words) != 0) { omega_gpu_session_set_error("qmd invariants"); return -1; } - memcpy(g_s.qmd.cpu, qmd0_words, sizeof qmd0_words); - memcpy((uint8_t *)g_s.qmd.cpu + 0x1000, qmd1_words, sizeof qmd1_words); + if (ampere) { +#ifndef OMEGA_GPU_NO_POSIX + if (qmd1_va >> 40) { + omega_gpu_session_set_error("Ampere PCAS QMD address exceeds 40-bit launch aperture"); + return -1; + } + if (omega_ampere_build_qmd(qmd1_words, L->code_va, g_s.cbank.va, sem_va, + L->threads_x, threads_y, L->grid_x, L->grid_y, gpr, L->shared_bytes)) { + omega_gpu_session_set_error("Ampere QMD3 build: unsupported dimensions, registers, shared memory or VA"); + return -1; + } + memcpy((uint8_t *)g_s.qmd.cpu + 0x1000, qmd1_words, OMEGA_AMPERE_QMD_WORDS * sizeof(uint32_t)); +#else + omega_gpu_session_set_error("Ampere requires the Linux native Omega runtime"); + return -1; +#endif + } else { + omega_blackwell_build_qmd0(qmd0_words, qmd0_va, qmd1_va); + if (omega_blackwell_build_qmd1(qmd1_words, &cfg) != 0) { omega_gpu_session_set_error("qmd build (shared_bytes)"); return -1; } + if (omega_blackwell_verify_qmd_invariants(qmd1_words) != 0) { omega_gpu_session_set_error("qmd invariants"); return -1; } + memcpy(g_s.qmd.cpu, qmd0_words, sizeof qmd0_words); + memcpy((uint8_t *)g_s.qmd.cpu + 0x1000, qmd1_words, sizeof qmd1_words); + } - volatile uint32_t *hsem = (volatile uint32_t *)((uint8_t *)g_s.qmd.cpu + 0x2000); + volatile uint32_t *hsem = ampere ? (volatile uint32_t *)((uint8_t *)g_s.marker.cpu + 0x20) : + (volatile uint32_t *)((uint8_t *)g_s.qmd.cpu + 0x2000); volatile uint32_t *hmarker = (volatile uint32_t *)g_s.marker.cpu; volatile uint32_t *hmarker2 = (volatile uint32_t *)((uint8_t *)g_s.marker.cpu + 0x10); *hsem = 0; *hmarker = 0; *hmarker2 = 0; /* explicit visibility of everything the CPU just wrote (Linux reference: dsb sy, the barrier issued here before) */ int rc = p->sync_cpu_to_gpu(p->ctx, g_s.cbank.handle, 0, PAGE); if (rc == OMEGA_GPU_PLAT_OK) rc = p->sync_cpu_to_gpu(p->ctx, g_s.qmd.handle, 0, 0x3000); - if (rc == OMEGA_GPU_PLAT_OK) rc = p->sync_cpu_to_gpu(p->ctx, g_s.marker.handle, 0, 0x20); + if (rc == OMEGA_GPU_PLAT_OK) rc = p->sync_cpu_to_gpu(p->ctx, g_s.marker.handle, 0, ampere ? 0x40 : 0x20); if (rc != OMEGA_GPU_PLAT_OK) { fail_plat("sync_cpu_to_gpu", rc); return -1; } uint32_t pb[1024]; size_t n = 0; + if (ampere) { + /* Vendor clc7c0.h SET_OBJECT, SEND_PCAS_A and SEND_SIGNALING_PCAS2_B. + * QMD3 is already BAR-written and ordered by sync above. No Blackwell + * inline QMD5 packet, null-grid dependency or class-specific setup. */ + pb[n++] = bw_mthd(1, 0x0000, 1); pb[n++] = OMEGA_AMPERE_COMPUTE_B; + /* clc7c0.h INVALIDATE_SHADER_CACHES: instruction/data/constant. */ + pb[n++] = bw_mthd(1, 0x021c, 1); + pb[n++] = (1u << 0) | (1u << 4) | (1u << 12); + pb[n++] = bw_mthd(1, 0x02b4, 1); pb[n++] = (uint32_t)(qmd1_va >> 8); + pb[n++] = bw_mthd(1, 0x02c0, 1); pb[n++] = 3; + } else { memcpy(&pb[n], SETUP_WORDS, sizeof SETUP_WORDS); n += sizeof SETUP_WORDS / 4; /* Invalidate the SM instruction, constant and data caches before this launch * (cut 1b finding: a reused code address served stale instructions; clcec0.h @@ -592,6 +637,7 @@ int omega_gpu_session_launch(const OmegaGpuLaunch *L, uint64_t *elapsed_ns, uint pb[n++] = (98u << 16) | (1u << 13) | (0x0318 >> 2) | (2u << 28); pb[n++] = (1u << 30) | (uint32_t)((qmd1_va >> 40) & 0x1ff); pb[n++] = (uint32_t)(qmd1_va >> 8); memcpy(&pb[n], qmd1_words, 96 * 4); n += 96; + } /* first marker */ pb[n++] = bw_mthd(0, 0x005c, 5); pb[n++] = (uint32_t)g_s.marker.va; pb[n++] = (uint32_t)(g_s.marker.va >> 32); @@ -628,10 +674,11 @@ int omega_gpu_session_launch(const OmegaGpuLaunch *L, uint64_t *elapsed_ns, uint return -1; } (void)p->sync_gpu_to_cpu(p->ctx, g_s.marker.handle, 0, 0x20); - (void)p->sync_gpu_to_cpu(p->ctx, g_s.qmd.handle, 0x2000, 4); + if (ampere) (void)p->sync_gpu_to_cpu(p->ctx, g_s.marker.handle, 0x20, 4); + else (void)p->sync_gpu_to_cpu(p->ctx, g_s.qmd.handle, 0x2000, 4); uint64_t t1 = p->time_now_ns(p->ctx); (void)p->queue_retire(p->ctx, g_s.queue); /* both releases landed: the GPFIFO entry is consumed */ - if (*hsem != OMEGA_BW_SEMAPHORE_INTERMEDIATE_DONE) { omega_gpu_session_set_error("intermediate semaphore not DONE"); return -1; } + if (*hsem != (ampere ? 1u : OMEGA_BW_SEMAPHORE_INTERMEDIATE_DONE)) { omega_gpu_session_set_error("intermediate semaphore not DONE"); return -1; } if (elapsed_ns) *elapsed_ns += t1 - t0; if (marker_out) *marker_out = *hmarker; (void)hmarker2; @@ -639,3 +686,4 @@ int omega_gpu_session_launch(const OmegaGpuLaunch *L, uint64_t *elapsed_ns, uint } uint32_t omega_gpu_session_open_count(void) { return g_s.opens; } +uint32_t omega_gpu_session_target_sm(void) { return g_open ? g_target_sm : 0; } diff --git a/src/omega_gpu_session.h b/src/omega_gpu_session.h index 5b6830f0..a2370ae9 100644 --- a/src/omega_gpu_session.h +++ b/src/omega_gpu_session.h @@ -105,7 +105,9 @@ typedef struct { uint32_t spin_us; /* poll the marker without sleeping for up to this long, then the platform's poll_word (Linux reference: 50 us sleep-poll) until timeout_ms; 0 = the process-wide setting (omega_gpu_session_set_spin_us) */ + uint32_t target_sm; /* exact target; 0 retains legacy SM121 */ } OmegaGpuLaunch; +uint32_t omega_gpu_session_target_sm(void); /* 0 when closed */ #define OMEGA_GPU_SESSION_MAX_SPIN_US 1000000u #define OMEGA_GPU_SESSION_MAX_ARGS 32u /* poll_word is called in slices of at most this many ms so a cancel request is seen within one slice */ diff --git a/src/omega_numeric.c b/src/omega_numeric.c index 271f0027..6aecd81d 100644 --- a/src/omega_numeric.c +++ b/src/omega_numeric.c @@ -28,11 +28,16 @@ #include #include #include +#if defined(__x86_64__) +#include +#include +#include +#endif atomic_int omega_numeric_native_state = ATOMIC_VAR_INIT(OMEGA_NUMERIC_NATIVE_IDLE); -#if !defined(__aarch64__) -#error "OMEGA-NUMERIC-0 host tiers use AArch64 FP instructions (fmadd, fdiv, fsqrt, fminnm, scvtf, fcvtzs)" +#if !defined(__aarch64__) && !defined(__x86_64__) +#error "OMEGA-NUMERIC-0 supports AArch64 and x86-64 host tiers" #endif bool omega_numeric_bits_equal(float a, float b) { @@ -45,9 +50,20 @@ bool omega_numeric_bits_equal(float a, float b) { /* ---- Required FP environment ----------------------------------------------- */ uint64_t omega_numeric_read_fpcr(void) { +#if defined(__aarch64__) uint64_t v; __asm__ volatile("mrs %0, fpcr" : "=r"(v) : : "memory"); return v; +#else + /* Preserve the public normalized FPCR-shaped report, not a raw MXCSR. + * MXCSR: RC[14:13], FTZ[15], DAZ[6]. x87 rounding must agree too. */ + unsigned mxcsr = _mm_getcsr(); + uint64_t report = ((uint64_t)((mxcsr >> 13) & 3u)) << 22; + if (mxcsr & (1u << 15)) report |= 1ULL << 24; + if (mxcsr & (1u << 6)) report |= 1ULL; + if (fegetround() != FE_TONEAREST) report |= 1ULL << 22; + return report; +#endif } bool omega_numeric_fpenv_ok(void) { @@ -61,9 +77,14 @@ float omega_ref_fsub(float a, float b) { return a - b; } float omega_ref_fmul(float a, float b) { return a * b; } float omega_ref_ffma(float a, float b, float c) { +#if defined(__aarch64__) float r; __asm__("fmadd %s0, %s1, %s2, %s3" : "=w"(r) : "w"(a), "w"(b), "w"(c)); return r; +#else + /* C fmaf requires one rounding, including on x86 CPUs without FMA3. */ + return fmaf(a, b, c); +#endif } float omega_ref_fmin(float a, float b) { @@ -300,7 +321,12 @@ float omega_ref_ffma_int(float a, float b, float c) { #define HWCAP2_BF16 (1UL << 14) #endif bool omega_numeric_cpu_has_bf16(void) { +#if defined(__aarch64__) return (getauxval(AT_HWCAP2) & HWCAP2_BF16) != 0; +#else + /* The x86 tier uses the exact integer conversion, not an optional ISA. */ + return false; +#endif } /* Predicate truth per comparison outcome: bit 0 less, bit 1 equal, bit 2 @@ -345,15 +371,23 @@ int omega_ref_fsetp_pred(int op, float a, float b) { } float omega_ieee_div(float x, float y) { +#if defined(__aarch64__) float r; __asm__("fdiv %s0, %s1, %s2" : "=w"(r) : "w"(x), "w"(y)); return r; +#else + return _mm_cvtss_f32(_mm_div_ss(_mm_set_ss(x), _mm_set_ss(y))); +#endif } float omega_ieee_sqrt(float x) { +#if defined(__aarch64__) float r; __asm__("fsqrt %s0, %s1" : "=w"(r) : "w"(x)); return r; +#else + return _mm_cvtss_f32(_mm_sqrt_ss(_mm_set_ss(x))); +#endif } /* ---- Host seed used only by the raw-seed negative test ------------------- */ @@ -1339,6 +1373,40 @@ int omega_numeric_cpu_realize(OmegaNumericOp op, const float *a, const float *b, if ((op == OMEGA_NOP_SHFL_DOWN || op == OMEGA_NOP_REDUCE_SUM) && (count % 32u) != 0) return OMEGA_NUMERIC_ERR_OPERANDS; if (op == OMEGA_NOP_LDS_STS && (count % OMEGA_NUMERIC_CTA_THREADS) != 0) return OMEGA_NUMERIC_ERR_OPERANDS; +#if defined(__x86_64__) + /* Integer-defined conversions and warp permutations are shared with the + * bit-model. They are not an independent hardware conversion oracle. + * Arithmetic below is independently realized by scalar SSE / fused libm. */ + switch (op) { + case OMEGA_NOP_FADD: case OMEGA_NOP_FSUB: case OMEGA_NOP_FMUL: + case OMEGA_NOP_FFMA: case OMEGA_NOP_FFMA_V: case OMEGA_NOP_I2FP: + case OMEGA_NOP_MUFU_RCP: case OMEGA_NOP_MUFU_RSQ: case OMEGA_NOP_REDUCE_SUM: + break; + default: + return omega_numeric_reference(op, a, b, c, out, count); + } + for (size_t i = 0; i < count; ++i) { + float x = a[i], y = b ? b[i] : 0.0f; + __m128 vx = _mm_set_ss(x), vy = _mm_set_ss(y); + switch (op) { + case OMEGA_NOP_FADD: out[i] = _mm_cvtss_f32(_mm_add_ss(vx, vy)); break; + case OMEGA_NOP_FSUB: out[i] = _mm_cvtss_f32(_mm_sub_ss(vx, vy)); break; + case OMEGA_NOP_FMUL: out[i] = _mm_cvtss_f32(_mm_mul_ss(vx, vy)); break; + case OMEGA_NOP_FFMA: + case OMEGA_NOP_FFMA_V: out[i] = fmaf(x, y, c[i]); break; + case OMEGA_NOP_I2FP: + out[i] = _mm_cvtss_f32(_mm_cvtsi32_ss(_mm_setzero_ps(), (int32_t)omega_float_to_bits(x))); + break; + case OMEGA_NOP_MUFU_RCP: out[i] = omega_ieee_div(1.0f, x); break; + case OMEGA_NOP_MUFU_RSQ: out[i] = omega_ieee_div(1.0f, omega_ieee_sqrt(x)); break; + case OMEGA_NOP_REDUCE_SUM: + out[i] = ((i & 31u) == 0) ? cpu_tree_sum32(&a[i]) : 0.0f; + break; + default: break; + } + } + return OMEGA_NUMERIC_OK; +#else const bool bf16 = op == OMEGA_NOP_F32_TO_BF16 && omega_numeric_cpu_has_bf16(); for (size_t i = 0; i < count; i++) { float r = 0.0f; @@ -1487,6 +1555,7 @@ int omega_numeric_cpu_realize(OmegaNumericOp op, const float *a, const float *b, } out[i] = r; } +#endif return OMEGA_NUMERIC_OK; } diff --git a/src/omega_numeric.h b/src/omega_numeric.h index b3548189..af152711 100644 --- a/src/omega_numeric.h +++ b/src/omega_numeric.h @@ -27,8 +27,8 @@ * src/omega_numeric_gb10.c. * * Build with -ffp-contract=off: the reference and CPU tiers must not depend - * on whether the compiler fuses a*b+c. Fused operations are written as - * explicit AArch64 instructions. + * on whether the compiler fuses a*b+c. Fused operations use explicit AArch64 + * instructions or the correctly rounded x86 host fmaf implementation. */ #include @@ -100,7 +100,11 @@ static inline bool omega_iszero(float x) { * omega_numeric_reference, omega_numeric_cpu_realize, * omega_numeric_reference_ftz and omega_numeric_seed_bound refuse with * OMEGA_NUMERIC_ERR_FPENV (and compute nothing) when any is set. They never - * change FPCR themselves. + * change the environment themselves. On x86-64, MXCSR rounding, FTZ and DAZ + * and the x87 rounding mode are checked; read_fpcr returns a normalized report + * in the same bit positions (not the raw MXCSR). The x86 arithmetic tier uses + * scalar SSE and fmaf (existing host libm dependency); integer conversions + * share the exact bit-model and are not an independent conversion oracle. */ #define OMEGA_NUMERIC_FPCR_REQUIRED_CLEAR \ ((1ULL << 0) | (1ULL << 1) | (1ULL << 2) | (1ULL << 19) | (3ULL << 22) | (1ULL << 24) | (1ULL << 25) | \ @@ -152,12 +156,12 @@ int omega_ref_fsetp_pred(int op, float a, float b); /* a * b + c rounded once (RNE, subnormals kept), integer arithmetic on the bit * patterns (no FMADD). NaN results are the canonical quiet NaN. */ float omega_ref_ffma_int(float a, float b, float c); -/* True when the host CPU has FEAT_BF16 (BFCVT); the CPU realization of - * F32_TO_BF16 then uses BFCVT, otherwise it refuses (OMEGA_NUMERIC_ERR_NOT_ENCODED). */ +/* True when the AArch64 CPU has FEAT_BF16 (BFCVT). Other hosts return false. + * The x86 tier implements the exact integer BF16 conversion without that ISA. */ bool omega_numeric_cpu_has_bf16(void); -/* Correctly rounded IEEE division and square root (the AArch64 FDIV/FSQRT - * instructions; not libm). The semantic target for omega_math_div/sqrt. */ +/* Correctly rounded IEEE division and square root (AArch64 FDIV/FSQRT or + * x86 scalar SSE). The semantic target for omega_math_div/sqrt. */ float omega_ieee_div(float x, float y); float omega_ieee_sqrt(float x); diff --git a/src/omega_numeric_reduce.c b/src/omega_numeric_reduce.c index 3dffadfe..674b4c31 100644 --- a/src/omega_numeric_reduce.c +++ b/src/omega_numeric_reduce.c @@ -26,8 +26,10 @@ #include #include -#if !defined(__aarch64__) -#error "E1 reduction CPU tier uses AArch64 FP instructions (fadd, fmaxnm, fminnm, fdiv, ucvtf)" +#if defined(__x86_64__) +#include +#elif !defined(__aarch64__) +#error "E1 reduction CPU tier supports AArch64 and x86-64" #endif static const char *const RED_NAMES[OMEGA_RED_COUNT] = { "SUM", "MAX", "MIN", "MEAN" }; @@ -122,6 +124,7 @@ int omega_reduce_reference(OmegaReduceOp op, const float *x, size_t n, float *ou /* ---- CPU realization tier ------------------------------------------------- */ static inline float cpu_combine(OmegaReduceOp op, float a, float b) { +#if defined(__aarch64__) float r; if (op == OMEGA_RED_SUM) { __asm__ volatile("fadd %s0, %s1, %s2" : "=w"(r) : "w"(a), "w"(b)); @@ -134,6 +137,20 @@ static inline float cpu_combine(OmegaReduceOp op, float a, float b) { if (op == OMEGA_RED_MAX) __asm__ volatile("fmaxnm %s0, %s1, %s2" : "=w"(r) : "w"(qa), "w"(qb)); else __asm__ volatile("fminnm %s0, %s1, %s2" : "=w"(r) : "w"(qa), "w"(qb)); return r; +#else + if (op == OMEGA_RED_SUM) + return _mm_cvtss_f32(_mm_add_ss(_mm_set_ss(a), _mm_set_ss(b))); + /* SSE MINSS/MAXSS do not implement minimumNumber for NaN and signed + * zero. Spell that contract explicitly rather than using those opcodes. */ + if (omega_isnan(a)) return b; + if (omega_isnan(b)) return a; + if (a == 0.0f && b == 0.0f) { + uint32_t ua = omega_float_to_bits(a), ub = omega_float_to_bits(b); + uint32_t sign = op == OMEGA_RED_MAX ? (ua & ub) : (ua | ub); + return omega_bits_to_float(sign & 0x80000000u); + } + return op == OMEGA_RED_MAX ? (a > b ? a : b) : (a < b ? a : b); +#endif } /* One buffer, compacted in place: tile j's result goes to buf[j] (j <= 32j). */ @@ -173,8 +190,13 @@ int omega_reduce_cpu(OmegaReduceOp op, const float *x, size_t n, float *out) { rc = cpu_sum_like(OMEGA_RED_SUM, x, n, &s); if (rc != OMEGA_NUMERIC_OK) return rc; uint32_t n32 = (uint32_t)n; +#if defined(__aarch64__) __asm__ volatile("ucvtf %s0, %w1" : "=w"(fn) : "r"(n32)); __asm__ volatile("fdiv %s0, %s1, %s2" : "=w"(r) : "w"(s), "w"(fn)); +#else + fn = (float)n32; + r = _mm_cvtss_f32(_mm_div_ss(_mm_set_ss(s), _mm_set_ss(fn))); +#endif *out = r; return OMEGA_NUMERIC_OK; } diff --git a/src/omega_numeric_reduce.h b/src/omega_numeric_reduce.h index ac9cf9c9..f37b866b 100644 --- a/src/omega_numeric_reduce.h +++ b/src/omega_numeric_reduce.h @@ -82,8 +82,9 @@ unsigned omega_reduce_levels(size_t n); * each tile into 32 slots, pad, run the lane tree). */ int omega_reduce_reference(OmegaReduceOp op, const float *x, size_t n, float *out); -/* CPU realization tier: independent code (bottom-up in place, explicit - * AArch64 FADD / FMAXNM / FMINNM / FDIV / UCVTF). */ +/* CPU realization tier: independent bottom-up code. AArch64 uses explicit + * FADD/FMAXNM/FMINNM/FDIV/UCVTF; x86 uses scalar SSE with explicit NaN and + * signed-zero handling for minimum/maximum. */ int omega_reduce_cpu(OmegaReduceOp op, const float *x, size_t n, float *out); /* Batched: out[r] = reduce(x[r*row_stride .. r*row_stride + n)) for r < rows, diff --git a/src/omega_runtime_api.h b/src/omega_runtime_api.h index f72b58c4..26623c91 100644 --- a/src/omega_runtime_api.h +++ b/src/omega_runtime_api.h @@ -14,7 +14,7 @@ * tools/runtime_api_semver.sh fails when the manifest changed without the bump the rule asks for. */ #define OMEGA_RUNTIME_API_VERSION_MAJOR 0 -#define OMEGA_RUNTIME_API_VERSION_MINOR 6 +#define OMEGA_RUNTIME_API_VERSION_MINOR 7 #define OMEGA_RUNTIME_API_VERSION_PATCH 0 /* One number for #if comparisons: (MAJOR << 16) | MINOR. PATCH is left out: it never changes the surface. */ #define OMEGA_RUNTIME_API_VERSION ((OMEGA_RUNTIME_API_VERSION_MAJOR << 16) | OMEGA_RUNTIME_API_VERSION_MINOR) diff --git a/tests/ampere/.crumb b/tests/ampere/.crumb new file mode 100644 index 00000000..57756223 --- /dev/null +++ b/tests/ampere/.crumb @@ -0,0 +1,20 @@ +{ + "extensions": { + "generated": { + "children": [], + "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", + "compiled_at": "2026-10-28T17:00:43Z", + "compiler": "crumb-compile/1", + "digest": "sha256:d4a012604c144937114a37f7098191245497a2199020f4d2fb3646a067ecae83", + "evidence_files": 0, + "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", + "files": 0, + "generated_at_commit": "6e8c383fd8b7bd0d09fbbe8e3c36f32818d58bae", + "source_tree": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855" + } + }, + "layer": "tests", + "name": "ampere-device-tests", + "purpose": "Host-only preflight fixtures and explicit opt-in RTX3090/RTX3060Ti device qualification; all real devices remain NOT_RUN until receipts exist", + "schema_version": "1.0.0" +} diff --git a/tests/ampere/README.md b/tests/ampere/README.md new file mode 100644 index 00000000..cedf942b --- /dev/null +++ b/tests/ampere/README.md @@ -0,0 +1,161 @@ +# Ampere device qualification plan + +**RTX 3090 (GA102): NOT_RUN. RTX 3060 Ti (GA104): NOT_RUN.** +No RTX card is attached to the development Spark. Host, emulator, simulated-driver, +ELF inspection and nvdisasm results do not change either device status. This plan +is for a separate Linux x86_64 machine with an explicitly authorized GPU window. +It never stops a serving process, changes clocks, loads a module, or installs a driver. + +## Prerequisites and exact target + +NVIDIA lists both products at compute capability 8.6: +[CUDA GPUs](https://developer.nvidia.com/cuda/gpus.md). +The [3090 specifications](https://www.nvidia.com/en-us/geforce/graphics-cards/30-series/rtx-3090-3090ti/) +list 24 GB GDDR6X; [3060 Ti specifications](https://www.nvidia.com/en-us/geforce/graphics-cards/30-series/rtx-3060-3060ti/) +list 8 GB GDDR6/GDDR6X. Do not use system RAM as the discrete allocation budget. + +The initial direct-driver ABI is pinned to NVIDIA **580.173.02**, matching +`third_party/nvidia-open-580.173.02`. The +[pinned open-module README](https://github.com/NVIDIA/open-gpu-kernel-modules/blob/580.173.02/README.md) +supports Linux x86_64 and Turing or later, including these cards. Open-module +support is not evidence that CUDA++'s direct RM/UVM path has run on them. +Do not bypass a mismatched-driver refusal. A different driver needs its own +reviewed header/ABI update before device execution. + +The doctor accepts the requested GA102/GA104 PCI IDs: 2204 (3090), 2486 and +2489 (3060 Ti). Other products sold under a 3060 Ti name have distinct PCI IDs; +they are not silently treated as GA104. The actual PCI ID must be recorded. + +Drake must provide the machine holding each card, its OS, driver version, and SSH +access. On that machine, obtain its PCI BDF with the read-only doctor or `lspci`. +`CUDAPP_GPU_BDF` selects that same exact device in the runtime. No device tests +are authorized on the development Spark by this plan. + +## Build without a GPU + +```sh +make all hello-gpu-build ampere-device-build +make test-ampere-plan +``` + +Use the portable generated-from-Omega units. Do not substitute the migration C +encoder, AArch64 machine-code trampolines, or a QEMU-AArch64 run for an x86 build. +Keep the source commit, converter pin, seeded compiler hash, generated provenance, +compiler version and full build/test logs with the run. The normal host suite is +`make test`; the Ampere-specific nvdisasm gate is: +`make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle`. +It includes an intentionally corrupted encoding negative control that must fail. + +## Read-only doctor + +```sh +python3 tests/ampere/doctor.py --bdf 0000:01:00.0 +``` + +Expected JSON: `preflight: PASS`, `machine: x86_64`, `open_module: true`, driver +`580.173.02`, exactly the selected GA102/GA104 GPU with `target: sm_86`, and +`device_execution: NOT_RUN`. It reads `/proc`, `/sys`, and node access bits only; +it never opens a GPU. PASS means the preconditions hold, not qualification. +A closed module, unknown card, missing node, ambiguous selection, or ABI mismatch +must exit 1. A `--root` filesystem fixture is always labeled **SIMULATED**. + +## Authorized device run and receipts + +Use a **new** evidence directory per card and source revision: + +```sh +python3 tests/ampere/run.py --device --bdf 0000:01:00.0 \ + --output evidence/ampere-ga102-first-run --full-math +``` + +Run again on the GA104 machine with its BDF and another new output directory. +The runner refuses to overwrite existing receipts. `results.json` starts with +all checks `NOT_RUN`; only actually executed checks become PASS or FAIL. It +stops on a failure, preserving the failing log and leaving later checks NOT_RUN. +Without `--full-math`, `math-exhaustive` remains NOT_RUN even if smoke tests pass. + +| Check | Expected output / criterion | GA102 | GA104 | +|---|---|---|---| +| doctor | Exact GPU, open module, pinned ABI; preflight PASS | NOT_RUN | NOT_RUN | +| hello | `checked 1048576 of 1048576 elements: 0 wrong, 0 never written`, exit 0 | NOT_RUN | NOT_RUN | +| hello negative control | One deliberately unwritten result, `1 wrong, 1 never written`, exit 1 | NOT_RUN | NOT_RUN | +| safe reserve refusal | `AMPERE MEMORY REFUSAL PASS`; no new RM allocation ioctl; free VRAM unchanged | NOT_RUN | NOT_RUN | +| math smoke | Four `SHARD PASS` lines; not exhaustive evidence | NOT_RUN | NOT_RUN | +| math negative control | Deliberately sign-corrupted first reciprocal result is caught, exit 1 | NOT_RUN | NOT_RUN | +| math exhaustive | Four `EXHAUSTIVE PASS` lines over all binary32 bit patterns, exit 0 | NOT_RUN | NOT_RUN | + +### Vector add + +```sh +CUDAPP_GPU_BDF=0000:01:00.0 build/hello_gpu --target=sm_86 +CUDAPP_GPU_BDF=0000:01:00.0 build/hello_gpu_control --target=sm_86 --bug=short +``` + +The second command **must fail** with exit 1; no out-of-bounds access is involved. +Both programs verify every output element, print code/output hashes and synchronize +CPU/device visibility explicitly. Ampere output must not reuse GB10 bandwidth claims. +`--sim --target=sm_86` is an IR **SIMULATED** result, not SASS or device evidence. + +### Exhaustive numerical checks + +```sh +CUDAPP_GPU_BDF=0000:01:00.0 build/ampere_math_device --device +``` + +The verifier sweeps every binary32 input bit pattern for each emitted unary MUFU +function: reciprocal, reciprocal square root, base-two exponential and logarithm. +A bounded batch is uploaded/read back on every iteration; no full-domain buffer +is allocated. It checks NaN classification, infinities, signed zero and finite +error, against independent host long-double libm. NaN payload identity is not a +contract. A shard can be selected with `--start` and `--count`; it prints +`SHARD PASS`, never `EXHAUSTIVE PASS`. This is not an exhaustive binary-operand +Cartesian product or a claim about correctly rounded software divide/sqrt. + +The intended non-FTZ bounds are NVIDIA PTX ISA 9.4 sections 9.7.3.13, 9.7.3.16, +9.7.3.20 and 9.7.3.21: reciprocal 1 ULP; reciprocal square root relative error +`2^-22.9`; logarithm absolute error `2^-22` for input in `(0.5,2)` and relative +error `2^-22` outside it; exponential 2 ULP. **Raw MUFU equivalence to these +PTX-level contracts, especially subnormal handling, is unqualified.** A failure +is a defect to fix in normalization/kernel generation, not permission to skip +inputs or enlarge a bound. A long-double libm comparison is a test oracle, not +a formal correctly-rounded reference proof. + +Symbolic formula check used while writing this verifier: +`WolframLanguageEvaluator: {FullSimplify[1/Sqrt[x] == x^(-1/2), Assumptions->x>0], FullSimplify[Log[x]/Log[2] == Log[2,x], Assumptions->x>0], 2^(-22)} -> {True, True, 1/4194304}`. + +Negative control (small, safe shard, still real device work): + +```sh +CUDAPP_GPU_BDF=0000:01:00.0 build/ampere_math_device --device \ + --count 65536 --inject-output-error +``` + +It corrupts only the CPU-side readback after the GPU finishes. Expected: +`AMPERE MATH FAIL op=rcp input=00000000`, exit 1. +`--self-test` checks the host oracle's special-value/refusal controls without a GPU; +`--emit-only` emits all four kernels without opening a GPU. + +### Safe memory refusal, not an OOM test + +```sh +CUDAPP_GPU_BDF=0000:01:00.0 build/ampere_memory_refusal --device +``` + +The session opens first, then the test queries actual free and total VRAM, sets +`CUDAPP_GPU_MIN_FREE_BYTES` above total (therefore above free), and requests only a +small page. Even a concurrent free cannot turn this into a real allocation. +The request must be rejected by D1 **before any RM allocation ioctl**. +A link-time ioctl wrapper counts real allocation escapes independently of the +return code. A second RM heap query must report identical free and total VRAM. +Concurrent GPU users can change free VRAM and make this proof inconclusive/FAIL; +reserve an idle window rather than allocating pressure or relaxing the check. +Never allocate the card's capacity, exhaust UVM/system memory, or use a real OOM +as a refusal test. Host simulated-driver tests are explicitly SIMULATED. + +## Recording qualification + +Keep complete per-check logs and `results.json` with the exact source revision. +A doctor PASS, disassembler PASS, or x86 host PASS must never be copied into a +device result. No script modifies the qualified-device table. Only actual real-card +results with the required negative controls can support a separate reviewed +qualification change. Any failed check leaves the corresponding card unqualified. diff --git a/tests/ampere/doctor.py b/tests/ampere/doctor.py new file mode 100755 index 00000000..8ae36d76 --- /dev/null +++ b/tests/ampere/doctor.py @@ -0,0 +1,89 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +"""Read-only qualification preflight. Never opens a GPU or changes its driver.""" +import argparse +import json +import os +from pathlib import Path +import platform +import re +import sys + +# NVIDIA open-gpu-kernel-modules 580.173.02 README Compatible GPUs table. +# Only GA102/GA104 IDs requested by this port. Other 3060 Ti die variants refuse. +CARDS = {"0x2204": ("RTX 3090", "GA102"), + "0x2486": ("RTX 3060 Ti", "GA104"), + "0x2489": ("RTX 3060 Ti", "GA104")} +ABI = "580.173.02" + +def inspect(root=Path("/"), bdf=None, machine=None): + simulated = root.resolve() != Path("/") + problems = [] + def text(name): + try: + return (root / name).read_text().strip() + except OSError: + return "" + machine = machine or platform.machine() + if machine != "x86_64": + problems.append("host must be Linux x86_64 for this device plan") + if platform.system() != "Linux": + problems.append("host OS must be Linux") + module = text("proc/driver/nvidia/version") + open_module = "Open Kernel Module" in module + version = re.search(r"\b([0-9]+\.[0-9]+\.[0-9]+)\b", module) + version = version.group(1) if version else None + if not open_module: + problems.append("NVIDIA open kernel module must be loaded") + if version != ABI: + problems.append("driver ABI must match vendored " + ABI + "; do not force another version") + cards = [] + for device in sorted((root / "sys/bus/pci/devices").glob("*")): + try: + vendor = (device / "vendor").read_text().strip().lower() + kind = (device / "device").read_text().strip().lower() + pci_class = (device / "class").read_text().strip().lower() + except OSError: + continue + if vendor != "0x10de" or not pci_class.startswith("0x03"): + continue + if bdf and device.name != bdf: + continue + identity = CARDS.get(kind) + cards.append({"bdf": device.name, "pci_device": kind, + "name": identity[0] if identity else "unsupported NVIDIA GPU", + "die": identity[1] if identity else None, + "target": "sm_86" if identity else None}) + if len(cards) != 1: + problems.append("select exactly one target GPU with --bdf (or attach exactly one)") + elif cards[0]["target"] != "sm_86": + problems.append("selected PCI ID is not a requested GA102/GA104 target") + nodes = ["nvidiactl", "nvidia-uvm"] + if len(cards) == 1: + info = text("proc/driver/nvidia/gpus/" + cards[0]["bdf"] + "/information") + minor = re.search(r"^Device Minor:\s*([0-9]+)\s*$", info, re.MULTILINE) + if not minor: + problems.append("selected GPU has no driver Device Minor mapping") + else: + cards[0]["device_node"] = "/dev/nvidia" + minor.group(1) + nodes.append("nvidia" + minor.group(1)) + for node in nodes: + path = root / "dev" / node + if not path.exists() or not os.access(path, os.R_OK | os.W_OK): + problems.append("missing/inaccessible /dev/" + node) + return {"preflight": "FAIL" if problems else "PASS", "evidence": "SIMULATED" if simulated else "OBSERVED", + "device_execution": "NOT_RUN", "machine": machine, "driver_version": version, + "open_module": open_module, "gpus": cards, "problems": problems, + "note": "Preflight PASS is not hardware qualification or permission to submit work."} + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("--root", type=Path, default=Path("/"), help="fake machine root; results labeled SIMULATED") + parser.add_argument("--bdf", help="selected full PCI address, e.g. 0000:01:00.0") + args = parser.parse_args() + report = inspect(args.root, args.bdf) + print(json.dumps(report, indent=2, sort_keys=True)) + return 0 if report["preflight"] == "PASS" else 1 + +if __name__ == "__main__": + sys.exit(main()) diff --git a/tests/ampere/math_device.c b/tests/ampere/math_device.c new file mode 100644 index 00000000..466ac371 --- /dev/null +++ b/tests/ampere/math_device.c @@ -0,0 +1,160 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Device-only verifier: full binary32 input sweep for the four emitted MUFU functions. + * Independent host oracle: system long-double libm, not another CUDA++ kernel. + * Bounds: NVIDIA PTX ISA 9.4 sections 9.7.3.13,16,20,21. This checks intended + * non-FTZ PTX-level numerical contracts; raw MUFU equivalence is NOT yet qualified. + * No GPU is opened without the explicit --device flag. Shards are never exhaustive PASS. */ +#include "omega_ampere_codegen.h" +#include "omega_gpu_session.h" +#include +#include +#include +#include +#include +#include +#include + +#define BATCH 65536u +#define NOREG (-1) +#define FULL_DOMAIN UINT64_C(0x100000000) +#define CTRL(stall,wbar,rbar,wait) \ + (((uint32_t)(stall)<<9)|((uint32_t)(wbar)<<14)|((uint32_t)(rbar)<<17)|((uint32_t)(wait)<<20)) +#define ALU CTRL(15,7,7,0) +#define LOAD_CTRL (CTRL(4,0,7,0)|0x2000u) +static uint32_t bits(float x) { uint32_t u; memcpy(&u,&x,sizeof u); return u; } +static float number(uint32_t u) { float x; memcpy(&x,&u,sizeof x); return x; } +static int append(BlackwellIRProgram *p, BlackwellIROpcode op, int d, int a, int b, int c, uint32_t imm, uint32_t control, int uniform, int pred) { + BlackwellIRInsn i = {0}; + i.op=op; i.dst_vreg=d; i.src1_vreg=a; i.src2_vreg=b; i.src3_vreg=c; i.ureg=NOREG; + i.imm=imm; i.control=control; i.is_uniform=uniform; i.predicate_p0=pred; + return omega_bw_ir_append(p,&i)<0 ? -1 : 0; +} +static int kernel(BlackwellIRProgram *p, BlackwellIROpcode math) { + omega_bw_ir_init(p); + int src=omega_bw_ir_alloc_vreg64(p), dst=omega_bw_ir_alloc_vreg64(p); + int tid=omega_bw_ir_alloc_vreg(p), cta=omega_bw_ir_alloc_vreg(p), n=omega_bw_ir_alloc_vreg(p); + int i=omega_bw_ir_alloc_vreg(p), address=omega_bw_ir_alloc_vreg64(p); + int x=omega_bw_ir_alloc_vreg(p), y=omega_bw_ir_alloc_vreg(p); + /* Conservative scheduling: no dependent instruction is issued before its load barrier. + * Each producer allocates barrier zero; the next instruction waits on barrier zero. */ + uint32_t pending=0; +#define EMIT(OP,D,A,B,C,IMM,BASE,PRED) do { if(append(p,OP,D,A,B,C,IMM,(BASE)|(pending<<20),0,PRED))return -1; pending=0; } while(0) +#define LOAD(OP,D,A,IMM) do { EMIT(OP,D,A,NOREG,NOREG,IMM,LOAD_CTRL,0); pending=1u; } while(0) + LOAD(BW_IR_LDC64,src,NOREG,0x380); + LOAD(BW_IR_LDC64,dst,NOREG,0x388); + LOAD(BW_IR_LDC,n,NOREG,0x390); + LOAD(BW_IR_S2R,tid,NOREG,BW_SR_TID_X); + LOAD(BW_IR_S2R,cta,NOREG,BW_SR_CTAID_X); + EMIT(BW_IR_IMAD,i,cta,NOREG,tid,256,ALU,0); + EMIT(BW_IR_ISETP_GE_U32,NOREG,i,n,NOREG,0,ALU,0); + EMIT(BW_IR_EXIT,NOREG,NOREG,NOREG,NOREG,0,ALU,1); + EMIT(BW_IR_IMAD_WIDE,address,i,NOREG,src,4,ALU,0); + LOAD(BW_IR_LDG_E,x,address,0); + /* MUFU completes through a scoreboard, not a fixed arithmetic delay. */ + EMIT(math,y,x,NOREG,NOREG,0,LOAD_CTRL,0); pending=1u; + EMIT(BW_IR_IMAD_WIDE,address,i,NOREG,dst,4,ALU,0); + EMIT(BW_IR_STG_E,NOREG,address,y,NOREG,0,CTRL(4,7,1,0)|0x2000u,0); pending=2u; + EMIT(BW_IR_EXIT,NOREG,NOREG,NOREG,NOREG,0,ALU,0); + EMIT(BW_IR_BRA,NOREG,NOREG,NOREG,NOREG,0,0x000fc000u,0); +#undef EMIT +#undef LOAD + return omega_bw_regalloc_solve(p); +} +static int agrees(unsigned op,uint32_t input,uint32_t output) { + float x=number(input), got=number(output); + long double ref; + switch(op) { + case 0: ref=1.0L/(long double)x; break; + case 1: ref=1.0L/sqrtl((long double)x); break; + case 2: ref=exp2l((long double)x); break; + default: ref=log2l((long double)x); break; + } + if (isnan(ref)) return isnan(got); + float rounded=(float)ref; + if (isinf(rounded)||rounded==0.0f) return output==bits(rounded); + if (!isfinite(got)) return 0; + if (op==0||op==2) { + uint32_t want=bits(rounded); + if ((output>>31)!=(want>>31)) return 0; + uint32_t distance=output>want?output-want:want-output; + return distance <= (op==0?1u:2u); + } + long double error=fabsl((long double)got-ref); + if(op==1) return error<=fabsl(ref)*exp2l(-22.9L); + if(x>0.5f && x<2.0f) return error<=0x1p-22L; + return error<=fabsl(ref)*0x1p-22L; +} +static int parse_u64(const char *s,uint64_t *v) { + char *end; errno=0; *v=strtoull(s,&end,0); + return errno||!s[0]||s[0]=='-'||*end ? -1:0; +} +int main(int argc,char **argv) { + uint64_t start=0,count=FULL_DOMAIN; int device=0,inject=0,rc=1,emit=0,selftest=0; + for(int i=1;i=FULL_DOMAIN||!count||count>FULL_DOMAIN-start)return 64; + static const BlackwellIROpcode ops[]={BW_IR_MUFU_RCP,BW_IR_MUFU_RSQ,BW_IR_MUFU_EX2,BW_IR_MUFU_LG2}; + static const char *names[]={"rcp","rsqrt","exp2","log2"}; + if (selftest) { + for(unsigned op=0;op<4;op++) { + uint32_t correct=op==3?0xff800000u:op==2?0x3f800000u:0x7f800000u; + if(!agrees(op,0,correct)||agrees(op,0,correct^0x80000000u))return 1; + if(!agrees(op,0x7fc00000u,0x7fc12345u)||agrees(op,0x7fc00000u,0x3f800000u))return 1; + } + puts("AMPERE MATH HOST ORACLE CONTROLS PASS; DEVICE NOT_RUN");return 0; + } + if (emit) { + for(unsigned op=0;op<4;op++) { + BlackwellIRProgram program; uint8_t code[16384];size_t written=0; + if(kernel(&program,ops[op])||omega_bw_encode_program(&program,code,sizeof code,&written)|| + omega_gpu_encode_program_target(&program,86,code,sizeof code,&written))return 1; + } + puts("AMPERE MATH KERNEL EMISSION PASS; DEVICE NOT_RUN");return 0; + } + if(!device) { puts("AMPERE MATH DEVICE NOT_RUN (explicit --device required)");return 2; } + if(inject&&(start!=0||count!=BATCH))return 64; + OmegaGpuMem in={0},out={0},code={0}; + omega_gpu_session_lock(); + if(!omega_gpu_session_open()||omega_gpu_session_target_sm()!=86) { + fprintf(stderr,"AMPERE MATH NOT_RUN: target/open: %s\n",omega_gpu_session_last_error());rc=2;goto done; + } + if(omega_gpu_session_alloc(BATCH*sizeof(uint32_t),&in)||omega_gpu_session_alloc(BATCH*sizeof(uint32_t),&out))goto done; + for(unsigned op=0;opBATCH?BATCH:(uint32_t)(count-offset); + for(uint32_t j=0;j>32),(uint32_t)out.va,(uint32_t)(out.va>>32),n}; + OmegaGpuLaunch launch={.code_va=code.va,.gpr_count=64,.threads_x=256,.threads_y=1,.grid_x=(n+255)/256,.grid_y=1, + .num_elements=n,.args=args,.n_args=32,.timeout_ms=10000,.target_sm=86}; + if(omega_gpu_session_launch(&launch,NULL,NULL)||omega_gpu_session_sync_to_cpu(&out))goto done; + if(inject&&offset==0)((uint32_t *)out.cpu)[0]^=0x80000000u; + for(uint32_t j=0;j +#include +#include +#include +#include +#include +#include + +static uint64_t allocation_ioctls; +int __real_ioctl(int fd,unsigned long request,...); +int __wrap_ioctl(int fd,unsigned long request,...) { + va_list ap; va_start(ap,request);void *argument=va_arg(ap,void *);va_end(ap); + if(_IOC_TYPE(request)==NV_IOCTL_MAGIC && + (_IOC_NR(request)==NV_ESC_RM_ALLOC||_IOC_NR(request)==NV_ESC_RM_ALLOC_MEMORY|| + _IOC_NR(request)==NV_ESC_RM_ALLOC_OBJECT||_IOC_NR(request)==NV_ESC_RM_ALLOC_CONTEXT_DMA2)) + allocation_ioctls++; + return __real_ioctl(fd,request,argument); +} +int main(int argc,char **argv) { + if(argc!=2||strcmp(argv[1],"--device")) { puts("AMPERE MEMORY REFUSAL NOT_RUN (explicit --device required)");return 2; } + int rc=1;uint64_t before=0,total=0,after=0,total_after=0; + OmegaGpuMem small={0}; + omega_gpu_session_lock(); + if(!omega_gpu_session_open()||omega_gpu_session_target_sm()!=86) { + fprintf(stderr,"AMPERE MEMORY REFUSAL NOT_RUN: open/target: %s\n",omega_gpu_session_last_error());rc=2;goto done; + } + if(omega_gpu_platform_linux_vram_info(&before,&total)||before>total||total==UINT64_MAX)goto done; + /* Above total is also above free, even if another process frees VRAM + * between these queries. This can never become a real pressure allocation. */ + char reserve[32];snprintf(reserve,sizeof reserve,"%"PRIu64,total+1); + if(setenv("CUDAPP_GPU_MIN_FREE_BYTES",reserve,1))goto done; + uint64_t calls_before=allocation_ioctls; + int allocated=omega_gpu_session_alloc(4096,&small); + uint64_t calls_after=allocation_ioctls; + if(omega_gpu_platform_linux_vram_info(&after,&total_after))goto done; + printf("reserve_bytes=%s requested_bytes=4096 free_before_bytes=%"PRIu64" free_after_bytes=%"PRIu64" total_bytes=%"PRIu64" rm_alloc_calls_before=%"PRIu64" rm_alloc_calls_after=%"PRIu64"\n", + reserve,before,after,total,calls_before,calls_after); + if(!allocated||small.cpu||small.va||calls_before!=calls_after||before!=after||total!=total_after) { + fprintf(stderr,"AMPERE MEMORY REFUSAL FAIL (allocation, driver call, or VRAM delta observed)\n");goto done; + } + if(!strstr(omega_gpu_session_last_error(),"reserve")) { + fprintf(stderr,"AMPERE MEMORY REFUSAL FAIL: refusal was not the reserve gate: %s\n",omega_gpu_session_last_error());goto done; + } + puts("AMPERE MEMORY REFUSAL PASS (small allocation refused before RM allocation; free VRAM unchanged)");rc=0; +done: + if(small.cpu)omega_gpu_session_free(&small); + if(rc==1)fprintf(stderr,"AMPERE MEMORY REFUSAL FAIL stage=%s\n",omega_gpu_session_last_error()); + omega_gpu_session_unlock();omega_gpu_session_close();return rc; +} diff --git a/tests/ampere/run.py b/tests/ampere/run.py new file mode 100755 index 00000000..d605477b --- /dev/null +++ b/tests/ampere/run.py @@ -0,0 +1,71 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +"""Explicit device-only Ampere checks. Never substitutes simulation or updates old receipts.""" +import argparse +import datetime +import json +import os +from pathlib import Path +import subprocess +import sys + +ROOT = Path(__file__).resolve().parents[2] + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("--device", action="store_true", help="authorize submissions on this machine") + parser.add_argument("--bdf", required=True, help="exact GA102/GA104 full PCI BDF") + parser.add_argument("--output", required=True, type=Path, help="new evidence directory; existing paths refuse") + parser.add_argument("--build", type=Path, default=ROOT / "build") + parser.add_argument("--full-math", action="store_true", help="all binary32 inputs per unary function; otherwise NOT_RUN") + args = parser.parse_args() + if not args.device: + parser.error("explicit --device required; no driver was opened") + args.output.mkdir(parents=True, exist_ok=False) + names = ("doctor", "hello", "hello-negative", "math-smoke", "math-negative", "math-exhaustive", "memory-refusal") + receipt = {"schema": 1, "created_utc": datetime.datetime.now(datetime.timezone.utc).isoformat(), + "bdf": args.bdf, "target": "sm_86", "evidence": "DEVICE", + "source_commit": subprocess.check_output(["git", "rev-parse", "HEAD"], cwd=ROOT, text=True).strip(), + "checks": {name: {"status": "NOT_RUN"} for name in names}} + def save(): + (args.output / "results.json").write_text(json.dumps(receipt, indent=2, sort_keys=True) + "\n") + save() + env = dict(os.environ, CUDAPP_GPU_BDF=args.bdf) + def run(name, command, expected=0, marker=None): + check = receipt["checks"][name] + check["command"] = [str(x) for x in command] + save() + try: + result = subprocess.run(check["command"], cwd=ROOT, env=env, text=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + except OSError as error: + check.update(status="FAIL", error=str(error)); save(); return False + (args.output / (name + ".log")).write_text(result.stdout) + ok = result.returncode == expected and (marker is None or marker in result.stdout) + check.update(status="PASS" if ok else "FAIL", exit_code=result.returncode, log=name + ".log") + save() + print(name + ": " + check["status"], flush=True) + return ok + if not run("doctor", [sys.executable, ROOT / "tests/ampere/doctor.py", "--bdf", args.bdf], marker='"preflight": "PASS"'): + return 1 + build = args.build.resolve() + for binary in ("hello_gpu", "hello_gpu_control", "ampere_math_device", "ampere_memory_refusal"): + if not (build / binary).is_file(): + print("Missing device test binary: " + str(build / binary), file=sys.stderr) + return 1 + sequence = [ + ("hello", [build / "hello_gpu", "--target=sm_86"], 0, "checked 1048576 of 1048576 elements: 0 wrong, 0 never written"), + ("hello-negative", [build / "hello_gpu_control", "--target=sm_86", "--bug=short"], 1, "checked 1048576 of 1048576 elements: 1 wrong, 1 never written"), + ("memory-refusal", [build / "ampere_memory_refusal", "--device"], 0, "AMPERE MEMORY REFUSAL PASS"), + ("math-smoke", [build / "ampere_math_device", "--device", "--count", "65536"], 0, "SHARD PASS"), + ("math-negative", [build / "ampere_math_device", "--device", "--count", "65536", "--inject-output-error"], 1, "AMPERE MATH FAIL op=rcp input=00000000"), + ] + for name, command, expected, marker in sequence: + if not run(name, command, expected, marker): + return 1 + if args.full_math and not run("math-exhaustive", [build / "ampere_math_device", "--device"], marker="AMPERE MATH log2 EXHAUSTIVE PASS"): + return 1 + print("All requested checks passed. Unrequested checks remain NOT_RUN; no qualification registry was changed.") + return 0 + +if __name__ == "__main__": + sys.exit(main()) diff --git a/tests/ampere/test_doctor.py b/tests/ampere/test_doctor.py new file mode 100755 index 00000000..4e914de9 --- /dev/null +++ b/tests/ampere/test_doctor.py @@ -0,0 +1,49 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +"""SIMULATED filesystem preflight controls. No GPU driver calls.""" +import importlib.util +from pathlib import Path +import tempfile + +spec = importlib.util.spec_from_file_location("ampere_doctor", Path(__file__).with_name("doctor.py")) +doctor = importlib.util.module_from_spec(spec) +spec.loader.exec_module(doctor) + +def put(root, name, value): + path = root / name + path.parent.mkdir(parents=True, exist_ok=True) + path.write_text(value) + +with tempfile.TemporaryDirectory(prefix="ampere-doctor-") as directory: + root = Path(directory) + def result(): + return doctor.inspect(root, machine="x86_64") + put(root, "proc/driver/nvidia/version", "NVRM version: NVIDIA UNIX Open Kernel Module for x86_64 580.173.02\n") + for node in ("nvidia0", "nvidiactl", "nvidia-uvm"): + put(root, "dev/" + node, "") + gpu = "sys/bus/pci/devices/0000:01:00.0/" + put(root, gpu + "vendor", "0x10de") + put(root, gpu + "class", "0x030000") + put(root, "proc/driver/nvidia/gpus/0000:01:00.0/information", "Device Minor: 0\n") + for pci in doctor.CARDS: + put(root, gpu + "device", pci) + report = result() + assert report["preflight"] == "PASS", report + assert report["evidence"] == "SIMULATED" and report["device_execution"] == "NOT_RUN" + put(root, gpu + "device", "0x2e12") + assert result()["preflight"] == "FAIL", "negative control: GB10 must refuse" + put(root, gpu + "device", "0x2204") + put(root, "proc/driver/nvidia/version", "NVRM version: NVIDIA UNIX x86_64 Kernel Module 580.173.02\n") + assert result()["preflight"] == "FAIL", "negative control: closed module must refuse" + put(root, "proc/driver/nvidia/version", "NVRM version: NVIDIA UNIX Open Kernel Module 590.00.00\n") + assert result()["preflight"] == "FAIL", "negative control: mismatched driver must refuse" + put(root, "proc/driver/nvidia/version", "NVRM version: NVIDIA UNIX Open Kernel Module 580.173.02\n") + (root / "dev/nvidia-uvm").unlink() + assert result()["preflight"] == "FAIL", "negative control: missing UVM must refuse" + put(root, "dev/nvidia-uvm", "") + for key, value in (("vendor", "0x10de"), ("class", "0x030000"), ("device", "0x2486")): + put(root, "sys/bus/pci/devices/0000:02:00.0/" + key, value) + assert result()["preflight"] == "FAIL", "ambiguous GPU must refuse" + assert doctor.inspect(root, "0000:01:00.0", "x86_64")["preflight"] == "PASS" + assert doctor.inspect(root, "0000:01:00.0", "aarch64")["preflight"] == "FAIL" +print("AMPERE DOCTOR SIMULATED PASS (target IDs and refusal controls); DEVICE NOT_RUN") diff --git a/tests/ampere_cubin_test.c b/tests/ampere_cubin_test.c new file mode 100644 index 00000000..aa5f7f37 --- /dev/null +++ b/tests/ampere_cubin_test.c @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Host-only ELF/container checks. No driver, libcuda or device access. */ +#include "omega_cubin.h" +#include +#include +#include + +#define CHECK(c) do { if (!(c)) { fprintf(stderr, "FAIL %s:%d: %s\n", __FILE__, __LINE__, #c); return 1; } } while (0) +static uint16_t u16(const uint8_t *p) { return (uint16_t)(p[0] | (uint16_t)p[1] << 8); } +static uint32_t u32(const uint8_t *p) { return (uint32_t)u16(p) | (uint32_t)u16(p + 2) << 16; } +static uint64_t u64(const uint8_t *p) { return (uint64_t)u32(p) | (uint64_t)u32(p + 4) << 32; } + +/* Independent metadata reader, with no inferred target from a filename. */ +static int target_matches(const uint8_t *p, size_t n, uint32_t sm) { + if (n < 64 || memcmp(p, "\177ELF", 4) || p[4] != 2 || p[5] != 1 || u16(p + 18) != 190) return 0; + uint32_t flags = sm == 86 ? ((86u << 16) | 0x500u | 86u) : OMEGA_CUBIN_EFLAGS_SM121; + if (sm != 86 && sm != 121) return 0; + if (u32(p + 48) != flags || p[7] != (sm == 86 ? 0x33 : 0x41) || p[8] != (sm == 86 ? 7 : 8)) return 0; + if (u32(p + 20) != (sm == 86 ? 130u : 1u)) return 0; + uint64_t sh = u64(p + 40); + size_t count = u16(p + 60), step = u16(p + 58); + if (step != 64 || sh > n || count > (n - (size_t)sh) / step) return 0; + unsigned note_seen = 0, bank_seen = 0; + for (size_t i = 1; i < count; ++i) { + const uint8_t *s = p + (size_t)sh + i * step; + uint32_t ty = u32(s + 4); + uint64_t off = u64(s + 24), len = u64(s + 32); + if (ty != 8 && (off > n || len > n - off)) return 0; + /* Blackwell-only capability/mercury sections must not leak into Ampere. */ + if (sm == 86 && (ty == 0x70000016u || ty == 0x70000082u || ty == 0x70000083u || ty == 0x70000085u)) return 0; + if (ty == 0x70000000u) { + for (uint64_t j = 0; j + 12 <= len; j += 4) { + const uint8_t *attr = p + off + j; + if (u16(attr) == 0x0a04 && u16(attr + 2) == 8) { + if (u32(attr + 4) != 3 || u16(attr + 8) != + (sm == 86 ? OMEGA_CUBIN_PARAM_BASE_SM86 : OMEGA_CUBIN_PARAM_BASE)) return 0; + ++bank_seen; + } + } + } + if (ty == 7) { + if (len != 32 || u32(p + off) != 12 || u32(p + off + 4) != 8 || + memcmp(p + off + 12, "NVIDIA Corp", 11) || u16(p + off + 26) != sm) return 0; + ++note_seen; + } + } + return note_seen == 1 && bank_seen == 1; +} + +int main(int argc, char **argv) { + /* Our EXIT word; offline nvdisasm is the independent decoding oracle. + * No NVIDIA binary or listing is embedded in this test. */ + const uint8_t text[16] = {0x4d,0x79,0,0, 0,0,0,0, 0,0,0x80,3, 0,0xea,0x0f,0}; + OmegaCubinParam param = {OMEGA_CUBIN_PARAM_BASE_SM86, 8, 1}; + uint8_t *image = NULL, *old = NULL; + size_t n = 0, oldn = 0; + char err[256]; + int rc = omega_cubin_pack_target(86, "ampere_exit", text, sizeof text, ¶m, 1, 1024, 8, 0, &image, &n, err, sizeof err); + CHECK(rc == OMEGA_CUBIN_OK); + CHECK(target_matches(image, n, 86)); + CHECK(!target_matches(image, n, 121)); + image[48] ^= 1; + CHECK(!target_matches(image, n, 86)); /* negative control: wrong e_flags */ + image[48] ^= 1; + image[8] = 8; + CHECK(!target_matches(image, n, 86)); /* negative control: wrong ABI */ + image[8] = 7; + if (argc == 2) { + FILE *f = fopen(argv[1], "wb"); + CHECK(f != NULL); + int wrote = fwrite(image, 1, n, f) == n; + int closed = fclose(f) == 0; + CHECK(wrote && closed); + } else CHECK(argc == 1); + omega_cubin_free(image); + image = NULL; + CHECK(omega_cubin_pack_target(0, "bad", text, sizeof text, NULL, 0, 1024, 8, 0, &image, &n, err, sizeof err) == OMEGA_CUBIN_E_TARGET); + CHECK(image == NULL && n == 0); + CHECK(omega_cubin_pack_target(89, "bad", text, sizeof text, NULL, 0, 1024, 8, 0, &image, &n, err, sizeof err) == OMEGA_CUBIN_E_TARGET); + CHECK(omega_cubin_pack_target(121, "bad", text, sizeof text, ¶m, 1, 1024, 8, 0, &image, &n, err, sizeof err) == OMEGA_CUBIN_E_PARAMS); + param.offset = OMEGA_CUBIN_PARAM_BASE; + CHECK(omega_cubin_pack("legacy", text, sizeof text, ¶m, 1, 1024, 8, 0, &old, &oldn, err, sizeof err) == 0); + CHECK(omega_cubin_pack_target(121, "legacy", text, sizeof text, ¶m, 1, 1024, 8, 0, &image, &n, err, sizeof err) == 0); + CHECK(n == oldn && memcmp(image, old, n) == 0 && target_matches(image, n, 121)); + omega_cubin_free(image); + omega_cubin_free(old); + puts("AMPERE CUBIN HOST PASS; device NOT_RUN"); + return 0; +} diff --git a/tests/ampere_numeric_host_test.c b/tests/ampere_numeric_host_test.c new file mode 100644 index 00000000..7cc851b8 --- /dev/null +++ b/tests/ampere_numeric_host_test.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Host arithmetic and environment checks only. No GPU or native bridge. */ +#include "omega_numeric.h" +#include "omega_numeric_reduce.h" +#include +#if defined(__x86_64__) +#include +#include +#endif +#define CHECK(c) do { if (!(c)) { fprintf(stderr, "FAIL %s:%d: %s\n", __FILE__, __LINE__, #c); return 1; } } while (0) +int main(void) { + float a[] = {1.0f, -0.0f, 0.0f, 2.0f}; + float b[] = {2.0f, 0.0f, -0.0f, 1.0f}; + float r[4], expected[4]; + CHECK(omega_numeric_fpenv_ok()); + const OmegaNumericOp ops[] = {OMEGA_NOP_FADD, OMEGA_NOP_FSUB, OMEGA_NOP_FMUL, + OMEGA_NOP_FFMA, OMEGA_NOP_FMNMX_MIN, OMEGA_NOP_FMNMX_MAX, + OMEGA_NOP_F2I, OMEGA_NOP_F32_TO_F16, OMEGA_NOP_F32_TO_BF16}; + for (size_t i = 0; i < sizeof ops / sizeof ops[0]; ++i) { + CHECK(omega_numeric_reference(ops[i], a, b, b, expected, 4) == OMEGA_NUMERIC_OK); + CHECK(omega_numeric_cpu_realize(ops[i], a, b, b, r, 4) == OMEGA_NUMERIC_OK); + for (size_t j = 0; j < 4; ++j) CHECK(omega_numeric_bits_equal(r[j], expected[j])); + } + float reduced; + CHECK(omega_reduce_cpu(OMEGA_RED_MAX, a, 4, &reduced) == OMEGA_NUMERIC_OK && reduced == 2.0f); +#if defined(__x86_64__) + unsigned saved = _mm_getcsr(); + const unsigned bad[] = {1u << 15, 1u << 6, 1u << 13}; /* FTZ, DAZ, rounding */ + for (size_t i = 0; i < sizeof bad / sizeof bad[0]; ++i) { + _mm_setcsr(saved | bad[i]); + int guarded = !omega_numeric_fpenv_ok(); + int rc = omega_numeric_cpu_realize(OMEGA_NOP_FADD, a, b, NULL, r, 4); + _mm_setcsr(saved); + CHECK(guarded && rc == OMEGA_NUMERIC_ERR_FPENV); + } + int rounding = fegetround(); + CHECK(fesetround(FE_DOWNWARD) == 0); + int guarded = !omega_numeric_fpenv_ok(); + CHECK(fesetround(rounding) == 0); + CHECK(guarded && omega_numeric_fpenv_ok()); +#endif + puts("AMPERE NUMERIC HOST PASS; device NOT_RUN"); + return 0; +} diff --git a/tests/fake_m16_native.c b/tests/fake_m16_native.c index a665be45..1c1a4163 100644 --- a/tests/fake_m16_native.c +++ b/tests/fake_m16_native.c @@ -376,6 +376,20 @@ int nvrm_alloc_gpu_uncached(Nvrm *rm, uint64_t size, NvrmMem *out) return nvrm_alloc(rm, size, out); } +/* Explicit simulated framebuffer oracle for Linux D1 tests. No host RAM query. */ +uint64_t fake_vram_free = 8ull << 30, fake_vram_total = 8ull << 30; +int fake_vram_query_fail, fake_vram_allocs; +int nvrm_vram_info(Nvrm *rm, uint64_t *free_bytes, uint64_t *total_bytes) { + if (!rm || !rm->discrete || fake_vram_query_fail || !free_bytes || !total_bytes) return -1; + *free_bytes = fake_vram_free; *total_bytes = fake_vram_total; + return 0; +} +int nvrm_alloc_vram(Nvrm *rm, uint64_t size, NvrmMem *out) { + if (!rm || !rm->discrete) return -1; + fake_vram_allocs++; + return nvrm_alloc_gpu_uncached(rm, size, out); +} + int nvrm_free(Nvrm *rm, NvrmMem *m) { if (!m || m->handle == 0) return 0; /* a zeroed NvrmMem is a no-op (nvrm.h) */ diff --git a/tests/test_ampere_runtime.c b/tests/test_ampere_runtime.c new file mode 100644 index 00000000..25d26922 --- /dev/null +++ b/tests/test_ampere_runtime.c @@ -0,0 +1,193 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Simulated RM/UVM boundary, not device evidence. Never opens a driver node. + * Compile nvrm.c into this TU to exercise its real allocation state machine. */ +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include +static int sim_ioctl(int, unsigned long, ...); +static int sim_open(const char *, int, ...); +static int sim_close(int); +static void *sim_mmap(void *, size_t, int, int, int, off_t); +#define ioctl sim_ioctl +#define open sim_open +#define close sim_close +#define mmap sim_mmap +#include "../nvrm/nvrm.c" +#undef ioctl +#undef open +#undef close +#undef mmap +static unsigned fail_stage, allocs, frees, dma_maps, dma_unmaps, ranges, range_frees, maps; +static int sim_open(const char *path, int flags, ...) { + (void)flags; + assert(!strncmp(path, "/dev/nvidia", 11)); + return 700; /* fake descriptor, not an OS/driver open */ +} +static int sim_close(int fd) { assert(fd == 700); return 0; } +static void *sim_mmap(void *va, size_t size, int prot, int flags, int fd, off_t offset) { + if (fd == 700) return mmap(va, size, prot, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0); + return mmap(va, size, prot, flags, fd, offset); +} +static int sim_ioctl(int fd, unsigned long request, ...) { + (void)fd; + va_list ap; va_start(ap, request); void *arg = va_arg(ap, void *); va_end(ap); + if (request == UVM_CREATE_EXTERNAL_RANGE) { + UVM_CREATE_EXTERNAL_RANGE_PARAMS *p = arg; + if (fail_stage == 3) p->rmStatus = NV_ERR_NO_MEMORY; + else ranges++; + return 0; + } + if (request == UVM_MAP_EXTERNAL_ALLOCATION) { + UVM_MAP_EXTERNAL_ALLOCATION_PARAMS *p = arg; + if (fail_stage == 5) p->rmStatus = NV_ERR_NO_MEMORY; + return 0; + } + if (request == UVM_FREE) { range_frees++; return 0; } + assert(_IOC_TYPE(request) == NV_IOCTL_MAGIC); + switch (_IOC_NR(request)) { + case NV_ESC_RM_ALLOC: { + NVOS21_PARAMETERS *p = arg; + NV_MEMORY_ALLOCATION_PARAMS *mp = (void *)(uintptr_t)p->pAllocParms; + assert(p->hClass == NV01_MEMORY_LOCAL_USER); + assert(((mp->attr >> 25) & 3u) == NVOS32_ATTR_LOCATION_VIDMEM); + assert(mp->size == 4096); + allocs++; + if (fail_stage == 1) p->status = NV_ERR_NO_MEMORY; + return 0; + } + case NV_ESC_REGISTER_FD: return 0; + case NV_ESC_RM_MAP_MEMORY: { + nv_ioctl_nvos33_parameters_with_fd *p = arg; + maps++; + assert(p->fd == 700 && p->params.length == 4096); + if (fail_stage == 2) p->params.status = NV_ERR_NO_MEMORY; + return 0; + } + case NV_ESC_RM_MAP_MEMORY_DMA: { + NVOS46_PARAMETERS *p = arg; + if (fail_stage == 4) p->status = NV_ERR_NO_MEMORY; + else dma_maps++; + return 0; + } + case NV_ESC_RM_UNMAP_MEMORY_DMA: dma_unmaps++; return 0; + case NV_ESC_RM_FREE: frees++; return 0; + case NV_ESC_RM_VID_HEAP_CONTROL: { + NVOS32_PARAMETERS *p = arg; + assert(p->function == NVOS32_FUNCTION_INFO); + assert(p->data.Info.attr == (NVOS32_ATTR_LOCATION_VIDMEM << 25)); + p->total = 8ull << 30; p->free = 4096; + return 0; + } + default: assert(!"unexpected simulated driver operation"); return -1; + } +} +static void fresh(Nvrm *rm) { + memset(rm, 0, sizeof *rm); + rm->target_sm = 86; rm->discrete = 1; + rm->root = 1; rm->device = 2; rm->virtmem = 3; rm->next_handle = 100; + rm->fd_ctl = rm->fd_uvm = 700; + rm->va_next = rm->va_slot_base = acquire_va_slot(); + allocs = frees = dma_maps = dma_unmaps = ranges = range_frees = maps = 0; +} +static void class_and_bdf(void) { + static Nvrm rm; + const uint32_t amp[] = {OMEGA_AMPERE_COMPUTE_B, OMEGA_AMPERE_GPFIFO_A, VOLTA_USERMODE_A}; + const uint32_t bw[] = {BLACKWELL_COMPUTE_B, BLACKWELL_CHANNEL_GPFIFO_A, HOPPER_USERMODE_A}; + rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_8_06; + assert(select_classes(&rm, amp, 3) == 0 && rm.target_sm == 86 && rm.discrete); + assert(rm.compute_class == OMEGA_AMPERE_COMPUTE_B && rm.gpfifo_class == OMEGA_AMPERE_GPFIFO_A); + assert(select_classes(&rm, amp, 2) != 0); /* missing usermode: no stale class reuse */ + assert(select_classes(&rm, bw, 3) != 0); /* a Blackwell class set cannot authorize SM86 */ + rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_12_01; + assert(select_classes(&rm, bw, 3) == 0 && rm.target_sm == 121 && !rm.discrete); + rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_8_00; + assert(select_classes(&rm, amp, 3) != 0); /* GA100 is not silently treated as GA10x */ + nv_ioctl_card_info_t cards[64] = {0}; + cards[0].valid = cards[1].valid = 1; + cards[1].pci_info.bus = 1; cards[1].pci_info.slot = 2; + assert(card_index(cards, NULL) == 0); + assert(card_index(cards, "0000:01:02.0") == 1); + assert(card_index(cards, "0000:00:00.0") == 0); + assert(card_index(cards, "0:1:2.0") == -1); + assert(card_index(cards, "0000:01:02.0junk") == -1); + assert(card_index(cards, "0000:01:03.0") == -1); +} +static void allocation_lifetime(void) { + static Nvrm rm; + fresh(&rm); fail_stage = 0; + NvrmMem mem = {0}; + assert(nvrm_alloc_vram(&rm, 1, &mem) == 0); + assert(mem.size == 4096 && rm.live_count == 1 && allocs == 1 && maps == 1); + const uint8_t in[] = {1, 0, 255, 3}; uint8_t out[sizeof in] = {0}; + assert(nvrm_copy_to(&rm, &mem, 7, in, sizeof in) == 0); + assert(nvrm_copy_from(&rm, &mem, 7, out, sizeof out) == 0); + assert(!memcmp(in, out, sizeof in)); + assert(nvrm_copy_to(&rm, &mem, 4095, in, sizeof in) != 0); + NvrmMem forged = mem; forged.handle++; + assert(nvrm_copy_from(&rm, &forged, 0, out, sizeof out) != 0); + uint64_t free_bytes, total; + assert(nvrm_vram_info(&rm, &free_bytes, &total) == 0 && free_bytes == 4096 && total == (8ull << 30)); + NvrmMem stale = mem; + rm.inject_rm_free_failure = 1; + assert(nvrm_free(&rm, &mem) != 0 && rm.live_count == 1 && rm.live[0].quarantined); + assert(nvrm_copy_to(&rm, &mem, 0, in, sizeof in) != 0); + assert(nvrm_free(&rm, &mem) == 0 && rm.live_count == 0); + assert(nvrm_free(&rm, &mem) == 0); /* idempotent */ + assert(frees == 1 && dma_unmaps == 1 && range_frees == 1); + assert(nvrm_free(&rm, &stale) != 0 && frees == 1); +} +static void failed_allocation_cleanup(void) { + static Nvrm rm; + for (fail_stage = 1; fail_stage <= 5; fail_stage++) { + fresh(&rm); + NvrmMem mem = {0}; + assert(nvrm_alloc_vram(&rm, 4096, &mem) != 0); + assert(!mem.handle && rm.live_count == 0 && !rm.faulted); + assert(allocs == 1 && frees == (fail_stage == 1 ? 0u : 1u)); + assert(dma_unmaps == dma_maps && range_frees == ranges); + } + fail_stage = 0; +} +static void qmd_and_submission_admission(void) { + uint32_t q[64]; + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300000, 32, 1, 2, 1, 64, 0) == 0); + /* Vendor clc7c0qmd.h QMDV03_00: major[583:580], minor[579:576], + * CB0[1055:1024], program[1567:1536], release0 payload[863:832]. */ + assert(((q[18] >> 4) & 15) == 3 && (q[18] & 15) == 0); + assert(q[32] == 0x200000 && q[48] == 0x100000 && q[26] == 1); + assert(omega_ampere_build_qmd(q, 0x100001, 0x200000, 0x300000, 32, 1, 2, 1, 64, 0) != 0); + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300000, 1024, 2, 2, 1, 64, 0) != 0); + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300000, 32, 1, 1, 1, 64, 1) == 0); + assert((q[17] & 0x3ffffu) == 256); /* shared memory is rounded to vendor granularity */ + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300000, 32, 1, 1, 1, 64, 99u << 10) == 0); + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300000, 32, 1, 1, 1, 64, 100u << 10) != 0); + assert(omega_ampere_build_qmd(q, 0x100000, 0x200000, 0x300001, 32, 1, 1, 1, 64, 0) != 0); + static Nvrm rm; fresh(&rm); + uint32_t good[] = {nvrm_mthd(1, 0, 1), OMEGA_AMPERE_COMPUTE_B, + nvrm_mthd(1, 0x021c, 1), (1u << 0) | (1u << 4) | (1u << 12), + nvrm_mthd(1, 0x02b4, 1), 0x1000, nvrm_mthd(1, 0x02c0, 1), 3}; + NvrmMem pb = {.cpu = good, .size = sizeof good}; + assert(validate_ampere_push(&rm, &pb, 0, sizeof good / sizeof good[0]) == 0); + good[3] = 0; /* The supported cache method does not admit arbitrary values. */ + assert(validate_ampere_push(&rm, &pb, 0, sizeof good / sizeof good[0]) != 0); + good[3] = (1u << 0) | (1u << 4) | (1u << 12); + good[1] = BLACKWELL_COMPUTE_B; + assert(validate_ampere_push(&rm, &pb, 0, sizeof good / sizeof good[0]) != 0); + good[0] = 0x206220c6; /* existing Blackwell inline QMD5 packet */ + assert(validate_ampere_push(&rm, &pb, 0, sizeof good / sizeof good[0]) != 0); + assert(allocs == 0 && frees == 0); /* admission itself makes no ioctl */ +} +int main(void) { + class_and_bdf(); allocation_lifetime(); failed_allocation_cleanup(); qmd_and_submission_admission(); + puts("Ampere simulated RM allocation/class/QMD tests passed (HOST_ONLY; device NOT_RUN)"); + return 0; +} diff --git a/tests/test_ampere_session.c b/tests/test_ampere_session.c new file mode 100644 index 00000000..cb5dd09f --- /dev/null +++ b/tests/test_ampere_session.c @@ -0,0 +1,128 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Real session/QMD path with an in-memory platform oracle. No GPU or ioctl. + * This proves ordering/serialization, not device cache coherence. */ +#include "omega_gpu_session.h" +#include "omega_gpu_platform_linux.h" +#include "omega_ampere_qmd.h" +#include +#include +#include +#include +static struct { void *cpu[16]; uint64_t va[16], bytes[16]; unsigned next, submits; uint64_t ns; } sim; +static uint64_t expected_code; +static uint32_t expected_arg; +static uint32_t expected_instruction; +static uint64_t now_ns(void *c) { (void)c; return sim.ns += 1000; } +static uint64_t now_ms(void *c) { return now_ns(c) / 1000000; } +static int wait_ms(void *c, uint64_t ms) { (void)c; sim.ns += ms * 1000000; return 0; } +static int lock(void *c, uint32_t id) { (void)c; (void)id; return 0; } +static const char *diag(void *c) { (void)c; return "simulated Ampere"; } +static int dev_open(void *c, uint32_t ord, OmegaGpuDeviceHandle *d) { + (void)c; assert(ord == 0); *d = (OmegaGpuDeviceHandle){15, 1}; return 0; +} +static int dev_close(void *c, OmegaGpuDeviceHandle d) { (void)c; (void)d; return 0; } +static int alloc(void *c, OmegaGpuDeviceHandle d, const OmegaGpuBufferDesc *b, OmegaGpuBufferHandle *h, + OmegaCpuView *cpu, OmegaGpuVa *va, OmegaGpuBusAddr *bus) { + (void)c; (void)d; unsigned i = ++sim.next; assert(i < 15); + sim.cpu[i] = calloc(1, b->bytes); assert(sim.cpu[i]); sim.bytes[i] = b->bytes; + sim.va[i] = 0x100000000ull + (uint64_t)i * 0x1000000ull; + *h = (OmegaGpuBufferHandle){i, 1}; *cpu = (OmegaCpuView){sim.cpu[i], b->bytes}; va->va = sim.va[i]; + if (bus) bus->iova = 0; + return 0; +} +static int dealloc(void *c, OmegaGpuBufferHandle h) { + (void)c; assert(h.index < 16); free(sim.cpu[h.index]); sim.cpu[h.index] = NULL; return 0; +} +static int sync_mem(void *c, OmegaGpuBufferHandle h, uint64_t off, uint64_t len) { + (void)c; assert(h.index < 16 && sim.cpu[h.index]); + assert(off <= sim.bytes[h.index] && len <= sim.bytes[h.index] - off); return 0; +} +static void *resolve(uint64_t va) { + for (unsigned i = 1; i <= sim.next; i++) + if (sim.cpu[i] && va >= sim.va[i] && va - sim.va[i] < sim.bytes[i]) return (uint8_t *)sim.cpu[i] + (va - sim.va[i]); + assert(!"unmapped simulated GPU address"); return NULL; +} +static int poll(void *c, OmegaGpuBufferHandle h, uint64_t off, uint32_t want, uint64_t ms, uint32_t *seen) { + (void)c; (void)ms; *seen = *(uint32_t *)((uint8_t *)sim.cpu[h.index] + off); assert(*seen == want); return 0; +} +static int qopen(void *c, OmegaGpuDeviceHandle d, OmegaGpuBufferHandle ring, OmegaGpuQueueHandle *q) { + (void)c; (void)d; (void)ring; *q = (OmegaGpuQueueHandle){14, 1}; return 0; +} +static int qclose(void *c, OmegaGpuQueueHandle q) { (void)c; (void)q; return 0; } +static int submit(void *c, OmegaGpuQueueHandle queue, const uint32_t *w, uint32_t n) { + (void)c; (void)queue; unsigned invalidated = 0, launched = 0; uint64_t qva = 0; + for (uint32_t i = 0; i < n;) { + uint32_t header = w[i++], count = (header >> 16) & 0x1fffu; + uint32_t method = (header & 0x1fffu) << 2, subc = (header >> 13) & 7u; + assert(header >> 28 == 2 && count && count <= n - i); + const uint64_t m[16] = {4, method, count, subc, w[i], OMEGA_AMPERE_COMPUTE_B, + 0x02b4, 0x02c0, 0x005c, 0x0028, 0x021c, (1u << 0) | (1u << 4) | (1u << 12)}; + assert(omega_ampere_policy(m, NULL) == 0); + if (subc == 1 && method == 0x021c) invalidated++; + if (subc == 1 && method == 0x02b4) qva = (uint64_t)w[i] << 8; + if (subc == 1 && method == 0x02c0) { + assert(invalidated == 1 && qva && !launched++); + const uint32_t *q = resolve(qva); + uint64_t code = q[48] | ((uint64_t)(q[49] & 0x1ffffu) << 32); + uint64_t cb = q[32] | ((uint64_t)(q[33] & 0x1ffffu) << 32); + assert(*(uint32_t *)resolve(code) == expected_instruction); + assert(code == expected_code); + assert(*(uint32_t *)((uint8_t *)resolve(cb) + 0x160) == expected_arg); + uint64_t sem = q[24] | ((uint64_t)(q[25] & 0xffu) << 32); + assert(((q[25] >> 23) & 1u) == 1); /* QMD3 RELEASE0_ENABLE */ + *(uint32_t *)resolve(sem) = q[26]; + } + if (subc == 0 && method == 0x005c) { + assert(launched == 1); + *(uint32_t *)resolve(w[i] | ((uint64_t)w[i + 1] << 32)) = w[i + 2]; + } + i += count; + } + assert(invalidated == 1 && launched == 1); sim.submits++; return 0; +} +static void *halloc(void *c, size_t n) { (void)c; return malloc(n); } +static void hfree(void *c, void *p) { (void)c; free(p); } +static const OmegaGpuPlatformCaps caps = { + .abi_major = OMEGA_GPU_PLATFORM_ABI_MAJOR, .abi_minor = OMEGA_GPU_PLATFORM_ABI_MINOR, + .services = OMEGA_GPU_SVC_REQUIRED_SESSION, .max_devices = 1, .max_buffers = 14, .max_queues = 1, + .max_inflight = 1, .max_buffer_bytes = 1ull << 30, .max_total_bytes = 1ull << 32, +}; +static const OmegaGpuPlatform platform = { + .time_now_ms = now_ms, .wait_ms = wait_ms, .lock = lock, .unlock = lock, + .dma_alloc = alloc, .dma_free = dealloc, .sync_cpu_to_gpu = sync_mem, .sync_gpu_to_cpu = sync_mem, + .poll_word = poll, .device_open = dev_open, .device_close = dev_close, .diag_text = diag, + .queue_open = qopen, .queue_close = qclose, .queue_submit = submit, .queue_retire = qclose, + .time_now_ns = now_ns, .host_alloc = halloc, .host_free = hfree, +}; +/* Model the Linux-selected device target without linking a real driver. */ +const OmegaGpuPlatform *omega_gpu_platform_linux(OmegaGpuPlatformCaps *out) { if (out) *out = caps; return &platform; } +uint32_t omega_gpu_platform_linux_target_sm(void) { return 86; } +int main(void) { + omega_gpu_session_lock(); assert(omega_gpu_session_open()); + assert(omega_gpu_session_target_sm() == 86); + OmegaGpuMem code0, code1; + assert(omega_gpu_session_alloc_code(16, &code0) == 0); + assert(omega_gpu_session_alloc_code(16, &code1) == 0); + *(uint32_t *)code0.cpu = 0x1234; *(uint32_t *)code1.cpu = 0x5678; + assert(omega_gpu_session_sync_to_gpu(&code0) == 0 && omega_gpu_session_sync_to_gpu(&code1) == 0); + uint32_t arg = 7; + OmegaGpuLaunch launch = {.code_va = code0.va, .gpr_count = 64, .threads_x = 32, .grid_x = 1, .grid_y = 1, + .num_elements = 32, .args = &arg, .n_args = 1, .timeout_ms = 1000, .target_sm = 86}; + expected_code = launch.code_va; expected_arg = arg; expected_instruction = *(uint32_t *)code0.cpu; + assert(omega_gpu_session_launch(&launch, NULL, NULL) == 0); + arg = 11; launch.code_va = code1.va; expected_code = launch.code_va; expected_arg = arg; + expected_instruction = *(uint32_t *)code1.cpu; + assert(omega_gpu_session_launch(&launch, NULL, NULL) == 0); + /* Reuse the code VA with new content: invalidation remains mandatory. */ + *(uint32_t *)code1.cpu = 0x9abc; expected_instruction = *(uint32_t *)code1.cpu; + assert(omega_gpu_session_sync_to_gpu(&code1) == 0); + arg = 19; expected_arg = arg; + assert(omega_gpu_session_launch(&launch, NULL, NULL) == 0); + launch.target_sm = 0; + assert(omega_gpu_session_launch(&launch, NULL, NULL) != 0 && sim.submits == 3); + omega_gpu_session_free(&code0); omega_gpu_session_free(&code1); + omega_gpu_session_unlock(); + omega_gpu_session_close(); + puts("Ampere session ordering/argument/code serialization simulation passed (HOST_ONLY; device NOT_RUN)"); + return 0; +} diff --git a/tests/test_omega_ampere_encoder.c b/tests/test_omega_ampere_encoder.c new file mode 100644 index 00000000..cf4835a6 --- /dev/null +++ b/tests/test_omega_ampere_encoder.c @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +#include "omega_ampere_codegen.h" +#include "omega_blackwell_codegen_tc.h" +#include "omega_blackwell_codegen_qmma.h" +#include +#include + +static BlackwellIRProgram program; +static void init(void) +{ + omega_bw_ir_init(&program); + for (unsigned i = 0; i < BW_MAX_VREGS; ++i) program.regalloc.vreg_to_phys[i] = (int)i; + for (unsigned i = 0; i < BW_MAX_UVREGS; ++i) program.regalloc.uvreg_to_phys[i] = (int)i; + program.regalloc.num_vregs = 256; + program.regalloc.num_uvregs = 32; + program.count = 1; +} +static BlackwellIRInsn fixture(unsigned op, unsigned variant) +{ + BlackwellIRInsn in = {0}; + in.op = (BlackwellIROpcode)op; + in.dst_vreg = 4; in.src1_vreg = 8; in.src2_vreg = 12; in.src3_vreg = 16; in.ureg = 2; + switch (op) { + case BW_IR_S2R: in.imm = variant ? BW_SR_CTAID_Y : BW_SR_TID_X; break; + case BW_IR_LDC: case BW_IR_LDC64: in.imm = 0x380 + variant * 8; break; + case BW_IR_LDCU: case BW_IR_LDCU64: in.is_uniform = true; in.imm = 0x380 + variant * 8; break; + case BW_IR_IMAD: + if (variant == 1) { in.src2_vreg = -1; in.imm = 0x12345678; } + if (variant == 2) { in.src2_vreg = -1; in.is_uniform = true; } + break; + case BW_IR_IMAD_WIDE: in.imm = 16; break; + case BW_IR_ISETP_GE: + in.src2_vreg = -1; in.imm = 17; + if (variant) in.is_uniform = true; + break; + case BW_IR_STG_E: case BW_IR_LDG_E_64: case BW_IR_LDG_E_128: in.imm = variant ? (uint32_t)-16 : 16; break; + case BW_IR_SHF_R: in.imm = variant ? 31 : 4; break; + case BW_IR_LOP3_AND: in.imm = variant ? 0xffffffffu : 0xabcdef01; break; + case BW_IR_SHFL_DOWN: in.imm = variant ? OMEGA_TC_MARK_BFLY | 16 : 1; break; + case BW_IR_FMNMX_MAX: if (variant) in.imm = OMEGA_TC_MARK_F2FP; break; + case BW_IR_LDS: case BW_IR_STS: case BW_IR_LDS128: in.imm = variant ? 64 : 16; break; + case BW_IR_BRA: in.imm = variant ? (uint32_t)-2 : 2; in.predicate_p0 = variant != 0; in.predicate_not = variant == 2; break; + case BW_IR_LOP3_LUT: in.imm = variant ? 0x96 : 0xe8; break; + case BW_IR_BSSY: in.imm = 2; in.bar_reg = variant ? 15 : 0; break; + case BW_IR_BSYNC: in.bar_reg = variant ? 15 : 0; break; + default: break; + } + return in; +} +static int refused(uint32_t target) +{ + uint8_t code[16384]; size_t len = 99; + memset(code, 0xa5, sizeof(code)); + if (omega_gpu_encode_program_target(&program, target, code, sizeof(code), &len) != OMEGA_GPU_ENCODE_UNSUPPORTED || len) return 1; + for (size_t i = 0; i < sizeof(code); ++i) if (code[i] != 0xa5) return 1; + return 0; +} +int main(void) +{ + uint8_t code[16384], legacy[16384]; + for (unsigned op = 0; op <= BW_IR_MUFU_LG2; ++op) { + for (unsigned variant = 0; variant < 3; ++variant) { + init(); program.insns[0] = fixture(op, variant); + size_t len = 0, old_len = 0; + /* The SM121 call triggers offline capture in the corpus build. */ + if (omega_bw_encode_program(&program, legacy, sizeof(legacy), &old_len) != 0 || + omega_gpu_encode_program_target(&program, 86, code, sizeof(code), &len) != 0 || len != old_len) { + fprintf(stderr, "SM86 fixture refused op %u variant %u\n", op, variant); return 1; + } + if (omega_gpu_encode_program_target(&program, 121, code, sizeof(code), &len) != 0 || + len != old_len || memcmp(code, legacy, len)) return 1; + } + } + /* Regression: is_uniform selects the IMAD source, not its GPR destination. + * Nonidentity maps make the old uniform-destination mutation observable. */ + init(); program.insns[0] = fixture(BW_IR_IMAD, 2); + program.regalloc.vreg_to_phys[4] = 12; + program.regalloc.uvreg_to_phys[4] = 2; + for (unsigned target = 0; target < 2; ++target) { + size_t len = 0; + if (omega_gpu_encode_program_target(&program, target ? 121 : 86, code, sizeof(code), &len) != 0 || + code[2] != 12) return 1; + } + /* The Blackwell descriptor preamble must not read past Ampere's CB0. + * Lower it to a same-slot NOP, retaining every branch displacement. */ + { + size_t len = 0, nop_len = 0; + init(); program.insns[0] = fixture(BW_IR_NOP, 0); + if (omega_gpu_encode_program_target(&program, 86, legacy, sizeof(legacy), &nop_len)) return 1; + program.insns[0] = fixture(BW_IR_LDCU64, 0); program.insns[0].imm = 0x358; + if (omega_gpu_encode_program_target(&program, 86, code, sizeof(code), &len) || + len != nop_len || memcmp(code, legacy, len)) return 1; + if (omega_bw_encode_program(&program, legacy, sizeof(legacy), &len)) return 1; + } + init(); program.insns[0] = fixture(BW_IR_NOP, 0); if (refused(80)) return 1; + program.count = 2; program.insns[1] = fixture(60, 0); if (refused(86)) return 1; + init(); program.insns[0] = fixture(BW_IR_HMMA_BF16, 0); program.insns[0].imm = OMEGA_QMMA_MARK; if (refused(86)) return 1; + { size_t len; if (omega_bw_encode_program(&program, legacy, sizeof(legacy), &len) != 0) return 1; } + program.insns[0] = fixture(BW_IR_FMNMX_MAX, 0); program.insns[0].imm = OMEGA_QMMA_MARK_F2E4; if (refused(86)) return 1; + { size_t len; if (omega_bw_encode_program(&program, legacy, sizeof(legacy), &len) != 0) return 1; } + program.insns[0] = fixture(BW_IR_LDG_E, 0); program.insns[0].src1_vreg = 256; if (refused(86)) return 1; + program.insns[0] = fixture(BW_IR_LDCU, 0); program.insns[0].dst_vreg = 32; if (refused(86)) return 1; + program.insns[0] = fixture(BW_IR_MOV_IMM, 0); program.regalloc.vreg_to_phys[4] = -1; + program.insns[0].dst_subreg = 1; if (refused(86)) return 1; + init(); program.insns[0] = fixture(BW_IR_LDG_E_64, 0); program.insns[0].imm = 0x00800000; if (refused(86)) return 1; + puts("Ampere encoder host fixtures: all IR opcodes, source modes, target preservation and refusals"); + return 0; +} diff --git a/tests/test_omega_gpu_platform_linux.c b/tests/test_omega_gpu_platform_linux.c index b095592e..31cd91eb 100644 --- a/tests/test_omega_gpu_platform_linux.c +++ b/tests/test_omega_gpu_platform_linux.c @@ -26,8 +26,12 @@ /* The three driver symbols the session path needs that the fake (written for the vector engine) lacks. */ static int g_open_fail; +static int g_discrete; +extern uint64_t fake_vram_free, fake_vram_total; +extern int fake_vram_query_fail, fake_vram_allocs; int nvrm_open(Nvrm *rm) { if (g_open_fail) { snprintf(rm->err, sizeof rm->err, "fake RM: open refused"); return -1; } + rm->target_sm = g_discrete ? 86 : 121; rm->discrete = (uint8_t)g_discrete; fk.device_open = 1; return 0; } int nvrm_close(Nvrm *rm) { (void)rm; return 0; } @@ -443,6 +447,62 @@ static void c_reserve_overflow(void) { unlink(path); } +static void c_discrete_vram_reserve(void) { + fake_reset(); g_discrete = 1; + setenv("CUDAPP_MEM_RESERVE_MIB", "0", 1); + setenv("CUDAPP_GPU_MIN_FREE_BYTES", "8192", 1); + setenv("CUDAPP_MEMINFO", "/nonexistent/host-memory-must-not-be-used", 1); + fake_vram_free = 4096; fake_vram_total = 8ull << 30; + const OmegaGpuPlatform *p = omega_gpu_platform_linux(NULL); + OmegaGpuDeviceHandle d; + EXPECT(p->device_open(p->ctx, 0, &d) == 0); + EXPECT(omega_gpu_platform_linux_target_sm() == 86); + OmegaGpuBufferDesc desc = {.kind = OMEGA_GPU_HANDLE_BUF_DATA, + .rights = OMEGA_GPU_RIGHT_CPU_READ | OMEGA_GPU_RIGHT_GPU_WRITE, + .gpu_cache = OMEGA_GPU_CACHE_GPU_UNCACHED, .bytes = 4096}; + OmegaGpuBufferHandle h; OmegaCpuView cpu; OmegaGpuVa va; + const int before = fk.alloc_calls; + EXPECT(p->dma_alloc(p->ctx, d, &desc, &h, &cpu, &va, NULL) == OMEGA_GPU_PLAT_REFUSED_LIMIT); + EXPECT(fk.alloc_calls == before && fake_vram_allocs == 0 && fake_vram_free == 4096); + EXPECT(strstr(p->diag_text(p->ctx), "host RAM is not VRAM") != NULL); + /* Exact byte override is read again, not cached at open. */ + setenv("CUDAPP_GPU_MIN_FREE_BYTES", "0", 1); + EXPECT(p->dma_alloc(p->ctx, d, &desc, &h, &cpu, &va, NULL) == 0); + EXPECT(fake_vram_allocs == 1); + fk.free_fail_nth = fk.free_calls + 1; + EXPECT(p->dma_free(p->ctx, h) == OMEGA_GPU_PLAT_REFUSED_DEVICE); + fk.free_fail_nth = 0; + EXPECT(p->dma_free(p->ctx, h) == 0); /* handle survived failed driver cleanup */ + fake_vram_query_fail = 1; + setenv("CUDAPP_GPU_MIN_FREE_BYTES", "1", 1); + const int allocated = fk.alloc_calls; + EXPECT(p->dma_alloc(p->ctx, d, &desc, &h, &cpu, &va, NULL) == OMEGA_GPU_PLAT_REFUSED_LIMIT); + EXPECT(fk.alloc_calls == allocated); + fake_vram_query_fail = 0; + setenv("CUDAPP_GPU_MIN_FREE_BYTES", "18446744073709551616", 1); + EXPECT(p->dma_alloc(p->ctx, d, &desc, &h, &cpu, &va, NULL) == OMEGA_GPU_PLAT_REFUSED_LIMIT); + EXPECT(fk.alloc_calls == allocated); + EXPECT(p->device_close(p->ctx, d) == 0); +} + +static void c_ampere_target_refusal(void) { + fake_reset(); g_discrete = 1; + setenv("CUDAPP_MEM_RESERVE_MIB", "0", 1); + setenv("CUDAPP_GPU_MIN_FREE_BYTES", "0", 1); + omega_gpu_session_lock(); + EXPECT(omega_gpu_session_open() != NULL); + EXPECT(omega_gpu_session_target_sm() == 86); + const int before = fk.submit_calls; + OmegaGpuLaunch L = launch_desc(1000); + EXPECT(omega_gpu_session_launch(&L, NULL, NULL) != 0); + L.target_sm = 121; + EXPECT(omega_gpu_session_launch(&L, NULL, NULL) != 0); + L.target_sm = 999; + EXPECT(omega_gpu_session_launch(&L, NULL, NULL) != 0); + EXPECT(fk.submit_calls == before && !omega_gpu_session_is_blocked()); + omega_gpu_session_unlock(); +} + typedef struct { const char *id; void (*fn)(void); } Case; static const Case CASES[] = { {"LINUX_REF_CAPS_NO_MMIO_NO_IRQ", c_caps}, @@ -459,6 +519,8 @@ static const Case CASES[] = { {"CMDLIST_TIMEOUT_LATCHES_WITHOUT_LAUNCH_BEHIND_IT", c_cmdlist_timeout_latches_without_launch}, {"ZERO_TIMEOUT_REFUSED_BEFORE_SUBMIT", c_zero_timeout_refused}, {"D1_RESERVE_AND_MEMINFO_OVERFLOW_SATURATE", c_reserve_overflow}, + {"AMPERE_D1_USES_VRAM_REFUSES_BEFORE_RM_ALLOC", c_discrete_vram_reserve}, + {"AMPERE_REJECTS_IMPLICIT_OR_MISMATCHED_LAUNCH_TARGET", c_ampere_target_refusal}, }; int main(void) { diff --git a/tools/ampere_corpus.c b/tools/ampere_corpus.c new file mode 100644 index 00000000..dce73811 --- /dev/null +++ b/tools/ampere_corpus.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Test-only IR capture. Linked into the existing host-only corpus producers; + * no driver API is called here. A refusal is legal only for an explicit FP8 marker. */ +#include "omega_ampere_codegen.h" +#include "omega_blackwell_codegen_tc.h" +#include "omega_blackwell_codegen_qmma.h" +#include +#include +#include +#include + +static void save(const char *dir, unsigned serial, const char *suffix, const void *data, size_t size) +{ + char path[4096]; + int n = snprintf(path, sizeof(path), "%s/%ld-%u.%s", dir, (long)getpid(), serial, suffix); + if (n < 0 || (size_t)n >= sizeof(path)) abort(); + FILE *f = fopen(path, "wb"); + if (!f) { perror(path); abort(); } + if (fwrite(data, 1, size, f) != size || fclose(f) != 0) abort(); +} + +void omega_ampere_corpus_capture(const BlackwellIRProgram *prog, const uint8_t *sm121, size_t len) +{ + const char *dir = getenv("OMEGA_AMPERE_CORPUS_DIR"); + if (!dir || !*dir) return; + static unsigned serial; + const unsigned id = serial++; + uint8_t code[16384], reference[16384]; + uint32_t metadata[BW_MAX_IR_INSNS][2]; + int fp8 = 0; + for (size_t i = 0; i < prog->count; ++i) { + const BlackwellIRInsn *in = &prog->insns[i]; + metadata[i][0] = (uint32_t)in->op; + metadata[i][1] = in->imm; + if ((in->op == BW_IR_HMMA_BF16 && in->imm == OMEGA_QMMA_MARK) || + (in->op == BW_IR_FMNMX_MAX && in->imm == OMEGA_QMMA_MARK_F2E4)) fp8 = 1; + } + memset(code, 0xa5, sizeof(code)); + size_t bytes = 0; + int rc = omega_gpu_encode_program_target(prog, 86, code, sizeof(code), &bytes); + if (fp8) { + if (rc != OMEGA_GPU_ENCODE_UNSUPPORTED || bytes != 0) abort(); + for (size_t i = 0; i < sizeof(code); ++i) if (code[i] != 0xa5) abort(); + save(dir, id, "refused", metadata, prog->count * sizeof(metadata[0])); + return; + } + if (rc != 0 || bytes != len) { + fprintf(stderr, "SM86 unexpectedly refused an existing kernel (%zu instructions, rc %d)\n", prog->count, rc); + abort(); + } + memcpy(reference, sm121, len); + /* The corpus hook runs before family post-encoding patches. Reproduce the + * published reference patches, not the Ampere implementation under test. */ + if (omega_tc_patch_code(prog, reference, len) < 0) abort(); + save(dir, id, "sm121.bin", reference, len); + save(dir, id, "sm86.bin", code, bytes); + save(dir, id, "ir", metadata, prog->count * sizeof(metadata[0])); +} diff --git a/tools/ampere_families.c b/tools/ampere_families.c new file mode 100644 index 00000000..1e2e40bd --- /dev/null +++ b/tools/ampere_families.c @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Producer coverage absent from the older SM121 corpus: head-dim256 attention, + * multi-token variants, all GDN generators and ternary layouts/epilogues. */ +#include "omega_ampere_codegen.h" +#include "omega_blackwell_codegen_attn256.h" +#include "omega_blackwell_codegen_pattn256.h" +#include "omega_blackwell_codegen_gdn.h" +#include "omega_blackwell_codegen_tern.h" +#include "omega_blackwell_codegen_attn.h" +#include "omega_blackwell_codegen_bf16.h" +#include "omega_blackwell_codegen_dec.h" +#include "omega_blackwell_codegen_gemm.h" +#include "omega_blackwell_codegen_moe2.h" +#include "omega_blackwell_codegen_pattn.h" +#include "omega_blackwell_codegen_pf.h" +#include "omega_blackwell_codegen_pfhost.h" +#include "omega_blackwell_codegen_qg.h" +#include "omega_blackwell_codegen_qmma.h" +#include "omega_blackwell_codegen_router.h" +#include "omega_blackwell_codegen_tc.h" +#include "omega_blackwell_codegen_tc2.h" +#include + +static BlackwellIRProgram program; +static int encode(void) +{ + uint8_t reference[16384], ampere[16384]; size_t a = 0, b = 0; + return omega_bw_encode_program(&program, reference, sizeof(reference), &a) || + omega_gpu_encode_program_target(&program, 86, ampere, sizeof(ampere), &b) || a != b; +} +#define EMIT(call) do { if ((call) || encode()) { fprintf(stderr, "Ampere family producer failed at line %d\n", __LINE__); return 1; } } while (0) + +static int refused(void) +{ + uint8_t reference[16384], ampere[16384]; size_t a = 0, b = 1; + return omega_bw_encode_program(&program, reference, sizeof(reference), &a) || + omega_gpu_encode_program_target(&program, 86, ampere, sizeof(ampere), &b) != -2 || b != 0; +} +#define REFUSE(call) do { if ((call) || refused()) { fprintf(stderr, "Ampere unsupported family accepted at line %d\n", __LINE__); return 1; } } while (0) +static int remaining_families(void) +{ + for (unsigned depth = 1; depth <= 4; ++depth) { + OmegaDecodeAttnSpec s = { .depth = depth }; + EMIT(omega_blackwell_codegen_decode_attn_prog(&s, &program)); + } + for (unsigned mode = OMEGA_PATTN_MODE_FUSED; mode <= OMEGA_PATTN_MODE_ATTEND; ++mode) { + OmegaPrefillAttnSpec s = { .warps = 4, .mode = mode, .mirror = mode == OMEGA_PATTN_MODE_APPEND }; + EMIT(omega_blackwell_codegen_prefill_attn_prog(&s, &program)); + } + OmegaBf16GemvSpec bf = { .k = 256, .rows = 1, .warps = 4, .depth = 1 }; + EMIT(omega_blackwell_codegen_bf16_gemv_prog(&bf, &program)); + bf.mask = 1; EMIT(omega_blackwell_codegen_bf16_gemv_prog(&bf, &program)); + bf.mask = 0; bf.ystride = 256; bf.xbatch = 2; + EMIT(omega_blackwell_codegen_bf16_gemv_prog(&bf, &program)); + OmegaFp8GemvSpec mv = { .k = 256, .lane_bytes = 8, .rows = 1, .warps = 8 }; + EMIT(omega_blackwell_codegen_fp8_gemv_prog(&mv, &program)); + mv.depth = 1; EMIT(omega_blackwell_codegen_fp8_gemv_prog(&mv, &program)); + EMIT(omega_blackwell_codegen_fp8_gemv2_prog(&mv, &program)); + OmegaFp8GemmSpec gemm = { .k = 256, .lane_bytes = 8, .mt = 2, .warps = 8 }; + EMIT(omega_blackwell_codegen_fp8gemm_prog(&gemm, &program)); + gemm.rowmap = 1; EMIT(omega_blackwell_codegen_fp8gemm_prog(&gemm, &program)); + OmegaRouterSpec router = { .warps = 8, .depth = 1 }; + EMIT(omega_blackwell_codegen_router_prog(&router, &program)); + router.experts = 256; router.shared = 1; + EMIT(omega_blackwell_codegen_router_prog(&router, &program)); + EMIT(omega_blackwell_codegen_pf_copy_prog(&program)); + OmegaRlSpec rl = { .k = 128, .e = 32, .t = 1 }; + EMIT(omega_blackwell_codegen_rl_prog(&rl, &program)); + OmegaMcSpec mc = { .h = 128, .top_k = 4 }; + EMIT(omega_blackwell_codegen_mc_prog(&mc, &program)); + EMIT(omega_blackwell_codegen_tc_probe_prog(0, &program)); + EMIT(omega_blackwell_codegen_tc_peak_prog(2, 2, 8, 128, &program)); + EMIT(omega_blackwell_codegen_tc_bw_prog(2, 1, 128, &program)); + OmegaTcGemmSpec tc = { .k = 128, .rt = 2, .ct = 2, .warps = 4 }; + EMIT(omega_blackwell_codegen_tcgemm_prog(&tc, &program)); + for (unsigned epi = OMEGA_TC2_EPI_F32; epi <= OMEGA_TC2_EPI_SWIGLU; ++epi) + for (unsigned direct = 0; direct <= 1; ++direct) { + OmegaTc2Spec s = { .k = 128, .rt = 2, .ct = 2, .warps = 4, .aqn = 2, .epi = epi, .direct = direct, .n = 256 }; + EMIT(omega_blackwell_codegen_tc2_prog(&s, &program)); + } + for (unsigned kind = OMEGA_DEC_AXPY; kind <= OMEGA_DEC_XBOUND; ++kind) { + OmegaDecSpec s = { .kind = (OmegaDecKind)kind }; + if (kind == OMEGA_DEC_AXPY) s.stride = 256; + if (kind == OMEGA_DEC_RES) s.mode = OMEGA_DEC_RES_ADD | OMEGA_DEC_RES_NORM; + if (kind == OMEGA_DEC_GATHER) { s.width = 256; s.stride = 256; } + EMIT(omega_blackwell_codegen_dec_prog(&s, &program)); + } + for (unsigned in_type = OMEGA_QG_IN_F32; in_type <= OMEGA_QG_IN_BF16; ++in_type) { + OmegaPqSpec s = { .k = 128, .in_type = in_type }; + REFUSE(omega_blackwell_codegen_pq_prog(&s, &program)); + } + OmegaQgSpec qg = { .k = 128, .rt = 4, .warps = 8, .n = 128 }; + REFUSE(omega_blackwell_codegen_qgemm_prog(&qg, &program)); + REFUSE(omega_blackwell_codegen_qmma_probe_prog(0, 8, &program)); + REFUSE(omega_blackwell_codegen_qmma_peak_prog(2, 2, 8, 128, &program)); + REFUSE(omega_blackwell_codegen_f2e4_probe_prog(&program)); + return 0; +} +int main(void) +{ + if (remaining_families()) return 1; + for (unsigned shape = 0; shape < 2; ++shape) { + for (unsigned depth = 1; depth <= 4; ++depth) { + for (unsigned prep = 0; prep < 2; ++prep) for (unsigned multi = 0; multi < 2; ++multi) { + OmegaDecodeAttn256Spec s = { .depth = depth, .prep = prep, .multi = multi }; + if (shape) { s.q_heads = 16; s.kv_heads = 2; s.q_per_cta = 4; } + EMIT(omega_blackwell_codegen_decode_attn256_prog(&s, &program)); + } + } + OmegaPrefillAttn256Spec s = {0}; + if (shape) { s.q_heads = 16; s.kv_heads = 2; } + EMIT(omega_blackwell_codegen_prefill_attn256_prog(&s, &program)); + } + for (unsigned ratio = 2; ratio <= 3; ++ratio) for (unsigned bf16 = 0; bf16 < 2; ++bf16) { + OmegaGdnSpec s = { .ratio = ratio, .state_bf16 = bf16 }; + EMIT(omega_blackwell_codegen_gdn_prog(&s, &program)); + EMIT(omega_blackwell_codegen_gdn_multi_prog(&s, &program)); + EMIT(omega_blackwell_codegen_gdn_prep_prog(&s, &program)); + EMIT(omega_blackwell_codegen_gdn_scan_prog(&s, &program)); + EMIT(omega_blackwell_codegen_gdn_post_prog(&s, &program)); + } + for (unsigned kind = OMEGA_GDN_COPY; kind <= OMEGA_GDN_ZERO; ++kind) { + OmegaGdnSpec s = { .copy = (int)kind }; + EMIT(omega_blackwell_codegen_gdn_copy_prog(&s, &program)); + } + const unsigned shapes[][2] = { { OMEGA_TERN_LAYOUT_ROWMAJOR, 1 }, { OMEGA_TERN_LAYOUT_ROWMAJOR, 2 }, + { OMEGA_TERN_LAYOUT_ROWMAJOR, 4 }, { OMEGA_TERN_LAYOUT_BLOCK, 2 }, { OMEGA_TERN_LAYOUT_BLOCK, 4 } }; + const unsigned ks[] = { 256, 2560, 8192, OMEGA_TERN_MAX_K }; + for (unsigned k = 0; k < sizeof(ks)/sizeof(ks[0]); ++k) + for (unsigned shape = 0; shape < sizeof(shapes)/sizeof(shapes[0]); ++shape) + for (unsigned epi = 0; epi < 2; ++epi) { + /* The existing generator supports the multi-chunk epilogue + * only for integer output, independently of GPU target. */ + if (ks[k] > OMEGA_TERN_CHUNK_MAX && epi == OMEGA_TERN_EPI_F32) continue; + OmegaTernGemvSpec s = { ks[k], shapes[shape][0], shapes[shape][1], 4, 1, epi, 0 }; + EMIT(omega_blackwell_codegen_tern_gemv_prog(&s, &program)); + } + puts("Ampere extended existing generator families encoded (host only)"); + return 0; +} diff --git a/tools/ampere_nvdisasm.py b/tools/ampere_nvdisasm.py new file mode 100755 index 00000000..1ccbcca3 --- /dev/null +++ b/tools/ampere_nvdisasm.py @@ -0,0 +1,137 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +"""Verifier only: compare every decoded instruction/operand against the SM121 +reference, with the explicit documented target ABI/ISA spelling differences. +NVIDIA output is ephemeral; no driver is loaded and no oracle listings committed. +""" +import argparse +import os +from pathlib import Path +import re +import struct +import subprocess +import tempfile + + +def decode(exe, target, data): + with tempfile.NamedTemporaryFile(suffix=".bin") as f: + f.write(data) + f.flush() + result = subprocess.run([exe, "-b", target, "-hex", f.name], text=True, + stdout=subprocess.PIPE, stderr=subprocess.PIPE, check=False) + if result.returncode: + raise RuntimeError(f"nvdisasm {target} refused: {result.stderr.strip()}") + instructions = re.findall(r"/\*[0-9a-fA-F]+\*/\s+([^;\n]+);", result.stdout) + if len(instructions) * 16 != len(data): + raise RuntimeError(f"{target}: decoded instruction count does not cover entire buffer") + if re.search(r"INVALID|\.WORD|\?\?", "\n".join(instructions), re.I): + raise RuntimeError(f"{target}: invalid instruction or operand") + return instructions + + +def normalize(text, target): + text = re.sub(r"\s+", " ", text.strip()) + text = re.sub(r"desc\[UR(?:Z|\d+)\]", "", text) + text = text.replace("+URZ", "") + text = text.replace("LDCU", "ULDC") + if target == "SM121" and text.startswith("ULDC"): + # SM121's LDCU uses an explicit zero uniform base; SM86's ULDC + # encodes a direct cbank byte offset. + text = text.replace("[URZ+", "[").replace("[URZ]", "[0x0]") + if re.fullmatch(r"ULDC\.64 UR\d+, c\[0x0\]\[0x358\]", text): + # Reserved Blackwell descriptor load: not consumed on Ampere, + # whose shorter CB0 must not be read at this offset. + return "NOP" + if text.startswith("F2FP."): + text = text.replace(".F32", "") + if target == "SM121" and re.search(r"\b(?:LDC|ULDC)(?:\.| )", text): + def parameter(match): + offset = int(match[1], 16) + if offset >= 0x380: + offset = offset - 0x380 + 0x160 + return f"c[0x0][0x{offset:x}]" + text = re.sub(r"c\[0x0\]\[0x([0-9a-f]+)\]", parameter, text) + return text + + +def compare(exe, reference, actual): + expected = [normalize(x, "SM121") for x in decode(exe, "SM121", reference)] + observed = [normalize(x, "SM86") for x in decode(exe, "SM86", actual)] + if expected != observed: + for i, (a, b) in enumerate(zip(expected, observed)): + if a != b: + raise RuntimeError(f"instruction {i}: expected {a!r}, observed {b!r}") + raise RuntimeError("decoded lengths differ") + return observed + + +def main(): + parser = argparse.ArgumentParser() + parser.add_argument("corpus", type=Path) + parser.add_argument("--nvdisasm", default=os.environ.get("NVDISASM", "/usr/local/cuda/bin/nvdisasm")) + args = parser.parse_args() + pairs = sorted(args.corpus.glob("*.sm86.bin")) + if not pairs: + raise RuntimeError("empty SM86 corpus") + coverage = set() + mutation = None + uniform_dst_mutation = None + for actual in pairs: + prefix = str(actual)[:-len("sm86.bin")] + reference = Path(prefix + "sm121.bin").read_bytes() + code = actual.read_bytes() + try: + decoded = compare(args.nvdisasm, reference, code) + except RuntimeError as error: + raise RuntimeError(f"{actual.name}: {error}") from error + metadata = Path(prefix + "ir").read_bytes() + if len(metadata) % 8: + raise RuntimeError("malformed IR metadata") + coverage.update(op for op, _ in struct.iter_unpack("=II", metadata)) + if mutation is None: + for i, text in enumerate(decoded): + if re.search(r"^(?:@!?P\d+ )?[A-Z0-9_.]+ R\d+,", text): + changed = bytearray(code) + # Corrupt a real GPR destination, not padding or an ignored bit. + changed[i * 16 + 2] ^= 1 + mutation = (reference, bytes(changed)) + break + if uniform_dst_mutation is None: + for i, text in enumerate(decoded): + if text == "IMAD R12, R8, UR2, R16": + changed = bytearray(code) + # Reintroduce the old bug: a uniform SOURCE selected UR2's + # physical index for the GPR destination instead of R12. + changed[i * 16 + 2] = 2 + uniform_dst_mutation = (reference, bytes(changed)) + break + missing = set(range(60)) - coverage + if missing: + raise RuntimeError(f"opcode coverage missing: {sorted(missing)}") + if mutation is None: + raise RuntimeError("no operand-bearing instruction for negative control") + try: + compare(args.nvdisasm, *mutation) + except RuntimeError: + pass + else: + raise RuntimeError("negative control BROKEN: mutated register encoding passed") + if uniform_dst_mutation is None: + raise RuntimeError("uniform-source nonidentity GPR-map regression missing") + try: + compare(args.nvdisasm, *uniform_dst_mutation) + except RuntimeError: + pass + else: + raise RuntimeError("negative control BROKEN: old uniform-destination bug passed") + refused = list(args.corpus.glob("*.refused")) + refused_markers = {imm for file in refused for op, imm in struct.iter_unpack("=II", file.read_bytes()) + if (op, imm) in {(16, 0x51303832), (37, 0x46453433)}} + if refused_markers != {0x51303832, 0x46453433}: + raise RuntimeError("native FP8 QMMA and E4M3 conversion refusal coverage missing") + print(f"SM86 offline oracle: {len(pairs)} kernels, every opcode/operand matched; mutated operand refused;") + print(f"native FP8 refusals: {len(refused)} kernels. Device qualification: NOT_RUN") + + +if __name__ == "__main__": + main() diff --git a/tools/gpu_engine_backend_mutations.sh b/tools/gpu_engine_backend_mutations.sh index 6bbc6be0..72b04ea1 100755 --- a/tools/gpu_engine_backend_mutations.sh +++ b/tools/gpu_engine_backend_mutations.sh @@ -36,7 +36,7 @@ PHYS=$(cd "${PHYSICS_DIR:-../physics}" 2>/dev/null && pwd -P) || { } TP=$PHYS/third_party/nvidia-open-580.173.02 INC="-I$PHYS/m16 -I$PHYS/nvrm -I$TP/src/common/sdk/nvidia/inc -I$TP/kernel-open/common/inc -I$TP/kernel-open/nvidia-uvm -I$TP/src/nvidia/arch/nvalloc/unix/include" -SRCS="src/omega_blackwell_submit.c src/omega_blackwell_engine.c src/omega_gpu_engine.c src/omega_blackwell_matmul.c src/omega_blackwell_codegen.c src/cudapp_om_units.c src/omega_blackwell_encoder.c src/omega_blackwell_qmd.c src/omega_blackwell_realize.c src/omega_vector.c src/omega_core.c src/omega_canonical.c src/sha256.c" +SRCS="src/omega_blackwell_submit.c src/omega_blackwell_engine.c src/omega_gpu_engine.c src/omega_blackwell_matmul.c src/omega_blackwell_codegen.c src/cudapp_om_bw_enc_sm121.c src/cudapp_om_cubin_elf.c src/cudapp_om_ampere_enc_sm86.c src/cudapp_om_amp_runtime.c src/omega_blackwell_encoder.c src/omega_blackwell_qmd.c src/omega_blackwell_realize.c src/omega_vector.c src/omega_core.c src/omega_canonical.c src/sha256.c" BUILD="gcc -std=gnu11 -O2 -Wall -Wextra -Werror -D_GNU_SOURCE -pthread -ffunction-sections -fdata-sections -Isrc -Itests $INC -o .gpu_engine_bt tests/test_omega_blackwell_engine.c tests/fake_m16_native.c $SRCS -Wl,--gc-sections -lm" OUT=${GPU_ENGINE_BMUT_OUT:-} diff --git a/tools/runtime_portability_check.sh b/tools/runtime_portability_check.sh index 6355f910..afcff705 100755 --- a/tools/runtime_portability_check.sh +++ b/tools/runtime_portability_check.sh @@ -5,7 +5,7 @@ # Host only, no compiler, no device. POSIX sh + awk. # # Fails (exit 1, one line per problem) when: -# 1. a src/omega_gpu_*, src/omega_blackwell_* or src/omega_bw_* file has no row in the table +# 1. a src/omega_gpu_*, src/omega_blackwell_*, src/omega_bw_* or src/omega_ampere_* file has no row in the table # 2. a row names a file that does not exist, or is duplicated, or has a bad class / binding / empty reason # 3. a PORTABLE row's file includes a Linux or NVRM header (nvrm.h, m16_native.h, omega_gpu_platform_linux.h, # pthread.h, unistd.h, fcntl.h, sys/*, linux/*) or a Blackwell chip header (omega_blackwell_*, omega_bw_*) @@ -82,7 +82,7 @@ while IFS=' ' read -r f class reason bind extra; do done < "$tmp_rows" # --- every file has a row ---------------------------------------------------------------------- -for p in "$root"/src/omega_gpu_* "$root"/src/omega_blackwell_* "$root"/src/omega_bw_*; do +for p in "$root"/src/omega_gpu_* "$root"/src/omega_blackwell_* "$root"/src/omega_bw_* "$root"/src/omega_ampere_*; do [ -f "$p" ] || continue f=src/$(basename "$p") cut -f1 "$tmp_rows" | grep -qx "$f" || bad "no row in the table for $f" @@ -90,5 +90,5 @@ done n=$(wc -l < "$tmp_rows" | tr -d ' ') rm -f "$tmp_rows" -if [ "$fail" = 0 ]; then echo "PASS: $n rows, every omega_gpu_* / omega_blackwell_* / omega_bw_* file in src/ has one and the rows agree with the includes"; exit 0; fi +if [ "$fail" = 0 ]; then echo "PASS: $n rows, every omega_gpu_* / omega_blackwell_* / omega_bw_* / omega_ampere_* file in src/ has one and the rows agree with the includes"; exit 0; fi echo "FAIL: portability table does not match the tree"; exit 1 From 8cce4a6ecfcf28703745b9883bb4f91e4790f35f Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 12:13:46 -0500 Subject: [PATCH 02/21] Cover Ampere files in portability controls and add pinned x86 probes Signed-off-by: Drake Stapleton --- tests/ampere/.crumb | 10 +-- tests/ampere/README.md | 21 +++++ tests/ampere/native_omega_x86.py | 112 ++++++++++++++++++++++++++ tools/runtime_portability_controls.sh | 2 +- 4 files changed, 139 insertions(+), 6 deletions(-) create mode 100755 tests/ampere/native_omega_x86.py diff --git a/tests/ampere/.crumb b/tests/ampere/.crumb index 57756223..1e58083c 100644 --- a/tests/ampere/.crumb +++ b/tests/ampere/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T17:00:43Z", + "compiled_at": "2026-10-28T17:13:46Z", "compiler": "crumb-compile/1", - "digest": "sha256:d4a012604c144937114a37f7098191245497a2199020f4d2fb3646a067ecae83", + "digest": "sha256:f54e095f69d9d27e2c7e26544dfd69012d6de78f922ab4d3d6175b4fbb33c916", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "files": 0, - "generated_at_commit": "6e8c383fd8b7bd0d09fbbe8e3c36f32818d58bae", - "source_tree": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855" + "files": 6, + "generated_at_commit": "a80179b2686eed7e69cb7ed8b19dc0442eb38e1a", + "source_tree": "sha256:9c64fd5a3146d6e33b66a9e4f07365daf0a1006ccef3b005173ae6fe60441cf5" } }, "layer": "tests", diff --git a/tests/ampere/README.md b/tests/ampere/README.md index cedf942b..777c274f 100644 --- a/tests/ampere/README.md +++ b/tests/ampere/README.md @@ -159,3 +159,24 @@ A doctor PASS, disassembler PASS, or x86 host PASS must never be copied into a device result. No script modifies the qualified-device table. Only actual real-card results with the required negative controls can support a separate reviewed qualification change. Any failed check leaves the corresponding card unqualified. + +## Experimental native Omega x86 oracle + +This optional host-only probe does not change the production bridge-C route. +Use a checkout of omega-mv draft #923 at +`becf5c817bcb7e0846d12ebfc2be91042d8ad89a`; the probe verifies both that revision +and its tracked AArch64 compiler fingerprint before compiling anything. + +```sh +python3 tests/ampere/native_omega_x86.py \ + --compiler-tree /path/to/pinned/omega-mv \ + --output build/ampere-native-x86 +``` + +The probe compiles all four actual units to x86 and executes composed small-unit +callers under `qemu-x86_64`, comparing their output with native AArch64 and +requiring negative controls to fail. Label these results **EMULATED**, not native +x86 or device qualification. The cubin unit's full-size private-ABI buffers do +not fit Omega's local-array/stack limits; its native private-ABI execution remains +**NOT_RUN**, not a reduced-signature or fake-buffer PASS. The generated bridge-C +cubin tests exercise the full-size host boundary separately. diff --git a/tests/ampere/native_omega_x86.py b/tests/ampere/native_omega_x86.py new file mode 100755 index 00000000..27b82614 --- /dev/null +++ b/tests/ampere/native_omega_x86.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python3 +"""Explicit experimental #923 oracle. Host EMULATED only; never GPU evidence. + +The large cubin private-ABI unit is compiled, not called: local Omega arrays +cannot supply its full 16 MiB/128 MiB view arguments. No signatures are shrunk. +""" +import argparse +import hashlib +from pathlib import Path +import subprocess + +PIN = "becf5c817bcb7e0846d12ebfc2be91042d8ad89a" +COMPILER_SHA = "5f0faab7cd4fc12158cf8e099418098d278df644efc10e4e7e2e5ca6141fca86" +ROOT = Path(__file__).resolve().parents[2] +ENCODER_MAIN = """ +fn main to int +ins = new ulong 8192 0 +phys = new ulong 288 0 +code = new uchar 16384 0 +n = ENTRY view ins view phys 1 0 edit code +if ne n 16 +ret 1 +end +w = write 1 code 0 n +if ne w 16 +ret 2 +end +ret 0 +end +""" +RUNTIME_MAIN = """ +fn main to int +m = new ulong 16 0 +q = new ulong 64 0 +put m 0 2 +put m 1 4096 +put m 2 1 +put m 3 4096 +r = amp_runtime view m edit q +if ne r 0 +ret 1 +end +put m 3 0 +r = amp_runtime view m edit q +if ne r 1 +ret 2 +end +ret 0 +end +""" + + +def run(command, **kw): + return subprocess.run(command, capture_output=True, timeout=180, **kw) + + +def compile_program(compiler, source, path): + result = run([str(compiler)], input=source) + if result.returncode: + raise RuntimeError(f"compile refused {path.name}: {result.returncode}: {result.stderr!r}") + path.write_bytes(result.stdout) + path.chmod(0o755) + + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("--compiler-tree", type=Path, required=True) + parser.add_argument("--output", type=Path, required=True) + args = parser.parse_args() + tree = args.compiler_tree.resolve() + observed = subprocess.check_output(["git", "-C", str(tree), "rev-parse", "HEAD"], text=True).strip() + compiler = tree / "seed/out/omc" + if observed != PIN or hashlib.sha256(compiler.read_bytes()).hexdigest() != COMPILER_SHA: + raise SystemExit("experimental compiler source/binary pin mismatch") + args.output.mkdir(parents=True, exist_ok=True) + units = (("om/encoder/bw_enc_sm121.om", "bw_enc_sm121"), + ("om/encoder/ampere_enc_sm86.om", "ampere_enc_sm86"), + ("om/encoder/amp_runtime.om", "amp_runtime"), + ("om/cubin/cubin_elf.om", "cubin_elf")) + for relative, entry in units: + source = (ROOT / relative).read_bytes() + bare = args.output / (entry + ".x86.unit") + compile_program(compiler, b"target x86linux\n" + source, bare) + print("EMULATED-ORACLE INPUT COMPILE", relative, hashlib.sha256(source).hexdigest(), + "x86-unit-sha256", hashlib.sha256(bare.read_bytes()).hexdigest()) + if entry == "cubin_elf": + print("NOT_RUN native-cubin private-ABI execution: full-size external buffer caller required") + continue + suffix = RUNTIME_MAIN if entry == "amp_runtime" else ENCODER_MAIN.replace("ENTRY", entry) + program = source + suffix.encode() + arm = args.output / (entry + ".arm") + x86 = args.output / (entry + ".x86") + compile_program(compiler, program, arm) + compile_program(compiler, b"target x86linux\n" + program, x86) + native = run([str(arm)]) + emulated = run(["qemu-x86_64", str(x86)]) + if native.returncode or emulated.returncode or native.stdout != emulated.stdout: + raise RuntimeError(f"{entry} runtime parity failed: native={native.returncode}, x86={emulated.returncode}") + mutant_suffix = suffix.replace("if ne r 1", "if ne r 0") if entry == "amp_runtime" else suffix.replace("view phys 1 0", "view phys 0 0") + mutant = args.output / (entry + ".mutant.x86") + compile_program(compiler, b"target x86linux\n" + source + mutant_suffix.encode(), mutant) + negative = run(["qemu-x86_64", str(mutant)]) + expected = 2 if entry == "amp_runtime" else 1 + if negative.returncode != expected: + raise RuntimeError(f"{entry} negative control was not caught: {negative.returncode}") + print("EMULATED PASS", entry, "native-AArch64/x86-QEMU stdout-sha256", + hashlib.sha256(emulated.stdout).hexdigest(), "negative-exit", negative.returncode) + print("EXPERIMENTAL NATIVE X86 SMALL-UNIT PROBES PASS; native-cubin runtime NOT_RUN; device NOT_RUN") + + +if __name__ == "__main__": + main() diff --git a/tools/runtime_portability_controls.sh b/tools/runtime_portability_controls.sh index 96b3d0b8..eafb1326 100755 --- a/tools/runtime_portability_controls.sh +++ b/tools/runtime_portability_controls.sh @@ -13,7 +13,7 @@ ok=0 fresh() { # fresh : scratch root with a copy of the GPU files and the table r="$scratch/$1"; rm -rf "$r"; mkdir -p "$r/src" - cp src/omega_gpu_* src/omega_blackwell_* src/omega_bw_* "$r/src/" + cp src/omega_gpu_* src/omega_blackwell_* src/omega_bw_* src/omega_ampere_* "$r/src/" cp "$table" "$r/table.tsv" } expect_fail() { # expect_fail From 2e6bf8c716a2ad3a0835e4354e166482ca631dfd Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 12:36:28 -0500 Subject: [PATCH 03/21] Fix Ampere host integration gates and preserve explicit numeric cutover pins Signed-off-by: Drake Stapleton --- .github/workflows/ci.yml | 2 ++ mk/ampere-encoder.mk | 2 +- om/encoder/ampere_enc_sm86.om | 2 +- src/omega_gpu_platform_linux.c | 2 +- tests/test_ampere_runtime.c | 4 ++-- tools/ampere_nvdisasm.py | 36 +++++++++++++++++++++++++------- tools/extract/drift-baseline.tsv | 9 ++++++++ tools/extract/drift.sh | 24 +++++++++++++++++++-- 8 files changed, 67 insertions(+), 14 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5659f588..52ec4125 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -37,6 +37,7 @@ jobs: git clone -q https://github.com/aien-dev/omega-bridge "$RUNNER_TEMP/omega-bridge" git -C "$RUNNER_TEMP/omega-bridge" checkout -q "$(grep -v '^#' om/omega-bridge.lock)" git -C "$RUNNER_TEMP/omega-bridge" rev-parse HEAD + (cd "$RUNNER_TEMP/omega-bridge" && sh tools/bootstrap.sh && sh tools/build.sh) - name: Host-only tests # The runner's bash uses -e -o pipefail, so make's status is captured with `||`. env: @@ -65,6 +66,7 @@ jobs: git -C "$RUNNER_TEMP/omega-mv" checkout -q e5b32567a7aff3ce594e3254a622a846a6cd190b git clone -q https://github.com/aien-dev/omega-bridge "$RUNNER_TEMP/omega-bridge" git -C "$RUNNER_TEMP/omega-bridge" checkout -q "$(grep -v '^#' om/omega-bridge.lock)" + (cd "$RUNNER_TEMP/omega-bridge" && sh tools/bootstrap.sh && sh tools/build.sh) - name: Bindings regenerate and mutants go red run: make test-om-units test-om-encoder-mutants test-om-cubin-mutants OMEGA_MV="$RUNNER_TEMP/omega-mv" OMEGA_BRIDGE_DIR="$RUNNER_TEMP/omega-bridge" sbom: diff --git a/mk/ampere-encoder.mk b/mk/ampere-encoder.mk index 1ef3d414..939c0c81 100644 --- a/mk/ampere-encoder.mk +++ b/mk/ampere-encoder.mk @@ -32,7 +32,7 @@ test-ampere-encoder-oracle: $(AMPERE_ENCODER_TEST) $(OUT_DIR)/ampere_math_device @mkdir -p $(AMPERE_ORACLE_CORPUS)/sm121 OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(AMPERE_ENCODER_TEST) OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_families - OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_matmul_families + OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_matmul_families --dump OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) sh tools/sm121dis/corpus.sh $(OUT_DIR) $(AMPERE_ORACLE_CORPUS)/sm121 OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_math_device --emit-only python3 tools/ampere_nvdisasm.py $(AMPERE_ORACLE_CORPUS) diff --git a/om/encoder/ampere_enc_sm86.om b/om/encoder/ampere_enc_sm86.om index 728c432a..b7a80a6c 100644 --- a/om/encoder/ampere_enc_sm86.om +++ b/om/encoder/ampere_enc_sm86.om @@ -287,7 +287,7 @@ put4 w wda o 29217 rb o 3 0 ctl o 5227520 ret 0 end if eq op 31 -put4 w wda o 29217 rb o 3 0 ctl o 5227520 +put4 w wda o 29217 or rb o 3 2147483648 0 ctl o 5227520 ret 0 end if eq op 32 diff --git a/src/omega_gpu_platform_linux.c b/src/omega_gpu_platform_linux.c index fc9a009a..92c5f172 100644 --- a/src/omega_gpu_platform_linux.c +++ b/src/omega_gpu_platform_linux.c @@ -455,7 +455,7 @@ static int ref_queue_submit(void *ctx, OmegaGpuQueueHandle q, const uint32_t *wo uint32_t *dst = ring->cpu; if (xpre) memcpy(dst, L2_INVAL_PREFIX, sizeof L2_INVAL_PREFIX); memcpy(dst + xpre, words, (size_t)nwords * 4u); - __asm__ volatile("dsb sy" ::: "memory"); + barrier(); if (nvrm_chan_submit(&r->m16.rm, (uint32_t)slot + 1u, ring, 0, nwords + xpre) != 0) rc = OMEGA_GPU_PLAT_REFUSED_DEVICE; else { r->x_l2_pending[slot] = 0; r->xinflight[slot]++; } } diff --git a/tests/test_ampere_runtime.c b/tests/test_ampere_runtime.c index 25d26922..bc400597 100644 --- a/tests/test_ampere_runtime.c +++ b/tests/test_ampere_runtime.c @@ -109,8 +109,8 @@ static void class_and_bdf(void) { assert(select_classes(&rm, bw, 3) != 0); /* a Blackwell class set cannot authorize SM86 */ rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_12_01; assert(select_classes(&rm, bw, 3) == 0 && rm.target_sm == 121 && !rm.discrete); - rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_8_00; - assert(select_classes(&rm, amp, 3) != 0); /* GA100 is not silently treated as GA10x */ + rm.sm_version = NV2080_CTRL_GR_INFO_SM_VERSION_8_09; + assert(select_classes(&rm, amp, 3) != 0); /* Ada is not silently treated as GA10x */ nv_ioctl_card_info_t cards[64] = {0}; cards[0].valid = cards[1].valid = 1; cards[1].pci_info.bus = 1; cards[1].pci_info.slot = 2; diff --git a/tools/ampere_nvdisasm.py b/tools/ampere_nvdisasm.py index 1ccbcca3..c2a31b53 100755 --- a/tools/ampere_nvdisasm.py +++ b/tools/ampere_nvdisasm.py @@ -54,8 +54,14 @@ def parameter(match): return text -def compare(exe, reference, actual): +def compare(exe, reference, actual, ops=()): expected = [normalize(x, "SM121") for x in decode(exe, "SM121", reference)] + # Op21's IR contract is MMIO.GPU. Historical SM121 incorrectly emits EF; + # repair that legacy encoder separately, never treat the two as aliases. + # This target-specific expectation retains every register/address operand. + for i, op in enumerate(ops): + if op == 21: + expected[i] = re.sub(r"\bLDG\.E\.EF\b", "LDG.E.MMIO.GPU", expected[i]) observed = [normalize(x, "SM86") for x in decode(exe, "SM86", actual)] if expected != observed: for i, (a, b) in enumerate(zip(expected, observed)): @@ -76,17 +82,19 @@ def main(): coverage = set() mutation = None uniform_dst_mutation = None + mmio_mutation = None for actual in pairs: prefix = str(actual)[:-len("sm86.bin")] reference = Path(prefix + "sm121.bin").read_bytes() code = actual.read_bytes() - try: - decoded = compare(args.nvdisasm, reference, code) - except RuntimeError as error: - raise RuntimeError(f"{actual.name}: {error}") from error metadata = Path(prefix + "ir").read_bytes() if len(metadata) % 8: raise RuntimeError("malformed IR metadata") + ops = [op for op, _ in struct.iter_unpack("=II", metadata)] + try: + decoded = compare(args.nvdisasm, reference, code, ops) + except RuntimeError as error: + raise RuntimeError(f"{actual.name}: {error}") from error coverage.update(op for op, _ in struct.iter_unpack("=II", metadata)) if mutation is None: for i, text in enumerate(decoded): @@ -94,7 +102,7 @@ def main(): changed = bytearray(code) # Corrupt a real GPR destination, not padding or an ignored bit. changed[i * 16 + 2] ^= 1 - mutation = (reference, bytes(changed)) + mutation = (reference, bytes(changed), ops) break if uniform_dst_mutation is None: for i, text in enumerate(decoded): @@ -103,8 +111,14 @@ def main(): # Reintroduce the old bug: a uniform SOURCE selected UR2's # physical index for the GPR destination instead of R12. changed[i * 16 + 2] = 2 - uniform_dst_mutation = (reference, bytes(changed)) + uniform_dst_mutation = (reference, bytes(changed), ops) break + if mmio_mutation is None and 21 in ops: + changed = bytearray(code) + i = ops.index(21) + # Historical EF word must not satisfy the Ampere MMIO contract. + struct.pack_into("> "$scratch/om/$numeric" + git -C "$scratch/om" -c user.name=drift-selftest -c user.email=drift@selftest.invalid commit -q -am "numeric cutover drift self-test" + out=$(check "$scratch/om" HEAD "$baseline" || true) + blob=$(git -C "$scratch/om" rev-parse "HEAD:$numeric") + if grep -qxF "DRIFT $numeric differs $blob" <<< "$out" && grep -q '^DRIFT-GATE: FAIL' <<< "$out"; then + echo "control 3: red as required ($numeric changed beyond its explicit cutover pin)" + else + echo "control 3: BROKEN, gate hid a numeric source/header change: $numeric" + echo "$out"; fail=1 + fi +done + echo "real check:" check "$omega" "$oref" "$baseline" || fail=1 -[[ $fail -eq 0 ]] && echo "SELF-TEST: PASS (both controls red, real check green)" || echo "SELF-TEST: FAIL" +[[ $fail -eq 0 ]] && echo "SELF-TEST: PASS (all controls red, real check green)" || echo "SELF-TEST: FAIL" exit "$fail" From b026505acac2523a29a8585a3194927404e76533 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 12:56:41 -0500 Subject: [PATCH 04/21] Correct Ampere branch and subtraction semantics with independent controls Signed-off-by: Drake Stapleton --- docs/PORT-AMPERE.md | 22 +++++++++ evidence/CUDAPP-AMPERE/wolfram-branch.txt | 12 +++++ mk/ampere-encoder.mk | 1 + om/encoder/ampere_enc_sm86.om | 15 +++--- src/cudapp_om_ampere_enc_sm86.c | 13 +++-- src/cudapp_om_units.ident | 2 +- tests/ampere/.crumb | 10 ++-- tests/test_omega_ampere_encoder.c | 13 +++++ tools/ampere_nvdisasm.py | 58 +++++++++++++++++++++++ 9 files changed, 125 insertions(+), 21 deletions(-) create mode 100644 evidence/CUDAPP-AMPERE/wolfram-branch.txt diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index c5580478..9258342a 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -86,6 +86,28 @@ Main, acting for Drake, authorized this separately pinned mode; the original a wrong-seed mutant. The generated identities pin both frontend and converter bytes, not merely a moving branch name. +The x86 numeric source/header divergence from Omega's retained CPU oracles is +intentional. Main authorized four explicit cutover blob pins, each with a +rationale, in `tools/extract/drift-baseline.tsv:2`; no wildcard exclusion is +used. `tools/extract/drift.sh:110` mutates each retained source/header and +requires a named drift failure, preserving future change detection. + +The Ampere oracle also exposed the historical sm_121 `BW_IR_LDG_MMIO` mismatch: +its header promises MMIO.GPU but its old encoder emits EF +([issue #171](https://github.com/aien-dev/CUDApp/issues/171)). +The sm_86 expectation enforces the IR's MMIO.GPU contract, retaining every +operand and rejecting an EF mutant; it does not equate the cache policies. +The sm_121 correction is isolated in a separate PR and is not part of this +port. No disassembly result establishes cache coherence or device behavior. + +SM86 `BRA` uses a byte-displacement field rather than SM121's split field. +The corpus oracle retains exact branch/join destinations and barrier registers; +wrong-target and wrong-barrier controls must fail. SM86 BSSY/BSYNC omit SM121's +printed `.RECONVERGENT` qualifier, not its reconvergence semantics. +Signed-field arithmetic is recorded with its Wolfram query and result in +`evidence/CUDAPP-AMPERE/wolfram-branch.txt`. FSUB's source negate bit is also +checked independently; FADD cannot satisfy the subtraction contract. + ## First real run: operator-provided access Provide, for **each card**: which machine holds it, the machine's OS/distribution diff --git a/evidence/CUDAPP-AMPERE/wolfram-branch.txt b/evidence/CUDAPP-AMPERE/wolfram-branch.txt new file mode 100644 index 00000000..340db061 --- /dev/null +++ b/evidence/CUDAPP-AMPERE/wolfram-branch.txt @@ -0,0 +1,12 @@ +Purpose: signed SM86 BRA field constants used by om/encoder/ampere_enc_sm86.om. +Arithmetic is MODELED; this is not device execution evidence. + +WolframLanguageEvaluator query: +{FromDigits["3FFF0",16],BitOr[FromDigits["03800000",16],FromDigits["3FFF0",16]],Table[{d,BitAnd[16 Mod[d-1,2^32],2^32-1],BitAnd[Floor[If[Mod[d-1,2^32]>=2^31,Mod[d-1,2^32]-2^32,Mod[d-1,2^32]]/2^28],2^18-1]},{d,{2,-2,0,1,2147483647,-2147483648}}]} + +Observed evaluator result: +{262128, 58982384, {{2, 16, 0}, {-2, 4294967248, 262143}, {0, 4294967280, 262143}, {1, 0, 0}, {2147483647, 4294967264, 7}, {-2147483648, 4294967280, 7}}} + +The byte displacement is in word 1; its sign extension occupies low 18 bits of word 2. +SM121's split displacement encoding is not reused for SM86. +The independent nvdisasm corpus gate compares branch destinations and requires a wrong-target mutant to fail. diff --git a/mk/ampere-encoder.mk b/mk/ampere-encoder.mk index 939c0c81..f56a2227 100644 --- a/mk/ampere-encoder.mk +++ b/mk/ampere-encoder.mk @@ -29,6 +29,7 @@ test-ampere-encoder: $(AMPERE_ENCODER_TEST) test-ampere-encoder-oracle: $(AMPERE_ENCODER_TEST) $(OUT_DIR)/ampere_math_device \ $(OUT_DIR)/ampere_families $(OUT_DIR)/ampere_matmul_families sm121dis-corpus-bins @test "$(CUDAPP_AMPERE_CORPUS)" = 1 || { echo 'use CUDAPP_AMPERE_CORPUS=1 and a fresh OUT_DIR' >&2; exit 1; } + @rm -rf -- $(AMPERE_ORACLE_CORPUS) @mkdir -p $(AMPERE_ORACLE_CORPUS)/sm121 OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(AMPERE_ENCODER_TEST) OMEGA_AMPERE_CORPUS_DIR=$(abspath $(AMPERE_ORACLE_CORPUS)) ./$(OUT_DIR)/ampere_families diff --git a/om/encoder/ampere_enc_sm86.om b/om/encoder/ampere_enc_sm86.om index b7a80a6c..5cc3dc42 100644 --- a/om/encoder/ampere_enc_sm86.om +++ b/om/encoder/ampere_enc_sm86.om @@ -1,4 +1,4 @@ -note ampere_enc_sm86.om: explicit SM86 encoder; the SM121 encoder is unchanged. +note Explicit SM86 encoder; SM121 uses its separate bw_enc_sm121.om unit. note Input layout matches bw_enc_sm121.om. Global addresses are plain 64-bit registers, note not Blackwell descriptors. Parameter constants move from byte 896 to byte 352. note The final preflight validates every operand and instruction before storing any output. @@ -366,15 +366,14 @@ end ret 1 end -note op 46: BRA. rel = imm - 1 as int32; low 6 bits at w0 18..23, rel arithmetic-shifted by 6 at w1 bit 2 +note SM86 BRA stores the signed byte displacement in w1 and low 18 bits of w2, not the SM121 split field. fn enc_bra o view ulong 16 w edit ulong 4 to ulong imm = get o 6 rel = and sub imm 1 4294967295 -s = shr rel 6 -c = ulong 58720256 +s = and shl rel 4 4294967295 +c = or 58720256 shr rel 28 if ge rel 2147483648 -s = or s 4227858432 -c = 58982399 +c = or 58982384 shr rel 28 end d = get o 7 if eq d 0 @@ -383,8 +382,8 @@ if and eq imm 0 eq get o 9 0 d = NOPC end end -a = or or 2375 shl pred o 12 shl and rel 63 18 -put4 w a and shl s 2 4294967295 c d +a = or 2375 shl pred o 12 +put4 w a s c d ret 0 end diff --git a/src/cudapp_om_ampere_enc_sm86.c b/src/cudapp_om_ampere_enc_sm86.c index e829a042..f805d35e 100644 --- a/src/cudapp_om_ampere_enc_sm86.c +++ b/src/cudapp_om_ampere_enc_sm86.c @@ -331,7 +331,7 @@ if(({uint64_t _a=v2;uint64_t _b=30ULL;o_op(6, 5, _a,_b);})){ return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=31ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29217ULL;f11(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f7(v0, v0_n, p1);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f6(v0, v0_n, p1);});f0(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29217ULL;f11(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f7(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f6(v0, v0_n, p1);});f0(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=32ULL;o_op(6, 5, _a,_b);})){ @@ -413,11 +413,10 @@ static uint64_t f17(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 6ULL, 5); uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);}); -uint64_t __attribute__((unused)) v4=({uint64_t _a=v3;uint64_t _b=6ULL;o_op(16, 5, _a,_b);}); -uint64_t __attribute__((unused)) v5=58720256ULL; +uint64_t __attribute__((unused)) v4=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(15, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=58720256ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=28ULL;o_op(16, 5, _a,_b);});o_op(13, 5, _a,_b);}); if(({uint64_t _a=v3;uint64_t _b=2147483648ULL;o_op(11, 5, _a,_b);})){ -v4=({uint64_t _a=v4;uint64_t _b=4227858432ULL;o_op(13, 5, _a,_b);}); -v5=58982399ULL; +v5=({uint64_t _a=58982384ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=28ULL;o_op(16, 5, _a,_b);});o_op(13, 5, _a,_b);}); } uint64_t __attribute__((unused)) v6=o_get(v0, v0_n, 7ULL, 5); if(({uint64_t _a=v6;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ @@ -426,8 +425,8 @@ if(({uint64_t _a=({uint64_t _a=v2;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t v6=1032192ULL; } } -uint64_t __attribute__((unused)) v7=({uint64_t _a=({uint64_t _a=2375ULL;uint64_t _b=({uint64_t _a=({f12(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=63ULL;o_op(12, 5, _a,_b);});uint64_t _b=18ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v7;uint64_t p2=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=2ULL;o_op(15, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});uint64_t p3=v5;uint64_t p4=v6;f0(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v7=({uint64_t _a=2375ULL;uint64_t _b=({uint64_t _a=({f12(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v7;uint64_t p2=v4;uint64_t p3=v5;uint64_t p4=v6;f0(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } static uint64_t f18(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ diff --git a/src/cudapp_om_units.ident b/src/cudapp_om_units.ident index d759eb77..5c5018a0 100644 --- a/src/cudapp_om_units.ident +++ b/src/cudapp_om_units.ident @@ -1,4 +1,4 @@ omega-ident 2 unit=bw_enc_sm121 abi=portable-seeded-1 src=675f92514e2b0ee9b147e4f2ee159f94c632c14b5fae1dac85249bb537959a38 c=a500db18e6d197dbd1f45eb2ae8e6a2e5161fd219458275209b220e8a7be505d omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/bw_enc_sm121.om omega-ident 2 unit=cubin_elf abi=portable-seeded-1 src=3611fd7bf1a560b6cf1075cfeb15b4b17496a388d837d886280c8cb80f301646 c=899ff3055a58f4fb1646ee31696248d3a87eafbae8fb2cdeec477ab65b1054cd omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/cubin/cubin_elf.om -omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=7b3d08840f141c8b16e31603aa1051fcc0517a8f9f67798287ee177222654145 c=1ef525ed7fc17d536afebd7349cd0682750ce77e376de24c24ccb61cace54e5e omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om +omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=51bd3a84f34c4e4d435daa92abad6c4c326b7166d87316ab6f5f980db43b3440 c=48cfcf0e52eed2fe0692ed089a48fac9b84a54b0acbcdb59cda8bec0a4b3cf16 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om omega-ident 2 unit=amp_runtime abi=portable-seeded-1 src=22e738d06c9a60275a6770ed6809eb76eabbd8429eeb121eaac3ee23c79f1d57 c=5d30f33b39142c14139ce0b560fab56abcb6967f471e7345d1a39b6eb0164ac9 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/amp_runtime.om diff --git a/tests/ampere/.crumb b/tests/ampere/.crumb index 1e58083c..60b07e0e 100644 --- a/tests/ampere/.crumb +++ b/tests/ampere/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T17:13:46Z", + "compiled_at": "2026-10-28T17:55:27Z", "compiler": "crumb-compile/1", - "digest": "sha256:f54e095f69d9d27e2c7e26544dfd69012d6de78f922ab4d3d6175b4fbb33c916", + "digest": "sha256:1727642b7e2f3553b02d7a6856836d9d2861d5461443033d05f1aeade30e7a51", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "files": 6, - "generated_at_commit": "a80179b2686eed7e69cb7ed8b19dc0442eb38e1a", - "source_tree": "sha256:9c64fd5a3146d6e33b66a9e4f07365daf0a1006ccef3b005173ae6fe60441cf5" + "files": 7, + "generated_at_commit": "2e6bf8c716a2ad3a0835e4354e166482ca631dfd", + "source_tree": "sha256:e5759f07067515cefb5d8522d0710a501b924604141eece303f56f9e2fb9934e" } }, "layer": "tests", diff --git a/tests/test_omega_ampere_encoder.c b/tests/test_omega_ampere_encoder.c index cf4835a6..75975a5f 100644 --- a/tests/test_omega_ampere_encoder.c +++ b/tests/test_omega_ampere_encoder.c @@ -92,6 +92,19 @@ int main(void) len != nop_len || memcmp(code, legacy, len)) return 1; if (omega_bw_encode_program(&program, legacy, sizeof(legacy), &len)) return 1; } + /* The FSUB source-B negate bit is semantic, not optional scheduling data. */ + { + size_t len = 0; + init(); program.insns[0] = fixture(BW_IR_FSUB, 0); + if (omega_gpu_encode_program_target(&program, 86, code, sizeof(code), &len) || + !(code[7] & 0x80)) return 1; + } + { + size_t len = 0; + init(); program.insns[0] = fixture(BW_IR_BRA, 0); + if (omega_gpu_encode_program_target(&program, 86, code, sizeof(code), &len) || + code[4] != 16 || code[2] != 0) return 1; + } init(); program.insns[0] = fixture(BW_IR_NOP, 0); if (refused(80)) return 1; program.count = 2; program.insns[1] = fixture(60, 0); if (refused(86)) return 1; init(); program.insns[0] = fixture(BW_IR_HMMA_BF16, 0); program.insns[0].imm = OMEGA_QMMA_MARK; if (refused(86)) return 1; diff --git a/tools/ampere_nvdisasm.py b/tools/ampere_nvdisasm.py index c2a31b53..cd1fb377 100755 --- a/tools/ampere_nvdisasm.py +++ b/tools/ampere_nvdisasm.py @@ -62,6 +62,11 @@ def compare(exe, reference, actual, ops=()): for i, op in enumerate(ops): if op == 21: expected[i] = re.sub(r"\bLDG\.E\.EF\b", "LDG.E.MMIO.GPU", expected[i]) + if op in (54, 55): + # SM86 BSSY/BSYNC are reconvergence-barrier operations. SM121's + # explicit RECONVERGENT qualifier is not an SM86 mnemonic; + # retain each barrier register, guard, and exact join address. + expected[i] = re.sub(r"\b(BSSY|BSYNC)\.RECONVERGENT\b", r"\1", expected[i]) observed = [normalize(x, "SM86") for x in decode(exe, "SM86", actual)] if expected != observed: for i, (a, b) in enumerate(zip(expected, observed)): @@ -83,6 +88,10 @@ def main(): mutation = None uniform_dst_mutation = None mmio_mutation = None + subtraction_mutation = None + branch_mutation = None + reconvergence_mutation = None + sync_barrier_mutation = None for actual in pairs: prefix = str(actual)[:-len("sm86.bin")] reference = Path(prefix + "sm121.bin").read_bytes() @@ -119,6 +128,22 @@ def main(): # Historical EF word must not satisfy the Ampere MMIO contract. struct.pack_into(" Date: Wed, 28 Oct 2026 13:09:50 -0500 Subject: [PATCH 05/21] Distinguish implicit discarded carry outputs without accepting predicate drift Signed-off-by: Drake Stapleton --- docs/PORT-AMPERE.md | 3 +++ tools/ampere_nvdisasm.py | 24 +++++++++++++++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index 9258342a..a9601cd6 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -107,6 +107,9 @@ printed `.RECONVERGENT` qualifier, not its reconvergence semantics. Signed-field arithmetic is recorded with its Wolfram query and result in `evidence/CUDAPP-AMPERE/wolfram-branch.txt`. FSUB's source negate bit is also checked independently; FADD cannot satisfy the subtraction contract. +IADD3's discarded `PT` carry outputs are explicit on SM121 and implicit on +SM86. Only those two discarded outputs are omitted from the target-specific +expectation; an unexpected carry predicate must still fail the oracle. ## First real run: operator-provided access diff --git a/tools/ampere_nvdisasm.py b/tools/ampere_nvdisasm.py index cd1fb377..f7c40383 100755 --- a/tools/ampere_nvdisasm.py +++ b/tools/ampere_nvdisasm.py @@ -62,6 +62,10 @@ def compare(exe, reference, actual, ops=()): for i, op in enumerate(ops): if op == 21: expected[i] = re.sub(r"\bLDG\.E\.EF\b", "LDG.E.MMIO.GPU", expected[i]) + if op == 14: + # SM86 omits the two discarded carry outputs; SM121 prints PT. + # Real predicate outputs are not removed and must still match. + expected[i] = expected[i].replace(", PT, PT,", ",", 1) if op in (54, 55): # SM86 BSSY/BSYNC are reconvergence-barrier operations. SM121's # explicit RECONVERGENT qualifier is not an SM86 mnemonic; @@ -92,6 +96,8 @@ def main(): branch_mutation = None reconvergence_mutation = None sync_barrier_mutation = None + carry_mutation = None + mismatches = [] for actual in pairs: prefix = str(actual)[:-len("sm86.bin")] reference = Path(prefix + "sm121.bin").read_bytes() @@ -103,7 +109,8 @@ def main(): try: decoded = compare(args.nvdisasm, reference, code, ops) except RuntimeError as error: - raise RuntimeError(f"{actual.name}: {error}") from error + mismatches.append(f"{actual.name}: {error}") + continue coverage.update(op for op, _ in struct.iter_unpack("=II", metadata)) if mutation is None: for i, text in enumerate(decoded): @@ -144,6 +151,12 @@ def main(): changed = bytearray(code) changed[ops.index(55) * 16 + 2] ^= 1 sync_barrier_mutation = (reference, bytes(changed), ops) + if carry_mutation is None and 14 in ops: + changed = bytearray(code) + changed[ops.index(14) * 16 + 10] ^= 2 + carry_mutation = (reference, bytes(changed), ops) + if mismatches: + raise RuntimeError("\n".join(mismatches)) missing = set(range(60)) - coverage if missing: raise RuntimeError(f"opcode coverage missing: {sorted(missing)}") @@ -203,6 +216,14 @@ def main(): pass else: raise RuntimeError("negative control BROKEN: wrong reconvergence barrier accepted") + if carry_mutation is None: + raise RuntimeError("Ampere discarded-carry regression missing") + try: + compare(args.nvdisasm, *carry_mutation) + except RuntimeError: + pass + else: + raise RuntimeError("negative control BROKEN: unexpected carry output accepted") refused = list(args.corpus.glob("*.refused")) refused_markers = {imm for file in refused for op, imm in struct.iter_unpack("=II", file.read_bytes()) if (op, imm) in {(16, 0x51303832), (37, 0x46453433)}} @@ -211,6 +232,7 @@ def main(): print(f"SM86 offline oracle: {len(pairs)} kernels, every opcode/operand matched; mutated operand refused;") print(f"native FP8 refusals: {len(refused)} kernels. Device qualification: NOT_RUN") print("MMIO policy, subtraction sign, branch target, reconvergence join/barrier controls refused") + print("IADD3's discarded PT outputs retained semantically; unexpected carry output refused") if __name__ == "__main__": From 3e4145d32be3a0bbc0ccce40374f8d7f82834c1c Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:37:08 -0500 Subject: [PATCH 06/21] Reconcile interrupted Ampere encoder identity with generated source --- src/cudapp_om_ampere_enc_sm86.ident | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cudapp_om_ampere_enc_sm86.ident b/src/cudapp_om_ampere_enc_sm86.ident index 5ec192be..5b58aff0 100644 --- a/src/cudapp_om_ampere_enc_sm86.ident +++ b/src/cudapp_om_ampere_enc_sm86.ident @@ -1 +1 @@ -omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=7b3d08840f141c8b16e31603aa1051fcc0517a8f9f67798287ee177222654145 c=1ef525ed7fc17d536afebd7349cd0682750ce77e376de24c24ccb61cace54e5e omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om +omega-ident 2 unit=ampere_enc_sm86 abi=portable-seeded-1 src=51bd3a84f34c4e4d435daa92abad6c4c326b7166d87316ab6f5f980db43b3440 c=48cfcf0e52eed2fe0692ed089a48fac9b84a54b0acbcdb59cda8bec0a4b3cf16 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=e1d1de0a83e27b34792041cd9e30a5c353c57fa1dc1aff05361bc950278d418b frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/ampere_enc_sm86.om From 80c8ed7edfbbc5a86a1b5c866000ba3ee537bacd Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:54:24 -0500 Subject: [PATCH 07/21] Keep encoder mutant checks on portable bridge route --- mk/om-encoder.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mk/om-encoder.mk b/mk/om-encoder.mk index 62b6b19b..ed6e1279 100644 --- a/mk/om-encoder.mk +++ b/mk/om-encoder.mk @@ -73,7 +73,7 @@ OM_ENC_MUTANTS = 's/^ret or base shl rb o 1 16$$/ret or base shl rb o 1 17/' \ 's/^p = 262144$$/p = 0/' \ 's/^const NOPC ulong 1032192$$/const NOPC ulong 1032193/' test-om-encoder-mutants: build/test_codegen_freestanding - @[ -x $(OMEGA_MV)/seed/out/omc ] && [ -f $(OMEGA_BRIDGE_DIR)/src/native.om ] || { echo "NOT_RUN: set OMEGA_MV and OMEGA_BRIDGE_DIR"; exit 3; } + @[ -x "$(OMEGA_OMC)" ] && [ -f "$(OMEGA_BRIDGE)/src/toc.om" ] && [ -f "$(OMEGA_BRIDGE)/src/freest.om" ] || { echo "NOT_RUN: set pinned OMEGA_OMC and OMEGA_BRIDGE"; exit 3; } @mkdir -p $(OM_ENC_DIR) ./build/test_codegen_freestanding --dump > $(OM_ENC_DIR)/c-dump.txt @n=0; for m in $(OM_ENC_MUTANTS); do n=$$((n+1)); d=$(OM_ENC_DIR)/mutant$$n; rm -rf $$d; mkdir -p $$d; \ From fd9f23b83f6949a304097121f90ec2e5ad10dcd4 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:17:06 -0500 Subject: [PATCH 08/21] test(native): cover actual compose capacity refusal in runtime fixture Signed-off-by: Drake Stapleton --- tests/native_runtime_controls.h | 21 +++++++++++++++++++++ tests/test_omega_gpu_session_platform.c | 1 + 2 files changed, 22 insertions(+) diff --git a/tests/native_runtime_controls.h b/tests/native_runtime_controls.h index 4fbf0dca..937e5c30 100644 --- a/tests/native_runtime_controls.h +++ b/tests/native_runtime_controls.h @@ -114,6 +114,27 @@ static void nr_fixture(OmegaGpuNativeArtifact *a, uint8_t weights[65536], uint8_ EXPECT(omega_native_payload(a,got)==0 && memcmp(got,a->realization,32)==0); EXPECT(omega_native_admitted(a,got)==0); } +/* Regression for the real generated production adapter, not a copied composer. + * The legal staged shape exceeds instruction capacity. Refusal must be a + * semantic result with no published actual statistics, never bridge trap 3. */ +static void c_native_compose_capacity(void) { + uint64_t cfg[16]={3,1536,16,8,16}; + uint64_t ins[8192]={0}, metadata[2048]={0}, phys[288]={0}, actual[8]; + uint64_t status=UINT64_MAX; + for(unsigned pass=0;pass<2;++pass) { + memset(actual,0xff,sizeof actual); + EXPECT(omega_native_compose(&status,cfg,16,ins,8192,metadata,2048, + phys,288,actual,8)==OMEGA_OK); + EXPECT(status==2); + for(unsigned i=0;i<8;++i) EXPECT(actual[i]==0); + } + /* The capacity refusal must not poison the next valid native call. */ + memset(cfg,0,sizeof cfg); + cfg[0]=1; cfg[1]=256; cfg[2]=8; cfg[3]=1; cfg[4]=8; + EXPECT(omega_native_compose(&status,cfg,16,ins,8192,metadata,2048, + phys,288,actual,8)==OMEGA_OK && status==0); + EXPECT(actual[0]>0 && actual[0]<=1024); +} static void nr_state(OmegaGpuQ36NativeState *s, const OmegaGpuNativeArtifact *a) { memset(s,0,sizeof *s); s->artifact[0]=*a; memcpy(s->wanted,a->canonical,4096); memcpy(s->records,a->canonical,4096); diff --git a/tests/test_omega_gpu_session_platform.c b/tests/test_omega_gpu_session_platform.c index 16dfd683..9063beb4 100644 --- a/tests/test_omega_gpu_session_platform.c +++ b/tests/test_omega_gpu_session_platform.c @@ -663,6 +663,7 @@ typedef struct { const char *id; void (*fn)(void); } Case; static const Case CASES[] = { #ifdef OMEGA_NATIVE_RUNTIME_TEST {"NATIVE_SYNTHETIC_QUANT_COMPOSE_ENCODE_CACHE_SELECT_RECORD", c_native_chain}, + {"NATIVE_REAL_COMPOSE_CAPACITY_REFUSES_WITHOUT_TRAP", c_native_compose_capacity}, {"NATIVE_TIMEOUT_RETAINS_CODE_UNTIL_CONFIRMED_TEARDOWN", c_native_timeout_refs}, {"NATIVE_NORMAL_CLOSE_INVALIDATES_EXACT_LEASE", c_native_close_epoch}, {"NATIVE_ACTUAL_OWNER_MODEFINAL_OBSERVER_BINDING", c_native_observer_modes}, From ae65cd6feec4723d02b917866d1146d4cac3b42a Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:19:59 -0500 Subject: [PATCH 09/21] fix(components): refuse exhausted branch and tail instruction slots Reproduces merged166/169 legal staged U3 trap before source fix; preserve capacity refusal and immutable historical receipts. Add independent guard-removal mutants, final-slot/HMMA/root controls, and the actual nv_staged recomposition seam. NativeIntegrate actual generated-caller regression precedes this commit. All first-party production fix code remains seeded Omega; full37-root bindings regenerated with existing pinned compiler and bridge. Signed-off-by: Drake Stapleton --- om/components/.crumb | 8 +- om/components/README.md | 9 + om/components/bw_effect.om | 10 + om/components/bw_project.om | 2 +- om/components/rowpipe.om | 2 +- src/cudapp_om_compose.c | 714 ++--- src/cudapp_om_compose.ident | 2 +- src/cudapp_om_units.ident | 4 +- src/cudapp_om_validate.c | 2660 ++++++++++--------- src/cudapp_om_validate.ident | 2 +- tests/components/.crumb | 8 +- tests/components/capacity-host-receipt.json | 29 + tests/components/capacity-runtime-unit.om | 21 + tests/components/capacity-unit.om | 108 + tests/components/run.om | 101 +- 15 files changed, 1989 insertions(+), 1691 deletions(-) create mode 100644 tests/components/capacity-host-receipt.json create mode 100644 tests/components/capacity-runtime-unit.om create mode 100644 tests/components/capacity-unit.om diff --git a/om/components/.crumb b/om/components/.crumb index 3eb24bfb..e7f4f8c0 100644 --- a/om/components/.crumb +++ b/om/components/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T15:50:30Z", + "compiled_at": "2026-10-28T18:19:59Z", "compiler": "crumb-compile/1", - "digest": "sha256:c251e1ed6deb23986ad7654356f17324abb600d043a7e41c1889de1108caa81d", + "digest": "sha256:615823e3c9821360956d7e7e25e3d0f268c5d875594395fb9987aa1c83168bb1", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "files": 13, - "generated_at_commit": "017069c63f80dca6ebb97f4426296bba9e01ad76", - "source_tree": "sha256:eeecf75b26ea2935874b5f21664547263e790a10c4cbb826dfe30e0e038f60ea" + "generated_at_commit": "204e53fcb4c9996ef0dacd5d5f2617eb0ec9edbd", + "source_tree": "sha256:60b29711b8759e5be432ae7e02e9cb112ea0c13be67f625da95abfb6ec2f6bc8" } }, "name": "components", diff --git a/om/components/README.md b/om/components/README.md index 2b179287..8a3943a1 100644 --- a/om/components/README.md +++ b/om/components/README.md @@ -34,6 +34,15 @@ Every native frame also runs through the existing `sim_gemv`/`parity` or `sim_po `tests/components/wolfram.json` preserves Main's mounted Wolfram query/result for exact decode/control constants. In particular, the final byte's modeled scale is exactly1/16, and the migrated existing algorithm explicitly uses its source right-shift operation. The verifier tools were nvdisasm CUDA13.0 V13.0.85 and cc Ubuntu13.3.0-6ubuntu2~24.04.1. They are read-only qualification oracles, not production dependencies. +### Capacity regression after merged #166 and #169 + +On source `c6977b4906229fe83f41103b7eff65b64a0986d6`, legal staged configuration `(family3,K1536,laneBytes16,MT8,warps16,rowmap0)` exhausted the1024-instruction array and escaped with Omega bounds trap103 before returning the documented capacity refusal. Emission itself checked capacity, but later branch patching and direct/rowpipe tail-control writes used the refused instruction index. `bc_patch` and the shared `bc_tail` now check the slot before multiplying or accessing the array. The final emitter error remains authoritative; no truncated program is admitted. + +`capacity-unit.om` exercises the actual composer refusal, zero result counters, a nearby successful U2 configuration, direct/rowpipe controls, final valid and first invalid patch/tail slots, oversized indices, and HMMA's three-slot atomic capacity boundary. Removing either new slot guard must reproduce trap103. `capacity-runtime-unit.om` calls the actual #169 `nv_staged` recomposition seam and requires refusal without touching supplied code. This last check does not claim a fully admitted artifact or device execution. The generated public composer caller is also exercised by the existing session-platform host test. + +The native conductor writes a new `tests/components/capacity-host-receipt.json`; it preserves the historical `host-receipt.json` unchanged. Both source pins and executed control results belong to their respective receipts. Physical qualification remains NOT_RUN, and every production registration, cache gate and device authorization requirement is unchanged. + + ## Not qualified or integrated by this lane Independent numerical execution of every native-produced IR/allocation frame is HOST PASS, including the changed weight-first component and dense/mapped staged configurations. The reused oracle seams are `gpu_fp8_api_test.c` (`sim_gemv`, `parity`) and `gpu_fp8gemm_test.c` (`sim_point2`). This evidence is independent of C-byte parity. Family3 now has strict canonical and launch structural admission derived from the implemented generator, plus `bc_record` binding checks; this does not grant qualification, production registration or physical admission. Shared integration must bind actual retained artifacts and preserve every independent qualification gate. diff --git a/om/components/bw_effect.om b/om/components/bw_effect.om index c30bf583..2a2bb75e 100644 --- a/om/components/bw_effect.om +++ b/om/components/bw_effect.om @@ -158,9 +158,19 @@ bc_emit ins s 8 ret at end fn bc_patch ins edit ulong 8192 at ulong target ulong to void +note A refused emission can leave branchsite=count=1024; never patch an unallocated slot. +if ge at 1024 +ret +end k = add mul at 8 6 put ins k or shl shr get ins k 32 32 and sub target at 4294967295 end +fn bc_tail ins edit ulong 8192 at ulong to void +if ge at 1024 +ret +end +put ins add mul at 8 6 shl ulong 1032192 32 +end note Typed HMMA component: BF16 A quad,B pair,C/D quads; no raw solved bytes. note Component includes existing hmma_wait15+nop14 spacing before any external reader. fn bc_mma ins edit ulong 8192 s edit ulong 64 m view ulong 2048 args view ulong 4 to uint diff --git a/om/components/bw_project.om b/om/components/bw_project.om index c52f58a2..e46a9cc0 100644 --- a/om/components/bw_project.om +++ b/om/components/bw_project.om @@ -270,7 +270,7 @@ bc_node s 45 BCNONE BCNONE BCNONE BCNONE bc_emit ins s 7 at = bc_branch ins s get s 0 false note Historical tail BRA has exact fixed control independent of scheduler pending. -put ins add mul at 8 6 shl ulong 1032192 32 +bc_tail ins at end fn bc_project spec view ulong 8 ins edit ulong 8192 m edit ulong 2048 stats edit ulong 4 to uint if ne bc_prcheck spec 0 diff --git a/om/components/rowpipe.om b/om/components/rowpipe.om index ed2764e6..9f886231 100644 --- a/om/components/rowpipe.om +++ b/om/components/rowpipe.om @@ -419,7 +419,7 @@ bc_patch ins get s 48 get s 0 bc_node s 45 BCNONE BCNONE BCNONE BCNONE bc_emit ins s 7 at = bc_branch ins s get s 0 false -put ins add mul at 8 6 shl ulong 1032192 32 +bc_tail ins at if ne get s 3 0 rp_zero ins m stats ret 2 diff --git a/src/cudapp_om_compose.c b/src/cudapp_om_compose.c index 2842f307..63d9950b 100644 --- a/src/cudapp_om_compose.c +++ b/src/cudapp_om_compose.c @@ -64,76 +64,77 @@ static uint64_t f14(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v static uint64_t f15(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3); static uint64_t f16(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3); static uint64_t f17(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f18(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); -static uint64_t f19(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f20(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f18(void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f19(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); +static uint64_t f20(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); static uint64_t f21(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f22(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f23(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f24(uint64_t v0); -static uint64_t f25(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f22(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f23(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); +static uint64_t f24(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f25(uint64_t v0); static uint64_t f26(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f27(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f28(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f29(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f30(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f29(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f30(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f31(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f32(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f33(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f34(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f35(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f36(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f35(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f36(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); static uint64_t f37(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f38(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f39(const void *v0, uint64_t v0_n); -static uint64_t f40(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f41(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f42(const void *v0, uint64_t v0_n); -static uint64_t f43(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f44(uint64_t v0, uint64_t v1); -static uint64_t f45(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f46(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f47(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f39(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f40(const void *v0, uint64_t v0_n); +static uint64_t f41(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f42(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f43(const void *v0, uint64_t v0_n); +static uint64_t f44(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f45(uint64_t v0, uint64_t v1); +static uint64_t f46(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f47(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f48(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f49(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f50(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f51(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f52(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f53(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f54(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f55(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f54(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f55(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f56(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f57(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f58(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f59(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f60(uint64_t v0); -static uint64_t f61(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f62(const void *v0, uint64_t v0_n); -static uint64_t f63(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f59(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f60(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f61(uint64_t v0); +static uint64_t f62(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f63(const void *v0, uint64_t v0_n); static uint64_t f64(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f65(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f66(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f65(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f66(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f67(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f68(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f69(void *v0, uint64_t v0_n, uint64_t v1); -static uint64_t f70(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f71(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); -static uint64_t f72(void *v0, uint64_t v0_n); -static uint64_t f73(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f74(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f68(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f69(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f70(void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f71(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f72(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); +static uint64_t f73(void *v0, uint64_t v0_n); +static uint64_t f74(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f75(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f76(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); -static uint64_t f77(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f78(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f76(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f77(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); +static uint64_t f78(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f79(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f80(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4); -static uint64_t f81(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f80(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f81(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4); static uint64_t f82(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f83(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f83(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); static uint64_t f84(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f85(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f86(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); +static uint64_t f85(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f86(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); static uint64_t f87(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); +static uint64_t f88(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); static uint64_t f0(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); if(({uint64_t _a=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=288ULL;o_op(1, 5, _a,_b);}), 5);uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);})){ @@ -590,11 +591,22 @@ return o_leave(v4); } static uint64_t f17(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); +if(({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(11, 5, _a,_b);})){ +return o_leave(0); +} uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);}); {uint64_t _i=v3;uint64_t _v=({uint64_t _a=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, v3, 5);uint64_t _b=32ULL;o_op(16, 5, _a,_b);});uint64_t _b=32ULL;o_op(15, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=v1;o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_op(13, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f18(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ +static uint64_t f18(void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +if(({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(11, 5, _a,_b);})){ +return o_leave(0); +} +{uint64_t _i=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} +return o_leave(0); +} +static uint64_t f19(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ o_enter(); { uint64_t v4=0; @@ -639,14 +651,14 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0ULL); } -static uint64_t f19(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +static uint64_t f20(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); if(({uint64_t _a=v1;uint64_t _b=256ULL;o_op(11, 5, _a,_b);})){ return o_leave(0ULL); } return o_leave(({uint64_t _a=o_get(v0, v0_n, v1, 5);uint64_t _b=v2;o_op(6, 5, _a,_b);})); } -static uint64_t f20(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f21(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, v1, 5); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=7ULL;o_op(1, 5, _a,_b);}), 5); @@ -694,7 +706,7 @@ return o_leave(2ULL); } return o_leave(0ULL); } -static uint64_t f21(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f22(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, v1, 5); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5); @@ -706,7 +718,7 @@ uint64_t __attribute__((unused)) v8=2ULL; if(({uint64_t _a=v3;uint64_t _b=57ULL;o_op(6, 5, _a,_b);})){ v8=4ULL; } -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=v8;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=v8;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } if(({uint64_t _a=v4;uint64_t _b=v5;o_op(6, 5, _a,_b);})){ @@ -714,29 +726,29 @@ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=11ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=12ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=4ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=4ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=4ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=4ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } -if(({uint64_t _a=({uint64_t p1=v6;uint64_t p2=2ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p1=v6;uint64_t p2=2ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);})){ return o_leave(3ULL); } -if(({uint64_t _a=({uint64_t _a=v7;uint64_t _b=18446744073709551615ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v7;uint64_t p2=4ULL;f19(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(12, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=v7;uint64_t _b=18446744073709551615ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v7;uint64_t p2=4ULL;f20(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(12, 1, _a,_b);})){ return o_leave(3ULL); } } return o_leave(0ULL); } -static uint64_t f22(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +static uint64_t f23(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, v3, 5); @@ -765,7 +777,7 @@ return o_leave(5ULL); } return o_leave(0ULL); } -static uint64_t f23(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f24(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -776,15 +788,15 @@ uint64_t c1=0; for(;o_op(8,5, v3, v1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); uint64_t __attribute__((unused)) v4=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); -uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;f20(v0, v0_n, p1, v2, v2_n);}); +uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;f21(v0, v0_n, p1, v2, v2_n);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } -v5=({uint64_t p1=v4;f21(v0, v0_n, p1, v2, v2_n);}); +v5=({uint64_t p1=v4;f22(v0, v0_n, p1, v2, v2_n);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } -v5=({uint64_t p1=v3;uint64_t p2=v1;f22(v0, v0_n, p1, p2);}); +v5=({uint64_t p1=v3;uint64_t p2=v1;f23(v0, v0_n, p1, p2);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } @@ -792,7 +804,7 @@ return o_leave(v5); } return o_leave(0ULL); } -static uint64_t f24(uint64_t v0){ +static uint64_t f25(uint64_t v0){ o_enter(); { uint64_t v1=0; @@ -805,21 +817,21 @@ return o_leave(v1); } return o_leave(18446744073709551615ULL); } -static uint64_t f25(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f26(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=v2;uint64_t p4=v3;uint64_t p5=v4;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f26(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f27(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=9ULL;uint64_t p3=v2;uint64_t p4=v3;uint64_t p5=v4;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f27(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f28(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=17ULL;uint64_t p2=v2;uint64_t p3=v3;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} @@ -827,7 +839,7 @@ o_enter(); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f28(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f29(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=18ULL;uint64_t p2=v2;uint64_t p3=v3;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} @@ -835,7 +847,7 @@ o_enter(); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f29(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f30(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -882,7 +894,7 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f30(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f31(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); ({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=856ULL;o_put(v1, v1_n, _i,_v,5);} @@ -920,28 +932,28 @@ if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=2ULL;f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=8ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=3ULL;f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 4ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 5ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f31(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f32(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v1, v1_n, 11ULL, 5); uint64_t __attribute__((unused)) v4=o_get(v1, v1_n, 12ULL, 5); @@ -951,10 +963,10 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 55ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 55ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 56ULL, 5);uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 57ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 56ULL, 5);uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 57ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -963,7 +975,7 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 58ULL, 5);uint64_t p4=o_get(v2, v2_n, 57ULL, 5);uint64_t p5=o_get(v2, v2_n, 56ULL, 5);f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f32(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f33(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -978,13 +990,13 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f33(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f34(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=10ULL;uint64_t _v=2ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ -({f32(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f33(v0, v0_n, v1, v1_n, v2, v2_n);}); } -({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=0ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=0ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -1004,32 +1016,32 @@ uint64_t __attribute__((unused)) v5=o_get(v2, v2_n, ({uint64_t _a=33ULL;uint64_t {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 53ULL, 5);uint64_t p5=3ULL;f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({f32(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f33(v0, v0_n, v1, v1_n, v2, v2_n);}); } return o_leave(0); } -static uint64_t f34(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f35(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; uint64_t k1=4ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ {uint64_t _i=13ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} -({f31(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f32(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=9ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 58ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=48ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v2, v2_n, 54ULL, 5);f14(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f35(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f36(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} uint64_t __attribute__((unused)) v4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5); ({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, 54ULL, 5);uint64_t p4=o_get(v2, v2_n, 52ULL, 5);uint64_t p5=v4;f14(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f36(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f37(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1046,15 +1058,15 @@ uint64_t c2=0; for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=12ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f34(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f35(v0, v0_n, v1, v1_n, v2, v2_n);}); } } -({uint64_t p3=v3;f35(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v3;f36(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } return o_leave(0); } -static uint64_t f37(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f38(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1078,10 +1090,10 @@ for(;o_op(8,5, v5, k2);v5=o_op(1,5, v5,1)){ } return o_leave(0); } -static uint64_t f38(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f39(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f37(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f38(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=13ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -1094,7 +1106,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=5ULL;f10(v0, v0_n, v1, v1_n, p2);}); @@ -1107,7 +1119,7 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=o_get(v1, v1_n, 13ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 15ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f17(v0, v0_n, p1, p2);}); return o_leave(0); } -static uint64_t f39(const void *v0, uint64_t v0_n){ +static uint64_t f40(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=32768ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -1138,18 +1150,18 @@ return o_leave(1ULL); } return o_leave(0ULL); } -static uint64_t f40(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f41(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f30(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f31(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=41ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=42ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 20ULL, 5);uint64_t p5=0ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 20ULL, 5);uint64_t p5=0ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -1161,27 +1173,27 @@ if(c1++>=16777216)o_trap(4); } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 37ULL, 5);f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=43ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({f33(v0, v0_n, v1, v1_n, v2, v2_n);}); -({f36(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f34(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f37(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 43ULL, 5);uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); -({f38(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f39(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); v3=({uint64_t p2=o_get(v1, v1_n, 41ULL, 5);uint64_t p3=0ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); ({uint64_t p1=o_get(v1, v1_n, 42ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f17(v0, v0_n, p1, p2);}); ({uint64_t p1=45ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=7ULL;f10(v0, v0_n, v1, v1_n, p2);}); v3=({uint64_t p2=o_get(v1, v1_n, 0ULL, 5);uint64_t p3=0ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); -{uint64_t _i=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} +({uint64_t p1=v3;f18(v0, v0_n, p1);}); return o_leave(0); } -static uint64_t f41(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f42(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); -if(({uint64_t _a=({f39(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +if(({uint64_t _a=({f40(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(1ULL); } uint64_t v4[64]={0}; @@ -1213,10 +1225,10 @@ for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ } {uint64_t _i=37ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=38ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=4ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f24(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f24(p0);});o_put(v4, v4_n, _i,_v,5);} -({f29(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f40(v1, v1_n, v4, v4_n, v5, v5_n);}); +{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f25(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f25(p0);});o_put(v4, v4_n, _i,_v,5);} +({f30(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f41(v1, v1_n, v4, v4_n, v5, v5_n);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(2ULL); } @@ -1226,7 +1238,7 @@ return o_leave(2ULL); {uint64_t _i=3ULL;uint64_t _v=0ULL;o_put(v3, v3_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f42(const void *v0, uint64_t v0_n){ +static uint64_t f43(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=32768ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -1264,7 +1276,7 @@ return o_leave(1ULL); } return o_leave(0ULL); } -static uint64_t f43(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f44(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1289,11 +1301,11 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f44(uint64_t v0, uint64_t v1){ +static uint64_t f45(uint64_t v0, uint64_t v1){ o_enter(); return o_leave(({uint64_t _a=64ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=16ULL;o_op(3, 5, _a,_b);});uint64_t _b=v1;o_op(1, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);})); } -static uint64_t f45(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f46(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t p2=1ULL;uint64_t p3=0ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); {uint64_t _i=({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t _v=v4;o_put(v2, v2_n, _i,_v,5);} @@ -1305,7 +1317,7 @@ uint64_t k1=o_get(v1, v1_n, 36ULL, 5); uint64_t c1=0; for(;o_op(8,5, v5, k1);v5=o_op(1,5, v5,1)){ if(c1++>=16777216)o_trap(4); -uint64_t __attribute__((unused)) v6=({uint64_t p0=v3;uint64_t p1=v5;f44(p0, p1);}); +uint64_t __attribute__((unused)) v6=({uint64_t p0=v3;uint64_t p1=v5;f45(p0, p1);}); v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); {uint64_t _i=v6;uint64_t _v=v4;o_put(v2, v2_n, _i,_v,5);} v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); @@ -1314,7 +1326,7 @@ v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f7(v1, v1_n, v0, v0_ } return o_leave(0); } -static uint64_t f46(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f47(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -1335,7 +1347,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v4;f45(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v4;f46(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } { @@ -1389,7 +1401,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f47(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f48(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); ({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=856ULL;o_put(v1, v1_n, _i,_v,5);} @@ -1427,57 +1439,57 @@ if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=2ULL;f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=8ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=3ULL;f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 4ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 5ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f48(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f49(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 356ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 356ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=32ULL;o_op(3, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 35ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v2, v2_n, 356ULL, 5);f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 357ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 357ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=0ULL;uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v2, v2_n, 358ULL, 5);f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 357ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 357ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=384ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 355ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=384ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 355ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f49(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f50(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=49ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 35ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 352ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 353ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 352ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 353ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 41ULL, 5); @@ -1490,7 +1502,7 @@ if(c1++>=16777216)o_trap(4); } } if(({uint64_t _a=o_get(v1, v1_n, 49ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f48(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f49(v0, v0_n, v1, v1_n, v2, v2_n);}); } { uint64_t v3=0; @@ -1528,28 +1540,28 @@ if(({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 49ULL, 5);uint64_t _b=0ULL;o_op(7 } ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f50(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f51(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 50ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=o_get(v1, v1_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 12ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f44(p0, p1);});o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f45(p0, p1);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v1, v1_n, 11ULL, 5);uint64_t p3=o_get(v1, v1_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 10ULL, 5);f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=10ULL;uint64_t _v=12ULL;o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f51(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f52(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=10ULL;uint64_t _v=11ULL;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=11ULL;uint64_t _v=56ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ @@ -1569,7 +1581,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f50(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f51(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -1593,12 +1605,12 @@ if(({uint64_t _a=v3;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ {uint64_t _i=10ULL;uint64_t _v=12ULL;o_put(v1, v1_n, _i,_v,5);} } } -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f52(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f53(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -uint64_t __attribute__((unused)) v3=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f44(p0, p1);}); +uint64_t __attribute__((unused)) v3=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f45(p0, p1);}); { uint64_t v4=0; uint64_t k1=o_get(v1, v1_n, 38ULL, 5); @@ -1614,7 +1626,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f53(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f54(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=10ULL;uint64_t _v=13ULL;o_put(v1, v1_n, _i,_v,5);} { @@ -1631,7 +1643,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f52(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f53(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -1644,22 +1656,22 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=10ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=320ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=11ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=321ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v1, v1_n, 10ULL, 5);uint64_t p3=o_get(v1, v1_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 10ULL, 5);uint64_t p3=o_get(v1, v1_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f54(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f55(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=20ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -1668,22 +1680,22 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 50ULL, 5);uint64_t p5=o_get(v2, v2_n, 49ULL, 5);f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f55(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f56(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -{uint64_t _i=53ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f44(p0, p1);}), 5);o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=53ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f45(p0, p1);}), 5);o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=54ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=33ULL;uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} { uint64_t v3=0; uint64_t k1=4ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ -({uint64_t p3=o_get(v1, v1_n, 53ULL, 5);uint64_t p4=o_get(v1, v1_n, 52ULL, 5);uint64_t p5=v3;f54(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); +({uint64_t p3=o_get(v1, v1_n, 53ULL, 5);uint64_t p4=o_get(v1, v1_n, 52ULL, 5);uint64_t p5=v3;f55(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); {uint64_t _i=9ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v1, v1_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=o_get(v1, v1_n, 54ULL, 5);f14(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f56(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f57(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=57ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 50ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=57ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -1715,7 +1727,7 @@ uint64_t c2=0; for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f55(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f56(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -1734,7 +1746,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f57(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f58(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1752,12 +1764,12 @@ uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} -({f56(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f57(v0, v0_n, v1, v1_n, v2, v2_n);}); } } return o_leave(0); } -static uint64_t f58(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f59(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1779,7 +1791,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } } } -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=45ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -1792,7 +1804,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 28ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 28ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=5ULL;f10(v0, v0_n, v1, v1_n, p2);}); @@ -1805,7 +1817,7 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=o_get(v1, v1_n, 45ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 47ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f17(v0, v0_n, p1, p2);}); return o_leave(0); } -static uint64_t f59(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f60(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[64]={0}; uint64_t v4_n=64; @@ -1813,8 +1825,8 @@ o_fill(v4, v4_n, 0ULL, 5); uint64_t v5[512]={0}; uint64_t v5_n=512; o_fill(v5, v5_n, 0ULL, 5); -({f43(v1, v1_n, v2, v2_n, v3, v3_n);}); -if(({uint64_t _a=({f42(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +({f44(v1, v1_n, v2, v2_n, v3, v3_n);}); +if(({uint64_t _a=({f43(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(1ULL); } { @@ -1827,27 +1839,27 @@ for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ {uint64_t _i=36ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=37ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=38ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=4ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f24(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f24(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f25(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f25(p0);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=10ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=o_get(v4, v4_n, 10ULL, 5);o_op(1, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 41ULL, 5);uint64_t _b=o_get(v4, v4_n, 10ULL, 5);o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -({f46(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f47(v1, v1_n, v4, v4_n, v5, v5_n);}); -({f49(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f47(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f48(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f50(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p2=o_get(v5, v5_n, 22ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f15(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=42ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} -({f51(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f52(v1, v1_n, v4, v4_n, v5, v5_n);}); {uint64_t _i=43ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v4, v4_n, _i,_v,5);} -({f53(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f54(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p2=o_get(v5, v5_n, 22ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f15(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=44ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} -({f51(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f52(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p1=o_get(v4, v4_n, 44ULL, 5);uint64_t p2=o_get(v4, v4_n, 0ULL, 5);f17(v1, v1_n, p1, p2);}); -({f57(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f58(v1, v1_n, v4, v4_n, v5, v5_n);}); -({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 6ULL, 5);uint64_t p4=o_get(v5, v5_n, 23ULL, 5);uint64_t p5=1ULL;f25(v1, v1_n, v4, v4_n, p2, p3, p4, p5);}); +({f59(v1, v1_n, v4, v4_n, v5, v5_n);}); +({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 6ULL, 5);uint64_t p4=o_get(v5, v5_n, 23ULL, 5);uint64_t p5=1ULL;f26(v1, v1_n, v4, v4_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f15(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=48ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} uint64_t __attribute__((unused)) v6=({uint64_t p2=o_get(v4, v4_n, 43ULL, 5);uint64_t p3=0ULL;f16(v1, v1_n, v4, v4_n, p2, p3);}); @@ -1856,9 +1868,9 @@ uint64_t __attribute__((unused)) v6=({uint64_t p2=o_get(v4, v4_n, 43ULL, 5);uint ({uint64_t p1=45ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v4, v4_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=7ULL;f10(v1, v1_n, v4, v4_n, p2);}); v6=({uint64_t p2=o_get(v4, v4_n, 0ULL, 5);uint64_t p3=0ULL;f16(v1, v1_n, v4, v4_n, p2, p3);}); -{uint64_t _i=({uint64_t _a=({uint64_t _a=v6;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} +({uint64_t p1=v6;f18(v1, v1_n, p1);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f43(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f44(v1, v1_n, v2, v2_n, v3, v3_n);}); return o_leave(2ULL); } {uint64_t _i=0ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v3, v3_n, _i,_v,5);} @@ -1870,14 +1882,14 @@ if(({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 32ULL, 5);uint64_t _b=({uint64_t } return o_leave(0ULL); } -static uint64_t f60(uint64_t v0){ +static uint64_t f61(uint64_t v0){ o_enter(); if(({uint64_t _a=v0;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ return o_leave(2ULL); } return o_leave(3ULL); } -static uint64_t f61(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f62(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -1902,7 +1914,7 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f62(const void *v0, uint64_t v0_n){ +static uint64_t f63(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=16384ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(0ULL); @@ -1916,7 +1928,7 @@ return o_leave(0ULL); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=32ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(0ULL); } -if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, 3ULL, 5);f24(p0);});uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, 3ULL, 5);f25(p0);});uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);})){ return o_leave(0ULL); } if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(5, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ @@ -1949,7 +1961,7 @@ return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f63(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f64(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f7(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -1969,7 +1981,7 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) } return o_leave(0); } -static uint64_t f64(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f65(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -2049,7 +2061,7 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f65(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f66(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=v2;uint64_t p2=v3;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} @@ -2059,9 +2071,9 @@ if(({uint64_t _a=v2;uint64_t _b=7ULL;o_op(6, 5, _a,_b);})){ ({uint64_t p2=v5;f10(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f66(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f67(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=856ULL;uint64_t p5=4ULL;f65(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=856ULL;uint64_t p5=4ULL;f66(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=5ULL; @@ -2072,12 +2084,12 @@ if(({uint64_t _a=v3;uint64_t _b=3ULL;o_op(11, 5, _a,_b);})){ v4=4ULL; v5=({uint64_t _a=920ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=3ULL;o_op(2, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); } -({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, v3, 5);uint64_t p4=v5;uint64_t p5=2ULL;f65(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, v3, 5);uint64_t p4=v5;uint64_t p5=2ULL;f66(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=928ULL;uint64_t p5=2ULL;f65(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=936ULL;uint64_t p5=2ULL;f65(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=928ULL;uint64_t p5=2ULL;f66(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=936ULL;uint64_t p5=2ULL;f66(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } { uint64_t v3=0; @@ -2090,19 +2102,19 @@ v4=37ULL; if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ v4=38ULL; } -({uint64_t p2=3ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=v4;uint64_t p5=2ULL;f65(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=3ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=v4;uint64_t p5=2ULL;f66(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 8ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 9ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=32ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 8ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 9ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=32ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=3ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=12ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 11ULL, 5);uint64_t p5=({uint64_t p0=v3;f60(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=12ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 11ULL, 5);uint64_t p5=({uint64_t p0=v3;f61(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} @@ -2110,50 +2122,50 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=18446744073709551615ULL;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=9ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=18446744073709551615ULL;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 43ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 43ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=46ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 42ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=16ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 3ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 44ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 42ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=16ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 3ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 44ULL, 5);f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f67(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f68(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=47ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=48ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 27ULL, 5);uint64_t p4=o_get(v2, v2_n, 8ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 33ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 32ULL, 5);uint64_t p3=o_get(v2, v2_n, 33ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 34ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 27ULL, 5);uint64_t p4=o_get(v2, v2_n, 8ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 33ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 32ULL, 5);uint64_t p3=o_get(v2, v2_n, 33ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 34ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 34ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 36ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v1, v1_n, 32ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 19ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=0ULL;uint64_t p5=7ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 13ULL, 5);uint64_t p5=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 40ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 37ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 9ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 18ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 36ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v1, v1_n, 32ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 19ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=0ULL;uint64_t p5=7ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 13ULL, 5);uint64_t p5=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 40ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 37ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 9ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 18ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f68(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f69(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=v2;uint64_t p2=v3;uint64_t p3=v4;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -2175,21 +2187,21 @@ for(;o_op(8,5, v7, k1);v7=o_op(1,5, v7,1)){ {uint64_t _i=0ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f69(void *v0, uint64_t v0_n, uint64_t v1){ +static uint64_t f70(void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); uint64_t __attribute__((unused)) v2=({uint64_t _a=1ULL;uint64_t _b=v1;o_op(15, 5, _a,_b);}); {uint64_t _i=1ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=v2;o_op(12, 5, _a,_b);});o_op(13, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=2ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=({uint64_t _a=v2;uint64_t _b=0;o_op(18, 5, _a,_b);});o_op(12, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f70(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f71(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=49ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 51ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 51ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=0ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=0ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ { uint64_t v3=0; @@ -2198,10 +2210,10 @@ uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 51ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 29ULL, 5);uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 51ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 29ULL, 5);uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f60(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f61(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } { @@ -2211,18 +2223,18 @@ uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=0ULL;f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=0ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=0ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=0ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=0ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -2232,13 +2244,13 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p2=1ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=76ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=0ULL;f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } -({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 96ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=3ULL;f68(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 98ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=3ULL;f68(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 96ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=3ULL;f69(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 98ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=3ULL;f69(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 37ULL, 5);uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(4, 5, _a,_b);});f11(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=50ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f71(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ +static uint64_t f72(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ o_enter(); {uint64_t _i=51ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 37ULL, 5);uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ @@ -2252,11 +2264,11 @@ if(({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) if(({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(7, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ { uint64_t v5=0; @@ -2265,22 +2277,22 @@ for(;o_op(8,5, v5, k3);v5=o_op(1,5, v5,1)){ {uint64_t _i=({uint64_t _a=v5;uint64_t _b=107ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t p2=1ULL;uint64_t p3=0ULL;f7(v1, v1_n, v3, v3_n, p2, p3);});o_put(v2, v2_n, _i,_v,5);} } } -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967294ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967294ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 108ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 108ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 109ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 108ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 109ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 109ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 108ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 109ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f72(void *v0, uint64_t v0_n){ +static uint64_t f73(void *v0, uint64_t v0_n){ o_enter(); {uint64_t _i=53ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 39ULL, 5);uint64_t _b=o_get(v0, v0_n, 52ULL, 5);o_op(2, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} if(({uint64_t _a=o_get(v0, v0_n, 53ULL, 5);uint64_t _b=4ULL;o_op(10, 5, _a,_b);})){ @@ -2288,7 +2300,7 @@ if(({uint64_t _a=o_get(v0, v0_n, 53ULL, 5);uint64_t _b=4ULL;o_op(10, 5, _a,_b);} } return o_leave(0); } -static uint64_t f73(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f74(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -2302,7 +2314,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f74(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f75(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -2316,22 +2328,22 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=56ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=o_get(v2, v2_n, o_get(v1, v1_n, 59ULL, 5), 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=o_get(v1, v1_n, 59ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=o_get(v1, v1_n, 59ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 59ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } } return o_leave(0); } -static uint64_t f75(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f76(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f74(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f75(v0, v0_n, v1, v1_n, v2, v2_n);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 53ULL, 5); @@ -2339,13 +2351,13 @@ uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=({uint64_t p0=v3;f60(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=({uint64_t p0=v3;f61(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } if(({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});o_op(12, 1, _a,_b);})){ {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 58ULL, 5);uint64_t _b=1ULL;o_op(12, 5, _a,_b);});o_op(2, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=96ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 104ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f68(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=98ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 105ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f68(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=96ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 104ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f69(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=98ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 105ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f69(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } { uint64_t v3=0; @@ -2356,14 +2368,14 @@ if(c1++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 106ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 106ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=50ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 106ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=5ULL;f10(v0, v0_n, v1, v1_n, p2);}); } } return o_leave(0); } -static uint64_t f76(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ +static uint64_t f77(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ o_enter(); {uint64_t _i=58ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=52ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -2371,28 +2383,28 @@ o_enter(); uint64_t c1=0; while(({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=o_get(v1, v1_n, 39ULL, 5);o_op(8, 5, _a,_b);})){ if(c1++>=2)o_trap(4); -({f72(v1, v1_n);}); -({f73(v1, v1_n, v2, v2_n, v3, v3_n);}); -({f75(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f73(v1, v1_n);}); +({f74(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f76(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=52ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=4ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} } } ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p1=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f69(v1, v1_n, p1);}); +({uint64_t p1=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f70(v1, v1_n, p1);}); return o_leave(0); } -static uint64_t f77(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f78(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=20ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 70ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 70ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 71ULL, 5);uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 72ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 71ULL, 5);uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 72ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f29(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -2401,7 +2413,7 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v5;uint64_t _b=100ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 72ULL, 5);uint64_t p5=o_get(v2, v2_n, 71ULL, 5);f12(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f78(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f79(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 60ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -2410,10 +2422,10 @@ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 62ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=58ULL;uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=92ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=o_get(v1, v1_n, 8ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=({uint64_t p0=v3;f60(p0);});f10(v0, v0_n, v1, v1_n, p2);}); +({uint64_t p2=({uint64_t p0=v3;f61(p0);});f10(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f79(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f80(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=62ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 60ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=62ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 62ULL, 5);uint64_t _b=84ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -2428,7 +2440,7 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f80(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4){ +static uint64_t f81(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4){ o_enter(); {uint64_t _i=60ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=61ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} @@ -2441,7 +2453,7 @@ uint64_t v6=0; uint64_t c1=0; for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v6;f78(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v6;f79(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } { @@ -2449,12 +2461,12 @@ uint64_t v6=0; uint64_t c1=0; for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v6;f79(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v6;f80(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } return o_leave(0); } -static uint64_t f81(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f82(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 58ULL, 5);uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=96ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=o_get(v2, v2_n, o_get(v1, v1_n, 59ULL, 5), 5);o_put(v1, v1_n, _i,_v,5);} @@ -2462,7 +2474,7 @@ o_enter(); uint64_t v4=0; uint64_t k1=4ULL; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ -({uint64_t p3=o_get(v1, v1_n, 59ULL, 5);uint64_t p4=v3;uint64_t p5=v4;f77(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); +({uint64_t p3=o_get(v1, v1_n, 59ULL, 5);uint64_t p4=v3;uint64_t p5=v4;f78(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); } } { @@ -2471,12 +2483,12 @@ uint64_t k1=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=3U uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=({uint64_t _a=v4;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});uint64_t p4=v3;f80(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4);}); +({uint64_t p3=({uint64_t _a=v4;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});uint64_t p4=v3;f81(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4);}); } } return o_leave(0); } -static uint64_t f82(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f83(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); { uint64_t v4=0; @@ -2493,7 +2505,7 @@ uint64_t k1=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(4, 5, uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v4;f81(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v4;f82(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=98ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -2513,27 +2525,27 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f10(v0, v0_n, v1, v1_n, p2);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=o_get(v2, v2_n, 68ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 68ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 68ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 68ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } return o_leave(0); } -static uint64_t f83(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f84(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 50ULL, 5);uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); -({uint64_t p1=3ULL;f69(v1, v1_n, p1);}); -({uint64_t p1=4ULL;f69(v1, v1_n, p1);}); +({uint64_t p1=3ULL;f70(v1, v1_n, p1);}); +({uint64_t p1=4ULL;f70(v1, v1_n, p1);}); return o_leave(0); } -static uint64_t f84(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f85(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -2557,7 +2569,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ { uint64_t v3=0; @@ -2565,10 +2577,10 @@ uint64_t k2=o_get(v1, v1_n, 34ULL, 5); uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=v3;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=v3;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f60(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f61(p0);});f13(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } } @@ -2578,9 +2590,9 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967295ULL;uint64_t _b=v3;o_op(2, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 53ULL, 5);uint64_t p4=o_get(v2, v2_n, 37ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967295ULL;uint64_t _b=v3;o_op(2, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f28(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 53ULL, 5);uint64_t p4=o_get(v2, v2_n, 37ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=54ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -2590,9 +2602,9 @@ if(c1++>=16777216)o_trap(4); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f10(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 49ULL, 5);uint64_t p5=v3;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 49ULL, 5);uint64_t p5=v3;f27(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 50ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=76ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f6(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -2604,12 +2616,12 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) ({uint64_t p1=o_get(v1, v1_n, 54ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 56ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f17(v0, v0_n, p1, p2);}); } } -({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=o_get(v1, v1_n, 34ULL, 5);f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967296ULL;uint64_t _b=o_get(v1, v1_n, 34ULL, 5);o_op(2, 5, _a,_b);});f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 43ULL, 5);uint64_t p5=4294967295ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=o_get(v1, v1_n, 34ULL, 5);f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967296ULL;uint64_t _b=o_get(v1, v1_n, 34ULL, 5);o_op(2, 5, _a,_b);});f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 43ULL, 5);uint64_t p5=4294967295ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f15(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 49ULL, 5);uint64_t p3=1ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 4ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=1ULL;f25(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 4ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=1ULL;f26(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); v3=({uint64_t p2=o_get(v1, v1_n, 47ULL, 5);uint64_t p3=0ULL;f16(v0, v0_n, v1, v1_n, p2, p3);}); ({uint64_t p1=o_get(v1, v1_n, 48ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f17(v0, v0_n, p1, p2);}); ({uint64_t p1=o_get(v1, v1_n, 46ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f17(v0, v0_n, p1, p2);}); @@ -2631,7 +2643,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f85(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f86(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[64]={0}; uint64_t v4_n=64; @@ -2639,8 +2651,8 @@ o_fill(v4, v4_n, 0ULL, 5); uint64_t v5[128]={0}; uint64_t v5_n=128; o_fill(v5, v5_n, 18446744073709551615ULL, 5); -({f61(v1, v1_n, v2, v2_n, v3, v3_n);}); -if(({uint64_t _a=({f62(v0, v0_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +({f62(v1, v1_n, v2, v2_n, v3, v3_n);}); +if(({uint64_t _a=({f63(v0, v0_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(1ULL); } { @@ -2658,33 +2670,33 @@ if(({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 37ULL, 5);uint64_t _b=2ULL;o_op(5 {uint64_t _i=39ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 34ULL, 5);uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(3, 5, _a,_b);});uint64_t _b=o_get(v4, v4_n, 35ULL, 5);o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=40ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 35ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=42ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(4, 5, _a,_b);});f24(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=43ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 34ULL, 5);f24(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=44ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 40ULL, 5);f24(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=42ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(4, 5, _a,_b);});f25(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=43ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 34ULL, 5);f25(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=44ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 40ULL, 5);f25(p0);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=45ULL;uint64_t _v=56ULL;o_put(v4, v4_n, _i,_v,5);} if(({uint64_t _a=o_get(v4, v4_n, 33ULL, 5);uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ {uint64_t _i=45ULL;uint64_t _v=57ULL;o_put(v4, v4_n, _i,_v,5);} } -({f63(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f66(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f64(v2, v2_n, v4, v4_n, v5, v5_n);}); ({f67(v1, v1_n, v4, v4_n, v5, v5_n);}); -({f70(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f65(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f68(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f71(v1, v1_n, v4, v4_n, v5, v5_n);}); { uint64_t v6=0; uint64_t k1=o_get(v4, v4_n, 38ULL, 5); uint64_t c1=0; for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p4=v6;f71(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); -({uint64_t p4=v6;f76(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); -({uint64_t p3=v6;f82(v1, v1_n, v4, v4_n, v5, v5_n, p3);}); +({uint64_t p4=v6;f72(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); +({uint64_t p4=v6;f77(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); +({uint64_t p3=v6;f83(v1, v1_n, v4, v4_n, v5, v5_n, p3);}); } } -({f83(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f84(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f85(v1, v1_n, v4, v4_n, v5, v5_n);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f61(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f62(v1, v1_n, v2, v2_n, v3, v3_n);}); return o_leave(2ULL); } {uint64_t _i=0ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v3, v3_n, _i,_v,5);} @@ -2693,7 +2705,7 @@ return o_leave(2ULL); {uint64_t _i=3ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 34ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f86(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ +static uint64_t f87(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ o_enter(); uint64_t v5[16]={0}; uint64_t v5_n=16; @@ -2737,21 +2749,21 @@ for(;o_op(8,5, v10, k1);v10=o_op(1,5, v10,1)){ } uint64_t __attribute__((unused)) v10=1ULL; if(({uint64_t _a=v9;uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -v10=({f41(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f42(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v9;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=o_get(v0, v0_n, 5ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(1ULL); } -v10=({f59(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f60(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v9;uint64_t _b=3ULL;o_op(6, 5, _a,_b);})){ -v10=({f85(v5, v5_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f86(v5, v5_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v10;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v10); } -v10=({uint64_t p1=o_get(v7, v7_n, 0ULL, 5);f23(v1, v1_n, p1, v2, v2_n);}); +v10=({uint64_t p1=o_get(v7, v7_n, 0ULL, 5);f24(v1, v1_n, p1, v2, v2_n);}); if(({uint64_t _a=v10;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(({uint64_t _a=v10;uint64_t _b=8ULL;o_op(1, 4, _a,_b);})); } @@ -2767,9 +2779,9 @@ return o_leave(({uint64_t _a=v10;uint64_t _b=16ULL;o_op(1, 4, _a,_b);})); {uint64_t _i=5ULL;uint64_t _v=o_get(v7, v7_n, 2ULL, 5);o_put(v4, v4_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f87(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ +static uint64_t f88(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ o_enter(); -return o_leave(o_cast(5, 4, ({f86(v0, v0_n, v1, v1_n, v2, v2_n, v3, v3_n, v4, v4_n);}))); +return o_leave(o_cast(5, 4, ({f87(v0, v0_n, v1, v1_n, v2, v2_n, v3, v3_n, v4, v4_n);}))); } uint32_t omega_native_compose(uint64_t *result, const void *p0, uint64_t p0_n, void *p1, uint64_t p1_n, void *p2, uint64_t p2_n, void *p3, uint64_t p3_n, void *p4, uint64_t p4_n){ if(!o_buf(result,1,1,5))return 32; @@ -2795,7 +2807,7 @@ if(o_overlap(p4, p4_n*8, p2, p2_n*8))return 32; if(o_overlap(p4, p4_n*8, p3, p3_n*8))return 32; if(o_busy)return 33; o_busy=1;o_depth=0;int code=setjmp(o_jmp); -if(!code)*result=f87(p0, p0_n, p1, p1_n, p2, p2_n, p3, p3_n, p4, p4_n); +if(!code)*result=f88(p0, p0_n, p1, p1_n, p2, p2_n, p3, p3_n, p4, p4_n); o_busy=0;o_depth=0;return (uint32_t)code; } #if defined(__GNUC__) diff --git a/src/cudapp_om_compose.ident b/src/cudapp_om_compose.ident index 48e3ca85..045a1a9a 100644 --- a/src/cudapp_om_compose.ident +++ b/src/cudapp_om_compose.ident @@ -1 +1 @@ -omega-ident 2 unit=compose abi=bridge-seeded src=692e995245ff8c66067693d3bebd4b40fbafd4a44f2c4a140bf7333b40b5f8e1 c=e48b50ab1a3442ef9087f188d0b4fcb1026451a91ca62c3bd2d13145f93b0bd7 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=compose=om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om +omega-ident 2 unit=compose abi=bridge-seeded src=91cfa4c561ee04a8db7cb70e43829eeb19df2e4aa1030573a762242c788195e0 c=ac1f24e68fd3e5cbf41c2f2f9e92ff60c96adeb02f75248d509b3c37af8963c5 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=compose=om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om diff --git a/src/cudapp_om_units.ident b/src/cudapp_om_units.ident index 681a96b2..52a2a307 100644 --- a/src/cudapp_om_units.ident +++ b/src/cudapp_om_units.ident @@ -4,13 +4,13 @@ omega-ident 2 unit=ampere_enc_sm86 abi=bridge-seeded src=fe3b212baa4afe9eb18b2a8 omega-ident 2 unit=amp_runtime abi=bridge-seeded src=841f6da18d2ea43d42f4d7434b4ca84e5168b5d96d3527628f79e2f77cbb265c c=6f3cf40c3f759ac380e6e2e46fbeed75cb2206c26bcf32db33ade6dc0dae7476 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=om/encoder/amp_runtime.om omega-ident 2 unit=repack abi=bridge-seeded src=ab03c810d7517ef3c2db9083f5073851cfda77f0a7f7bd83269dcc43e6be64ae c=cfbc949e04e2819247710d9acc2bd2a8e4a4398d81c67e86c876e44247d62aa0 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=repack=om/quant/quant.om,om/quant/repack.om omega-ident 2 unit=quant_wire abi=bridge-seeded src=657e765de09ad4962165b11a18d7e8fb19b650aa2d7bb321ac11d27b8a63a3c5 c=7755ea382bb4dc8a77f61673033a438823d72d66d6bc44eed771c4a321c1f7a1 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=quant_wire=om/quant/quant.om,om/quant/runtime.om -omega-ident 2 unit=compose abi=bridge-seeded src=692e995245ff8c66067693d3bebd4b40fbafd4a44f2c4a140bf7333b40b5f8e1 c=e48b50ab1a3442ef9087f188d0b4fcb1026451a91ca62c3bd2d13145f93b0bd7 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=compose=om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om +omega-ident 2 unit=compose abi=bridge-seeded src=91cfa4c561ee04a8db7cb70e43829eeb19df2e4aa1030573a762242c788195e0 c=ac1f24e68fd3e5cbf41c2f2f9e92ff60c96adeb02f75248d509b3c37af8963c5 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=compose=om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om omega-ident 2 unit=encode abi=bridge-seeded src=152eab4b4997bc90cf8cceae2ddd4588a26c8b0a7c7ce7ebd0879cb3ab1960ff c=5884820692ee30b102907e57b41440c76269c2ad326e45d7f6b2899d571a077f omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=encode=om/encoder/bw_enc_sm121.om,om/encoder/bw_spec_sm121.om,om/components/encode.om omega-ident 2 unit=cache_runtime abi=bridge-seeded src=925cbb90640ae77b722552c4299ba72bb251a4da978887773fbf7d4c5bd26f51 c=0d9b90f1e1df8c15fe8aaed5e699b7e6aefc74a151db97a4c447527affc057dc omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=cache_runtime=om/cache/residency.om,om/cache/runtime.om omega-ident 2 unit=lease abi=bridge-seeded src=0e5d93d2ed6ecc9994f5049673add476ddcd24f66761a6bd4b655b8f75698cca c=263a547e396b9a6e8094293a08790567c7a3a1d3f9f3e4289050e522932f6393 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=lease=om/cache/residency.om,om/cache/runtime.om,om/cache/lease.om omega-ident 2 unit=slotrev abi=bridge-seeded src=7d36499d626e558e610ccdfd2bfb2992e244e71c5743b5fa964c006f299f3166 c=0dbb11672b0b61625a951ab6f6af84781ab2c8c0df17e10dfbfc09ce6458d77f omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=slotrev=om/cache/residency.om,om/cache/slotrev.om omega-ident 2 unit=command abi=bridge-seeded src=ddf60cd8a1e1054342cce152c937d3d9fc8a863424e191c069f49c4266616a75 c=423cabeb7d8ecdd010e60039e663adafa53d9fc5fdc5f49915ed5744248244a3 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=command=om/cache/residency.om,om/cache/command.om -omega-ident 2 unit=validate abi=bridge-seeded src=fc2c74b27215b4157ce6bd387dab2e914fcada1ec367ec70a836fa529c9a7abb c=3905447de491d20f111f723b2f4e996f4921f79d34f2d2ac6d03b1fb07eddfac omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=validate=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/residency.om,om/cache/artifact.om,om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om,om/encoder/bw_enc_sm121.om,om/encoder/bw_spec_sm121.om,om/components/encode.om,om/components/admit.om,om/cache/validate.om +omega-ident 2 unit=validate abi=bridge-seeded src=6783c94d357411b9adf67601225687af7e0a34753797453c670272cba500c743 c=ebaf85e1f327fc8b607d7e11ef8fc947a9139875bf13aae6b24d30da47dfc0df omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=validate=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/residency.om,om/cache/artifact.om,om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om,om/encoder/bw_enc_sm121.om,om/encoder/bw_spec_sm121.om,om/components/encode.om,om/components/admit.om,om/cache/validate.om omega-ident 2 unit=digest abi=bridge-seeded src=747162bbb027154b67393fd9ef1e8e6ecdfa1549e2cb60c851dfd360ec6ebdcb c=91203c675da34e0357ca5fce1cc6146ab160f186da29f5af44ce4112d3c61d0e omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=digest=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/key.om omega-ident 2 unit=code_digest abi=bridge-seeded src=29ac4f1b089500816b202a26daebaf3eb2f072fc783ae74e83ffbf2f010e72a0 c=3a71dfb729d1015901d1333f64f96a843831194075c9a11f26e83f0a9880cbde omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=code_digest=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/codekey.om omega-ident 2 unit=templates abi=bridge-seeded src=3efa3c721584f3ae62bc91365fed163975fe3de7db6f5221ed0dfa441bd6de95 c=d87f9473a485946e1a1cae3d1b791cc23a3716e53211ce6f2e83c0c22d9ef013 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=templates=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/templates.om diff --git a/src/cudapp_om_validate.c b/src/cudapp_om_validate.c index 8fcfeb39..b2a8fa07 100644 --- a/src/cudapp_om_validate.c +++ b/src/cudapp_om_validate.c @@ -138,105 +138,105 @@ static uint64_t f88(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v static uint64_t f89(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3); static uint64_t f90(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3); static uint64_t f91(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f92(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); -static uint64_t f93(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f94(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f92(void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f93(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); +static uint64_t f94(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); static uint64_t f95(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f96(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f97(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f98(uint64_t v0); -static uint64_t f99(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f96(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f97(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); +static uint64_t f98(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f99(uint64_t v0); static uint64_t f100(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f101(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f102(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f103(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f104(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f103(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f104(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f105(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f106(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f107(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f108(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f109(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f110(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f109(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f110(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); static uint64_t f111(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f112(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f113(const void *v0, uint64_t v0_n); -static uint64_t f114(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f115(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f116(const void *v0, uint64_t v0_n); -static uint64_t f117(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f118(uint64_t v0, uint64_t v1); -static uint64_t f119(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f120(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f121(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f113(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f114(const void *v0, uint64_t v0_n); +static uint64_t f115(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f116(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f117(const void *v0, uint64_t v0_n); +static uint64_t f118(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f119(uint64_t v0, uint64_t v1); +static uint64_t f120(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f121(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f122(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f123(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f124(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f125(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f126(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f127(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f128(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f129(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f128(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f129(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f130(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f131(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); static uint64_t f132(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f133(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f134(uint64_t v0); -static uint64_t f135(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f136(const void *v0, uint64_t v0_n); -static uint64_t f137(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f133(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f134(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f135(uint64_t v0); +static uint64_t f136(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f137(const void *v0, uint64_t v0_n); static uint64_t f138(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f139(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f140(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f139(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f140(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f141(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f142(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f143(void *v0, uint64_t v0_n, uint64_t v1); -static uint64_t f144(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f145(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); -static uint64_t f146(void *v0, uint64_t v0_n); -static uint64_t f147(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f148(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f142(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f143(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f144(void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f145(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f146(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); +static uint64_t f147(void *v0, uint64_t v0_n); +static uint64_t f148(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); static uint64_t f149(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f150(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); -static uint64_t f151(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f152(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f150(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f151(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4); +static uint64_t f152(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f153(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f154(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4); -static uint64_t f155(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f154(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f155(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4); static uint64_t f156(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f157(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f157(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); static uint64_t f158(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); -static uint64_t f159(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f160(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); +static uint64_t f159(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n); +static uint64_t f160(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); static uint64_t f161(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); -static uint64_t f162(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4); -static uint64_t f163(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); -static uint64_t f164(uint64_t v0); +static uint64_t f162(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); +static uint64_t f163(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4); +static uint64_t f164(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); static uint64_t f165(uint64_t v0); -static uint64_t f166(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f167(const void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f166(uint64_t v0); +static uint64_t f167(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); static uint64_t f168(const void *v0, uint64_t v0_n, uint64_t v1); -static uint64_t f169(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); -static uint64_t f170(const void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f169(const void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f170(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2); static uint64_t f171(const void *v0, uint64_t v0_n, uint64_t v1); static uint64_t f172(const void *v0, uint64_t v0_n, uint64_t v1); -static uint64_t f173(const void *v0, uint64_t v0_n); -static uint64_t f174(uint64_t v0); -static uint64_t f175(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); +static uint64_t f173(const void *v0, uint64_t v0_n, uint64_t v1); +static uint64_t f174(const void *v0, uint64_t v0_n); +static uint64_t f175(uint64_t v0); static uint64_t f176(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); static uint64_t f177(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); static uint64_t f178(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); static uint64_t f179(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); static uint64_t f180(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); -static uint64_t f181(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f182(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n); -static uint64_t f183(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f184(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); +static uint64_t f181(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); +static uint64_t f182(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f183(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n); +static uint64_t f184(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); static uint64_t f185(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); static uint64_t f186(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); -static uint64_t f187(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f187(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); static uint64_t f188(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); -static uint64_t f189(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); -static uint64_t f190(void *v0, uint64_t v0_n); +static uint64_t f189(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5); +static uint64_t f190(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3); static uint64_t f191(void *v0, uint64_t v0_n); static uint64_t f192(void *v0, uint64_t v0_n); static uint64_t f193(void *v0, uint64_t v0_n); @@ -244,24 +244,25 @@ static uint64_t f194(void *v0, uint64_t v0_n); static uint64_t f195(void *v0, uint64_t v0_n); static uint64_t f196(void *v0, uint64_t v0_n); static uint64_t f197(void *v0, uint64_t v0_n); -static uint64_t f198(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n); -static uint64_t f199(uint64_t v0, uint64_t v1, const void *v2, uint64_t v2_n); -static uint64_t f200(uint64_t v0); -static uint64_t f201(uint64_t v0, uint64_t v1, uint64_t v2, uint64_t v3); -static uint64_t f202(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, void *v3, uint64_t v3_n); -static uint64_t f203(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f204(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f205(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n); -static uint64_t f206(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); -static uint64_t f207(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, const void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); -static uint64_t f208(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); -static uint64_t f209(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); -static uint64_t f210(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n); -static uint64_t f211(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); +static uint64_t f198(void *v0, uint64_t v0_n); +static uint64_t f199(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n); +static uint64_t f200(uint64_t v0, uint64_t v1, const void *v2, uint64_t v2_n); +static uint64_t f201(uint64_t v0); +static uint64_t f202(uint64_t v0, uint64_t v1, uint64_t v2, uint64_t v3); +static uint64_t f203(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, void *v3, uint64_t v3_n); +static uint64_t f204(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f205(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f206(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n); +static uint64_t f207(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n); +static uint64_t f208(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, const void *v3, uint64_t v3_n, void *v4, uint64_t v4_n); +static uint64_t f209(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n); +static uint64_t f210(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n); +static uint64_t f211(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n); static uint64_t f212(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); -static uint64_t f213(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, const void *v3, uint64_t v3_n, uint64_t v4); -static uint64_t f214(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); -static uint64_t f215(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n, const void *v4, uint64_t v4_n, void *v5, uint64_t v5_n); +static uint64_t f213(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n); +static uint64_t f214(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, const void *v3, uint64_t v3_n, uint64_t v4); +static uint64_t f215(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3); +static uint64_t f216(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n, const void *v4, uint64_t v4_n, void *v5, uint64_t v5_n); static uint64_t f0(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=1ULL;o_op(7, 5, _a,_b);})){ @@ -2585,11 +2586,22 @@ return o_leave(v4); } static uint64_t f91(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); +if(({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(11, 5, _a,_b);})){ +return o_leave(0); +} uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);}); {uint64_t _i=v3;uint64_t _v=({uint64_t _a=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, v3, 5);uint64_t _b=32ULL;o_op(16, 5, _a,_b);});uint64_t _b=32ULL;o_op(15, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=v1;o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_op(13, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f92(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ +static uint64_t f92(void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +if(({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(11, 5, _a,_b);})){ +return o_leave(0); +} +{uint64_t _i=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} +return o_leave(0); +} +static uint64_t f93(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ o_enter(); { uint64_t v4=0; @@ -2634,14 +2646,14 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0ULL); } -static uint64_t f93(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +static uint64_t f94(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); if(({uint64_t _a=v1;uint64_t _b=256ULL;o_op(11, 5, _a,_b);})){ return o_leave(0ULL); } return o_leave(({uint64_t _a=o_get(v0, v0_n, v1, 5);uint64_t _b=v2;o_op(6, 5, _a,_b);})); } -static uint64_t f94(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f95(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, v1, 5); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=7ULL;o_op(1, 5, _a,_b);}), 5); @@ -2689,7 +2701,7 @@ return o_leave(2ULL); } return o_leave(0ULL); } -static uint64_t f95(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f96(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, v1, 5); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5); @@ -2701,7 +2713,7 @@ uint64_t __attribute__((unused)) v8=2ULL; if(({uint64_t _a=v3;uint64_t _b=57ULL;o_op(6, 5, _a,_b);})){ v8=4ULL; } -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=v8;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=v8;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } if(({uint64_t _a=v4;uint64_t _b=v5;o_op(6, 5, _a,_b);})){ @@ -2709,29 +2721,29 @@ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=11ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=12ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=2ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } } if(({uint64_t _a=v3;uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=4ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=4ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=({uint64_t p1=v4;uint64_t p2=4ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v5;uint64_t p2=4ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(3ULL); } -if(({uint64_t _a=({uint64_t p1=v6;uint64_t p2=2ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p1=v6;uint64_t p2=2ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);})){ return o_leave(3ULL); } -if(({uint64_t _a=({uint64_t _a=v7;uint64_t _b=18446744073709551615ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v7;uint64_t p2=4ULL;f93(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(12, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t _a=v7;uint64_t _b=18446744073709551615ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=v7;uint64_t p2=4ULL;f94(v2, v2_n, p1, p2);});uint64_t _b=0ULL;o_op(6, 1, _a,_b);});o_op(12, 1, _a,_b);})){ return o_leave(3ULL); } } return o_leave(0ULL); } -static uint64_t f96(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +static uint64_t f97(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, v3, 5); @@ -2760,7 +2772,7 @@ return o_leave(5ULL); } return o_leave(0ULL); } -static uint64_t f97(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f98(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=v1;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=1024ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -2771,15 +2783,15 @@ uint64_t c1=0; for(;o_op(8,5, v3, v1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); uint64_t __attribute__((unused)) v4=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); -uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;f94(v0, v0_n, p1, v2, v2_n);}); +uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;f95(v0, v0_n, p1, v2, v2_n);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } -v5=({uint64_t p1=v4;f95(v0, v0_n, p1, v2, v2_n);}); +v5=({uint64_t p1=v4;f96(v0, v0_n, p1, v2, v2_n);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } -v5=({uint64_t p1=v3;uint64_t p2=v1;f96(v0, v0_n, p1, p2);}); +v5=({uint64_t p1=v3;uint64_t p2=v1;f97(v0, v0_n, p1, p2);}); if(({uint64_t _a=v5;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v5); } @@ -2787,7 +2799,7 @@ return o_leave(v5); } return o_leave(0ULL); } -static uint64_t f98(uint64_t v0){ +static uint64_t f99(uint64_t v0){ o_enter(); { uint64_t v1=0; @@ -2800,21 +2812,21 @@ return o_leave(v1); } return o_leave(18446744073709551615ULL); } -static uint64_t f99(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f100(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=v2;uint64_t p4=v3;uint64_t p5=v4;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f100(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f101(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=9ULL;uint64_t p3=v2;uint64_t p4=v3;uint64_t p5=v4;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f101(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f102(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=17ULL;uint64_t p2=v2;uint64_t p3=v3;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} @@ -2822,7 +2834,7 @@ o_enter(); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f102(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f103(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=18ULL;uint64_t p2=v2;uint64_t p3=v3;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v5;o_put(v1, v1_n, _i,_v,5);} @@ -2830,7 +2842,7 @@ o_enter(); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f103(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f104(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -2877,7 +2889,7 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f104(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f105(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); ({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=856ULL;o_put(v1, v1_n, _i,_v,5);} @@ -2915,28 +2927,28 @@ if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=2ULL;f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=8ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=3ULL;f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 4ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 5ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f105(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f106(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=o_get(v1, v1_n, 11ULL, 5); uint64_t __attribute__((unused)) v4=o_get(v1, v1_n, 12ULL, 5); @@ -2946,10 +2958,10 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 55ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 55ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 56ULL, 5);uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 57ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 56ULL, 5);uint64_t p3=o_get(v2, v2_n, 55ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 57ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -2958,7 +2970,7 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 58ULL, 5);uint64_t p4=o_get(v2, v2_n, 57ULL, 5);uint64_t p5=o_get(v2, v2_n, 56ULL, 5);f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f106(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f107(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -2973,13 +2985,13 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f107(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f108(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=10ULL;uint64_t _v=2ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ -({f106(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f107(v0, v0_n, v1, v1_n, v2, v2_n);}); } -({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=0ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=0ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -2999,32 +3011,32 @@ uint64_t __attribute__((unused)) v5=o_get(v2, v2_n, ({uint64_t _a=33ULL;uint64_t {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 53ULL, 5);uint64_t p5=3ULL;f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({f106(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f107(v0, v0_n, v1, v1_n, v2, v2_n);}); } return o_leave(0); } -static uint64_t f108(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f109(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; uint64_t k1=4ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ {uint64_t _i=13ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} -({f105(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f106(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=9ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 58ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=48ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v2, v2_n, 54ULL, 5);f88(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f109(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f110(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} uint64_t __attribute__((unused)) v4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5); ({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, 54ULL, 5);uint64_t p4=o_get(v2, v2_n, 52ULL, 5);uint64_t p5=v4;f88(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f110(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f111(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3041,15 +3053,15 @@ uint64_t c2=0; for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=12ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f108(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f109(v0, v0_n, v1, v1_n, v2, v2_n);}); } } -({uint64_t p3=v3;f109(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v3;f110(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } return o_leave(0); } -static uint64_t f111(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f112(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3073,10 +3085,10 @@ for(;o_op(8,5, v5, k2);v5=o_op(1,5, v5,1)){ } return o_leave(0); } -static uint64_t f112(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f113(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f111(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f112(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=13ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -3089,7 +3101,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=5ULL;f84(v0, v0_n, v1, v1_n, p2);}); @@ -3102,7 +3114,7 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=o_get(v1, v1_n, 13ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 15ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f91(v0, v0_n, p1, p2);}); return o_leave(0); } -static uint64_t f113(const void *v0, uint64_t v0_n){ +static uint64_t f114(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=32768ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -3133,18 +3145,18 @@ return o_leave(1ULL); } return o_leave(0ULL); } -static uint64_t f114(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f115(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f104(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f105(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=41ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=42ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 20ULL, 5);uint64_t p5=0ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 20ULL, 5);uint64_t p5=0ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -3156,27 +3168,27 @@ if(c1++>=16777216)o_trap(4); } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 37ULL, 5);f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=43ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({f107(v0, v0_n, v1, v1_n, v2, v2_n);}); -({f110(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f108(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f111(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 43ULL, 5);uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); -({f112(v0, v0_n, v1, v1_n, v2, v2_n);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({f113(v0, v0_n, v1, v1_n, v2, v2_n);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); v3=({uint64_t p2=o_get(v1, v1_n, 41ULL, 5);uint64_t p3=0ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); ({uint64_t p1=o_get(v1, v1_n, 42ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f91(v0, v0_n, p1, p2);}); ({uint64_t p1=45ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=7ULL;f84(v0, v0_n, v1, v1_n, p2);}); v3=({uint64_t p2=o_get(v1, v1_n, 0ULL, 5);uint64_t p3=0ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); -{uint64_t _i=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} +({uint64_t p1=v3;f92(v0, v0_n, p1);}); return o_leave(0); } -static uint64_t f115(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f116(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); -if(({uint64_t _a=({f113(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +if(({uint64_t _a=({f114(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(1ULL); } uint64_t v4[64]={0}; @@ -3208,10 +3220,10 @@ for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ } {uint64_t _i=37ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=38ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=4ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f98(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f98(p0);});o_put(v4, v4_n, _i,_v,5);} -({f103(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f114(v1, v1_n, v4, v4_n, v5, v5_n);}); +{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f99(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f99(p0);});o_put(v4, v4_n, _i,_v,5);} +({f104(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f115(v1, v1_n, v4, v4_n, v5, v5_n);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(2ULL); } @@ -3221,7 +3233,7 @@ return o_leave(2ULL); {uint64_t _i=3ULL;uint64_t _v=0ULL;o_put(v3, v3_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f116(const void *v0, uint64_t v0_n){ +static uint64_t f117(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=32768ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); @@ -3259,7 +3271,7 @@ return o_leave(1ULL); } return o_leave(0ULL); } -static uint64_t f117(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f118(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3284,11 +3296,11 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f118(uint64_t v0, uint64_t v1){ +static uint64_t f119(uint64_t v0, uint64_t v1){ o_enter(); return o_leave(({uint64_t _a=64ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=16ULL;o_op(3, 5, _a,_b);});uint64_t _b=v1;o_op(1, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);})); } -static uint64_t f119(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f120(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t p2=1ULL;uint64_t p3=0ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); {uint64_t _i=({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);});uint64_t _v=v4;o_put(v2, v2_n, _i,_v,5);} @@ -3300,7 +3312,7 @@ uint64_t k1=o_get(v1, v1_n, 36ULL, 5); uint64_t c1=0; for(;o_op(8,5, v5, k1);v5=o_op(1,5, v5,1)){ if(c1++>=16777216)o_trap(4); -uint64_t __attribute__((unused)) v6=({uint64_t p0=v3;uint64_t p1=v5;f118(p0, p1);}); +uint64_t __attribute__((unused)) v6=({uint64_t p0=v3;uint64_t p1=v5;f119(p0, p1);}); v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); {uint64_t _i=v6;uint64_t _v=v4;o_put(v2, v2_n, _i,_v,5);} v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); @@ -3309,7 +3321,7 @@ v4=({uint64_t p2=o_get(v1, v1_n, 38ULL, 5);uint64_t p3=0ULL;f81(v1, v1_n, v0, v0 } return o_leave(0); } -static uint64_t f120(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f121(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -3330,7 +3342,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v4;f119(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v4;f120(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } { @@ -3384,7 +3396,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f121(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f122(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); ({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=856ULL;o_put(v1, v1_n, _i,_v,5);} @@ -3422,57 +3434,57 @@ if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 10ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 13ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 14ULL, 5);uint64_t p3=o_get(v2, v2_n, 13ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=16ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=2ULL;f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=8ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=3ULL;f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 4ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=o_get(v2, v2_n, 5ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 39ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 8ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f122(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f123(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 356ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 356ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=32ULL;o_op(3, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 35ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v2, v2_n, 356ULL, 5);f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 357ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 357ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 358ULL, 5);uint64_t p3=o_get(v2, v2_n, 356ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=0ULL;uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v2, v2_n, 358ULL, 5);f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 357ULL, 5);uint64_t p4=o_get(v2, v2_n, 358ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 359ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 358ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 357ULL, 5);uint64_t p4=o_get(v2, v2_n, 360ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=384ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 355ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 360ULL, 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 356ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=384ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 360ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 355ULL, 5);uint64_t p3=o_get(v2, v2_n, 359ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f123(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f124(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=49ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 35ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 352ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 353ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 352ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 18ULL, 5);uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 353ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 41ULL, 5); @@ -3485,7 +3497,7 @@ if(c1++>=16777216)o_trap(4); } } if(({uint64_t _a=o_get(v1, v1_n, 49ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f122(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f123(v0, v0_n, v1, v1_n, v2, v2_n);}); } { uint64_t v3=0; @@ -3523,28 +3535,28 @@ if(({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 49ULL, 5);uint64_t _b=0ULL;o_op(7 } ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f124(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f125(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 50ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=o_get(v1, v1_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 12ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f118(p0, p1);});o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f119(p0, p1);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=12ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 12ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v1, v1_n, 11ULL, 5);uint64_t p3=o_get(v1, v1_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=o_get(v1, v1_n, 10ULL, 5);f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=10ULL;uint64_t _v=12ULL;o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f125(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f126(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 15ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 25ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 30ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 40ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=32ULL;o_op(4, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=10ULL;uint64_t _v=11ULL;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=11ULL;uint64_t _v=56ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ @@ -3564,7 +3576,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f124(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f125(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -3588,12 +3600,12 @@ if(({uint64_t _a=v3;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ {uint64_t _i=10ULL;uint64_t _v=12ULL;o_put(v1, v1_n, _i,_v,5);} } } -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f126(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f127(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -uint64_t __attribute__((unused)) v3=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f118(p0, p1);}); +uint64_t __attribute__((unused)) v3=({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f119(p0, p1);}); { uint64_t v4=0; uint64_t k1=o_get(v1, v1_n, 38ULL, 5); @@ -3609,7 +3621,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f127(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f128(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=10ULL;uint64_t _v=13ULL;o_put(v1, v1_n, _i,_v,5);} { @@ -3626,7 +3638,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f126(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f127(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -3639,22 +3651,22 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=10ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=320ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=11ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=321ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v1, v1_n, 10ULL, 5);uint64_t p3=o_get(v1, v1_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 10ULL, 5);uint64_t p3=o_get(v1, v1_n, 11ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f128(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f129(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=20ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -3663,22 +3675,22 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 50ULL, 5);uint64_t p5=o_get(v2, v2_n, 49ULL, 5);f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f129(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f130(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -{uint64_t _i=53ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f118(p0, p1);}), 5);o_put(v1, v1_n, _i,_v,5);} +{uint64_t _i=53ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t p0=o_get(v1, v1_n, 51ULL, 5);uint64_t p1=o_get(v1, v1_n, 50ULL, 5);f119(p0, p1);}), 5);o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=54ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=33ULL;uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);o_put(v1, v1_n, _i,_v,5);} { uint64_t v3=0; uint64_t k1=4ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ -({uint64_t p3=o_get(v1, v1_n, 53ULL, 5);uint64_t p4=o_get(v1, v1_n, 52ULL, 5);uint64_t p5=v3;f128(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); +({uint64_t p3=o_get(v1, v1_n, 53ULL, 5);uint64_t p4=o_get(v1, v1_n, 52ULL, 5);uint64_t p5=v3;f129(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); {uint64_t _i=9ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v1, v1_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=o_get(v1, v1_n, 54ULL, 5);f88(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f130(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f131(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=57ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 50ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=57ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -3710,7 +3722,7 @@ uint64_t c2=0; for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=51ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} -({f129(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f130(v0, v0_n, v1, v1_n, v2, v2_n);}); } } } @@ -3729,7 +3741,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f131(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f132(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3747,12 +3759,12 @@ uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=50ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} -({f130(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f131(v0, v0_n, v1, v1_n, v2, v2_n);}); } } return o_leave(0); } -static uint64_t f132(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f133(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3774,7 +3786,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } } } -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 19ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=45ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -3787,7 +3799,7 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 28ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 29ULL, 5);uint64_t p3=o_get(v2, v2_n, 12ULL, 5);uint64_t p4=o_get(v2, v2_n, 28ULL, 5);uint64_t p5=({uint64_t _a=v3;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=32ULL;uint64_t _b=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=5ULL;f84(v0, v0_n, v1, v1_n, p2);}); @@ -3800,7 +3812,7 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=o_get(v1, v1_n, 45ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 47ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f91(v0, v0_n, p1, p2);}); return o_leave(0); } -static uint64_t f133(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f134(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[64]={0}; uint64_t v4_n=64; @@ -3808,8 +3820,8 @@ o_fill(v4, v4_n, 0ULL, 5); uint64_t v5[512]={0}; uint64_t v5_n=512; o_fill(v5, v5_n, 0ULL, 5); -({f117(v1, v1_n, v2, v2_n, v3, v3_n);}); -if(({uint64_t _a=({f116(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +({f118(v1, v1_n, v2, v2_n, v3, v3_n);}); +if(({uint64_t _a=({f117(v0, v0_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(1ULL); } { @@ -3822,27 +3834,27 @@ for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ {uint64_t _i=36ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=37ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=38ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=4ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f98(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f98(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=39ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 1ULL, 5);o_op(4, 5, _a,_b);});f99(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=40ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v0, v0_n, 2ULL, 5);o_op(4, 5, _a,_b);});f99(p0);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=10ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=o_get(v4, v4_n, 10ULL, 5);o_op(1, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 41ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 41ULL, 5);uint64_t _b=o_get(v4, v4_n, 10ULL, 5);o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -({f120(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f121(v1, v1_n, v4, v4_n, v5, v5_n);}); -({f123(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f121(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f122(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f124(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p2=o_get(v5, v5_n, 22ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f89(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=42ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} -({f125(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f126(v1, v1_n, v4, v4_n, v5, v5_n);}); {uint64_t _i=43ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v4, v4_n, _i,_v,5);} -({f127(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f128(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p2=o_get(v5, v5_n, 22ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f89(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=44ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} -({f125(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f126(v1, v1_n, v4, v4_n, v5, v5_n);}); ({uint64_t p1=o_get(v4, v4_n, 44ULL, 5);uint64_t p2=o_get(v4, v4_n, 0ULL, 5);f91(v1, v1_n, p1, p2);}); -({f131(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f132(v1, v1_n, v4, v4_n, v5, v5_n);}); -({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 6ULL, 5);uint64_t p4=o_get(v5, v5_n, 23ULL, 5);uint64_t p5=1ULL;f99(v1, v1_n, v4, v4_n, p2, p3, p4, p5);}); +({f133(v1, v1_n, v4, v4_n, v5, v5_n);}); +({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 6ULL, 5);uint64_t p4=o_get(v5, v5_n, 23ULL, 5);uint64_t p5=1ULL;f100(v1, v1_n, v4, v4_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v5, v5_n, 23ULL, 5);uint64_t p3=o_get(v5, v5_n, 3ULL, 5);f89(v1, v1_n, v4, v4_n, p2, p3);}); {uint64_t _i=48ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v4, v4_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v1, v1_n, v4, v4_n, p2, p3);});o_put(v4, v4_n, _i,_v,5);} uint64_t __attribute__((unused)) v6=({uint64_t p2=o_get(v4, v4_n, 43ULL, 5);uint64_t p3=0ULL;f90(v1, v1_n, v4, v4_n, p2, p3);}); @@ -3851,9 +3863,9 @@ uint64_t __attribute__((unused)) v6=({uint64_t p2=o_get(v4, v4_n, 43ULL, 5);uint ({uint64_t p1=45ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v4, v4_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=7ULL;f84(v1, v1_n, v4, v4_n, p2);}); v6=({uint64_t p2=o_get(v4, v4_n, 0ULL, 5);uint64_t p3=0ULL;f90(v1, v1_n, v4, v4_n, p2, p3);}); -{uint64_t _i=({uint64_t _a=({uint64_t _a=v6;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t _a=1032192ULL;uint64_t _b=32ULL;o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} +({uint64_t p1=v6;f92(v1, v1_n, p1);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f117(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f118(v1, v1_n, v2, v2_n, v3, v3_n);}); return o_leave(2ULL); } {uint64_t _i=0ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v3, v3_n, _i,_v,5);} @@ -3865,14 +3877,14 @@ if(({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 32ULL, 5);uint64_t _b=({uint64_t } return o_leave(0ULL); } -static uint64_t f134(uint64_t v0){ +static uint64_t f135(uint64_t v0){ o_enter(); if(({uint64_t _a=v0;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ return o_leave(2ULL); } return o_leave(3ULL); } -static uint64_t f135(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f136(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -3897,7 +3909,7 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f136(const void *v0, uint64_t v0_n){ +static uint64_t f137(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=16384ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(0ULL); @@ -3911,7 +3923,7 @@ return o_leave(0ULL); if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 3ULL, 5);uint64_t _b=32ULL;o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(0ULL); } -if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, 3ULL, 5);f98(p0);});uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=o_get(v0, v0_n, 3ULL, 5);f99(p0);});uint64_t _b=18446744073709551615ULL;o_op(6, 5, _a,_b);})){ return o_leave(0ULL); } if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_op(5, 5, _a,_b);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ @@ -3944,7 +3956,7 @@ return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f137(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f138(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); uint64_t __attribute__((unused)) v3=({uint64_t p2=2ULL;uint64_t p3=1ULL;f81(v1, v1_n, v0, v0_n, p2, p3);}); { @@ -3964,7 +3976,7 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) } return o_leave(0); } -static uint64_t f138(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f139(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -4044,7 +4056,7 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ } return o_leave(0); } -static uint64_t f139(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f140(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=v2;uint64_t p2=v3;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} @@ -4054,9 +4066,9 @@ if(({uint64_t _a=v2;uint64_t _b=7ULL;o_op(6, 5, _a,_b);})){ ({uint64_t p2=v5;f84(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f140(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f141(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=856ULL;uint64_t p5=4ULL;f139(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=856ULL;uint64_t p5=4ULL;f140(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=5ULL; @@ -4067,12 +4079,12 @@ if(({uint64_t _a=v3;uint64_t _b=3ULL;o_op(11, 5, _a,_b);})){ v4=4ULL; v5=({uint64_t _a=920ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=3ULL;o_op(2, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); } -({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, v3, 5);uint64_t p4=v5;uint64_t p5=2ULL;f139(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=v4;uint64_t p3=o_get(v2, v2_n, v3, 5);uint64_t p4=v5;uint64_t p5=2ULL;f140(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=928ULL;uint64_t p5=2ULL;f139(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=936ULL;uint64_t p5=2ULL;f139(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 29ULL, 5);uint64_t p4=928ULL;uint64_t p5=2ULL;f140(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=5ULL;uint64_t p3=o_get(v2, v2_n, 30ULL, 5);uint64_t p4=936ULL;uint64_t p5=2ULL;f140(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } { uint64_t v3=0; @@ -4085,19 +4097,19 @@ v4=37ULL; if(({uint64_t _a=v3;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ v4=38ULL; } -({uint64_t p2=3ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=v4;uint64_t p5=2ULL;f139(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=3ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=v4;uint64_t p5=2ULL;f140(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 8ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 9ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=32ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 8ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=5ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 9ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 11ULL, 5);uint64_t p3=o_get(v2, v2_n, 7ULL, 5);uint64_t p4=o_get(v2, v2_n, 0ULL, 5);uint64_t p5=32ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=3ULL; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=12ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 11ULL, 5);uint64_t p5=({uint64_t p0=v3;f134(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=56ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=12ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 11ULL, 5);uint64_t p5=({uint64_t p0=v3;f135(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} @@ -4105,50 +4117,50 @@ for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=18446744073709551615ULL;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=9ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=o_get(v2, v2_n, 14ULL, 5);uint64_t p5=18446744073709551615ULL;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 43ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 17ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 18ULL, 5);uint64_t p3=o_get(v2, v2_n, 17ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 43ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 16ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 28ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 28ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=46ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 42ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=16ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 3ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 44ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 19ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 33ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 42ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 20ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 21ULL, 5);uint64_t p3=o_get(v2, v2_n, 9ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=16ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 22ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 3ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 23ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 24ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=o_get(v1, v1_n, 44ULL, 5);f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=1ULL;o_op(2, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 25ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 26ULL, 5);uint64_t p3=o_get(v2, v2_n, 5ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 6ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 35ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f141(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f142(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=47ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 3ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=48ULL;uint64_t _v=({uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 27ULL, 5);uint64_t p4=o_get(v2, v2_n, 8ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 33ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 32ULL, 5);uint64_t p3=o_get(v2, v2_n, 33ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 34ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 31ULL, 5);uint64_t p3=o_get(v2, v2_n, 27ULL, 5);uint64_t p4=o_get(v2, v2_n, 8ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 33ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 22ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 32ULL, 5);uint64_t p3=o_get(v2, v2_n, 33ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 34ULL, 5);uint64_t p3=o_get(v2, v2_n, 22ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 34ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 36ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v1, v1_n, 32ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 19ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=0ULL;uint64_t p5=7ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 13ULL, 5);uint64_t p5=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 40ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 37ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 9ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 18ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 36ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 31ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=o_get(v2, v2_n, 12ULL, 5);uint64_t p5=o_get(v1, v1_n, 32ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 38ULL, 5);uint64_t p3=o_get(v2, v2_n, 19ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 35ULL, 5);uint64_t p3=o_get(v2, v2_n, 36ULL, 5);uint64_t p4=0ULL;uint64_t p5=7ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 35ULL, 5);uint64_t p4=o_get(v2, v2_n, 13ULL, 5);uint64_t p5=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 39ULL, 5);uint64_t p3=o_get(v2, v2_n, 20ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 40ULL, 5);uint64_t p3=o_get(v2, v2_n, 31ULL, 5);uint64_t p4=o_get(v2, v2_n, 2ULL, 5);uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 37ULL, 5);uint64_t p3=o_get(v2, v2_n, 32ULL, 5);uint64_t p4=o_get(v2, v2_n, 9ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 15ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 16ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 18ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f142(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f143(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); ({uint64_t p1=v2;uint64_t p2=v3;uint64_t p3=v4;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -4170,21 +4182,21 @@ for(;o_op(8,5, v7, k1);v7=o_op(1,5, v7,1)){ {uint64_t _i=0ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 0ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f143(void *v0, uint64_t v0_n, uint64_t v1){ +static uint64_t f144(void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); uint64_t __attribute__((unused)) v2=({uint64_t _a=1ULL;uint64_t _b=v1;o_op(15, 5, _a,_b);}); {uint64_t _i=1ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=v2;o_op(12, 5, _a,_b);});o_op(13, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=2ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=({uint64_t _a=v2;uint64_t _b=0;o_op(18, 5, _a,_b);});o_op(12, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f144(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f145(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); {uint64_t _i=49ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 51ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 51ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 24ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=0ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 51ULL, 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 44ULL, 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 44ULL, 5);uint64_t p5=0ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ { uint64_t v3=0; @@ -4193,10 +4205,10 @@ uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 51ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 29ULL, 5);uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 51ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 29ULL, 5);uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f134(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f135(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } { @@ -4206,18 +4218,18 @@ uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 32ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 1ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 25ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=v3;uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=56ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=0ULL;f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=0ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=0ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 38ULL, 5);uint64_t p5=0ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 39ULL, 5);uint64_t p5=0ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 34ULL, 5); @@ -4227,13 +4239,13 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p2=1ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=76ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=0ULL;f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } -({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 96ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=3ULL;f142(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 98ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=3ULL;f142(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 96ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=3ULL;f143(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, 98ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=3ULL;f143(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=2ULL;uint64_t p3=o_get(v2, v2_n, 48ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 37ULL, 5);uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(4, 5, _a,_b);});f85(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=50ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f145(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ +static uint64_t f146(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ o_enter(); {uint64_t _i=51ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 37ULL, 5);uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(10, 5, _a,_b);});o_op(13, 1, _a,_b);})){ @@ -4247,11 +4259,11 @@ if(({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) if(({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 38ULL, 5);o_op(7, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ { uint64_t v5=0; @@ -4260,22 +4272,22 @@ for(;o_op(8,5, v5, k3);v5=o_op(1,5, v5,1)){ {uint64_t _i=({uint64_t _a=v5;uint64_t _b=107ULL;o_op(1, 5, _a,_b);});uint64_t _v=({uint64_t p2=1ULL;uint64_t p3=0ULL;f81(v1, v1_n, v3, v3_n, p2, p3);});o_put(v2, v2_n, _i,_v,5);} } } -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967294ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967294ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 107ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=o_get(v2, v2_n, 10ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 108ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 108ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 109ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 108ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 109ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 109ULL, 5);uint64_t p3=o_get(v2, v2_n, 107ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 104ULL, 5);uint64_t p3=o_get(v2, v2_n, 108ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 105ULL, 5);uint64_t p3=o_get(v2, v2_n, 109ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } return o_leave(0); } -static uint64_t f146(void *v0, uint64_t v0_n){ +static uint64_t f147(void *v0, uint64_t v0_n){ o_enter(); {uint64_t _i=53ULL;uint64_t _v=({uint64_t _a=o_get(v0, v0_n, 39ULL, 5);uint64_t _b=o_get(v0, v0_n, 52ULL, 5);o_op(2, 5, _a,_b);});o_put(v0, v0_n, _i,_v,5);} if(({uint64_t _a=o_get(v0, v0_n, 53ULL, 5);uint64_t _b=4ULL;o_op(10, 5, _a,_b);})){ @@ -4283,7 +4295,7 @@ if(({uint64_t _a=o_get(v0, v0_n, 53ULL, 5);uint64_t _b=4ULL;o_op(10, 5, _a,_b);} } return o_leave(0); } -static uint64_t f147(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f148(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -4297,7 +4309,7 @@ if(c1++>=16777216)o_trap(4); } return o_leave(0); } -static uint64_t f148(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f149(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -4311,22 +4323,22 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=56ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=o_get(v2, v2_n, o_get(v1, v1_n, 59ULL, 5), 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=o_get(v1, v1_n, 59ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 68ULL, 5);uint64_t p4=o_get(v1, v1_n, 59ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 32ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 57ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(5, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 59ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } } return o_leave(0); } -static uint64_t f149(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f150(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({f148(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f149(v0, v0_n, v1, v1_n, v2, v2_n);}); { uint64_t v3=0; uint64_t k1=o_get(v1, v1_n, 53ULL, 5); @@ -4334,13 +4346,13 @@ uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=({uint64_t p0=v3;f134(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=114ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=({uint64_t p0=v3;f135(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } if(({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 51ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);});o_op(12, 1, _a,_b);})){ {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=o_get(v1, v1_n, 58ULL, 5);uint64_t _b=1ULL;o_op(12, 5, _a,_b);});o_op(2, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=96ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 104ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f142(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=98ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 105ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f142(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v1, v1_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=96ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 104ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f143(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=98ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 105ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 59ULL, 5);uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f143(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } { uint64_t v3=0; @@ -4351,14 +4363,14 @@ if(c1++>=16777216)o_trap(4); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 41ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 106ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 106ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 26ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p1=50ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 106ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=110ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=5ULL;f84(v0, v0_n, v1, v1_n, p2);}); } } return o_leave(0); } -static uint64_t f150(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ +static uint64_t f151(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, uint64_t v4){ o_enter(); {uint64_t _i=58ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=52ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -4366,28 +4378,28 @@ o_enter(); uint64_t c1=0; while(({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=o_get(v1, v1_n, 39ULL, 5);o_op(8, 5, _a,_b);})){ if(c1++>=2)o_trap(4); -({f146(v1, v1_n);}); -({f147(v1, v1_n, v2, v2_n, v3, v3_n);}); -({f149(v0, v0_n, v1, v1_n, v2, v2_n);}); +({f147(v1, v1_n);}); +({f148(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f150(v0, v0_n, v1, v1_n, v2, v2_n);}); {uint64_t _i=52ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 52ULL, 5);uint64_t _b=4ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} } } ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p1=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f143(v1, v1_n, p1);}); +({uint64_t p1=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=3ULL;o_op(1, 5, _a,_b);});f144(v1, v1_n, p1);}); return o_leave(0); } -static uint64_t f151(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f152(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=20ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=9ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=v3;uint64_t p5=18446744073709551615ULL;f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 70ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 70ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=4ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } -({uint64_t p2=o_get(v2, v2_n, 71ULL, 5);uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 72ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 71ULL, 5);uint64_t p3=o_get(v2, v2_n, 70ULL, 5);uint64_t p4=0ULL;uint64_t p5=({uint64_t _a=127ULL;uint64_t _b=20ULL;o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 72ULL, 5);uint64_t p3=v3;uint64_t p4=v4;uint64_t p5=({uint64_t _a=128ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(15, 5, _a,_b);});f103(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=1ULL;o_put(v1, v1_n, _i,_v,5);} if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=1ULL;uint64_t _b=({uint64_t _a=24ULL;uint64_t _b=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(3, 5, _a,_b);});o_op(2, 5, _a,_b);});o_op(15, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -4396,7 +4408,7 @@ if(({uint64_t _a=v5;uint64_t _b=3ULL;o_op(8, 5, _a,_b);})){ ({uint64_t p2=8ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v5;uint64_t _b=100ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 72ULL, 5);uint64_t p5=o_get(v2, v2_n, 71ULL, 5);f86(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); return o_leave(0); } -static uint64_t f152(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f153(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 60ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -4405,10 +4417,10 @@ o_enter(); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=o_get(v1, v1_n, 62ULL, 5);o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=58ULL;uint64_t p2=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=92ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p3=o_get(v2, v2_n, 21ULL, 5);uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=22ULL;uint64_t _v=o_get(v1, v1_n, 8ULL, 5);o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=({uint64_t p0=v3;f134(p0);});f84(v0, v0_n, v1, v1_n, p2);}); +({uint64_t p2=({uint64_t p0=v3;f135(p0);});f84(v0, v0_n, v1, v1_n, p2);}); return o_leave(0); } -static uint64_t f153(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f154(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=62ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 60ULL, 5);uint64_t _b=v3;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=62ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 62ULL, 5);uint64_t _b=84ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -4423,7 +4435,7 @@ for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f154(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4){ +static uint64_t f155(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3, uint64_t v4){ o_enter(); {uint64_t _i=60ULL;uint64_t _v=v3;o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=61ULL;uint64_t _v=v4;o_put(v1, v1_n, _i,_v,5);} @@ -4436,7 +4448,7 @@ uint64_t v6=0; uint64_t c1=0; for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v6;f152(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v6;f153(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } { @@ -4444,12 +4456,12 @@ uint64_t v6=0; uint64_t c1=0; for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v6;f153(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v6;f154(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } return o_leave(0); } -static uint64_t f155(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f156(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 58ULL, 5);uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=96ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=59ULL;uint64_t _v=o_get(v2, v2_n, o_get(v1, v1_n, 59ULL, 5), 5);o_put(v1, v1_n, _i,_v,5);} @@ -4457,7 +4469,7 @@ o_enter(); uint64_t v4=0; uint64_t k1=4ULL; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ -({uint64_t p3=o_get(v1, v1_n, 59ULL, 5);uint64_t p4=v3;uint64_t p5=v4;f151(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); +({uint64_t p3=o_get(v1, v1_n, 59ULL, 5);uint64_t p4=v3;uint64_t p5=v4;f152(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4, p5);}); } } { @@ -4466,12 +4478,12 @@ uint64_t k1=({uint64_t _a=({uint64_t _a=o_get(v1, v1_n, 34ULL, 5);uint64_t _b=3U uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=({uint64_t _a=v4;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});uint64_t p4=v3;f154(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4);}); +({uint64_t p3=({uint64_t _a=v4;uint64_t _b=4ULL;o_op(3, 5, _a,_b);});uint64_t p4=v3;f155(v0, v0_n, v1, v1_n, v2, v2_n, p3, p4);}); } } return o_leave(0); } -static uint64_t f156(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f157(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); { uint64_t v4=0; @@ -4488,7 +4500,7 @@ uint64_t k1=({uint64_t _a=o_get(v1, v1_n, 33ULL, 5);uint64_t _b=4ULL;o_op(4, 5, uint64_t c1=0; for(;o_op(8,5, v4, k1);v4=o_op(1,5, v4,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p3=v4;f155(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); +({uint64_t p3=v4;f156(v0, v0_n, v1, v1_n, v2, v2_n, p3);}); } } {uint64_t _i=59ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=1ULL;o_op(12, 5, _a,_b);});uint64_t _b=98ULL;o_op(1, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} @@ -4508,27 +4520,27 @@ if(c1++>=16777216)o_trap(4); ({uint64_t p1=48ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=6ULL;f84(v0, v0_n, v1, v1_n, p2);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p2=o_get(v2, v2_n, 68ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 68ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 68ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 68ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 45ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 45ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } return o_leave(0); } -static uint64_t f157(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f158(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); -({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 46ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 46ULL, 5);uint64_t p5=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 40ULL, 5);o_op(3, 5, _a,_b);});f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 40ULL, 5);uint64_t _b=128ULL;o_op(4, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 38ULL, 5);uint64_t _b=o_get(v1, v1_n, 8ULL, 5);o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} {uint64_t _i=8ULL;uint64_t _v=({uint64_t _a=o_get(v1, v1_n, 8ULL, 5);uint64_t _b=4ULL;o_op(3, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 47ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 47ULL, 5);uint64_t p5=o_get(v1, v1_n, 8ULL, 5);f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 48ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 48ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 50ULL, 5);uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); -({uint64_t p1=3ULL;f143(v1, v1_n, p1);}); -({uint64_t p1=4ULL;f143(v1, v1_n, p1);}); +({uint64_t p1=3ULL;f144(v1, v1_n, p1);}); +({uint64_t p1=4ULL;f144(v1, v1_n, p1);}); return o_leave(0); } -static uint64_t f158(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ +static uint64_t f159(void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -4552,7 +4564,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 41ULL, 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 49ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ { uint64_t v3=0; @@ -4560,10 +4572,10 @@ uint64_t k2=o_get(v1, v1_n, 34ULL, 5); uint64_t c2=0; for(;o_op(8,5, v3, k2);v3=o_op(1,5, v3,1)){ if(c2++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=v3;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=v3;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 69ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 30ULL, 5);uint64_t p5=4ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); {uint64_t _i=8ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} -({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f134(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=11ULL;uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 69ULL, 5);uint64_t p5=({uint64_t p0=v3;f135(p0);});f87(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } } } @@ -4573,9 +4585,9 @@ uint64_t k1=o_get(v1, v1_n, 34ULL, 5); uint64_t c1=0; for(;o_op(8,5, v3, k1);v3=o_op(1,5, v3,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967295ULL;uint64_t _b=v3;o_op(2, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 53ULL, 5);uint64_t p4=o_get(v2, v2_n, 37ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967295ULL;uint64_t _b=v3;o_op(2, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 53ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=0ULL;uint64_t p5=31ULL;f102(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 53ULL, 5);uint64_t p4=o_get(v2, v2_n, 37ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 54ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); {uint64_t _i=54ULL;uint64_t _v=o_get(v1, v1_n, 0ULL, 5);o_put(v1, v1_n, _i,_v,5);} ({uint64_t p1=54ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=18446744073709551615ULL;uint64_t p4=18446744073709551615ULL;uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); @@ -4585,9 +4597,9 @@ if(c1++>=16777216)o_trap(4); if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ ({uint64_t p1=8ULL;uint64_t p2=o_get(v2, v2_n, 52ULL, 5);uint64_t p3=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=64ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p4=o_get(v2, v2_n, 23ULL, 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); ({uint64_t p2=0ULL;f84(v0, v0_n, v1, v1_n, p2);}); -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 52ULL, 5);uint64_t p4=o_get(v2, v2_n, 40ULL, 5);uint64_t p5=1ULL;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); }else{ -({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 49ULL, 5);uint64_t p5=v3;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 50ULL, 5);uint64_t p3=o_get(v2, v2_n, 23ULL, 5);uint64_t p4=o_get(v2, v2_n, 49ULL, 5);uint64_t p5=v3;f101(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); } ({uint64_t p1=12ULL;uint64_t p2=18446744073709551615ULL;uint64_t p3=o_get(v2, v2_n, 50ULL, 5);uint64_t p4=o_get(v2, v2_n, ({uint64_t _a=v3;uint64_t _b=76ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p5=18446744073709551615ULL;f80(v1, v1_n, p1, p2, p3, p4, p5);}); {uint64_t _i=21ULL;uint64_t _v=0ULL;o_put(v1, v1_n, _i,_v,5);} @@ -4599,12 +4611,12 @@ if(({uint64_t _a=o_get(v1, v1_n, 36ULL, 5);uint64_t _b=1ULL;o_op(6, 5, _a,_b);}) ({uint64_t p1=o_get(v1, v1_n, 54ULL, 5);uint64_t p2=({uint64_t _a=o_get(v1, v1_n, 56ULL, 5);uint64_t _b=1ULL;o_op(1, 5, _a,_b);});f91(v0, v0_n, p1, p2);}); } } -({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=o_get(v1, v1_n, 34ULL, 5);f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967296ULL;uint64_t _b=o_get(v1, v1_n, 34ULL, 5);o_op(2, 5, _a,_b);});f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); -({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 43ULL, 5);uint64_t p5=4294967295ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 41ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 41ULL, 5);uint64_t p5=o_get(v1, v1_n, 34ULL, 5);f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 42ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 42ULL, 5);uint64_t p5=({uint64_t _a=4294967296ULL;uint64_t _b=o_get(v1, v1_n, 34ULL, 5);o_op(2, 5, _a,_b);});f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);uint64_t p4=o_get(v2, v2_n, 43ULL, 5);uint64_t p5=4294967295ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); ({uint64_t p2=o_get(v2, v2_n, 43ULL, 5);uint64_t p3=o_get(v2, v2_n, 10ULL, 5);f89(v0, v0_n, v1, v1_n, p2, p3);}); uint64_t __attribute__((unused)) v3=({uint64_t p2=o_get(v1, v1_n, 49ULL, 5);uint64_t p3=1ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); -({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 4ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=1ULL;f99(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); +({uint64_t p2=o_get(v2, v2_n, 27ULL, 5);uint64_t p3=o_get(v2, v2_n, 4ULL, 5);uint64_t p4=o_get(v2, v2_n, 27ULL, 5);uint64_t p5=1ULL;f100(v0, v0_n, v1, v1_n, p2, p3, p4, p5);}); v3=({uint64_t p2=o_get(v1, v1_n, 47ULL, 5);uint64_t p3=0ULL;f90(v0, v0_n, v1, v1_n, p2, p3);}); ({uint64_t p1=o_get(v1, v1_n, 48ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f91(v0, v0_n, p1, p2);}); ({uint64_t p1=o_get(v1, v1_n, 46ULL, 5);uint64_t p2=o_get(v1, v1_n, 0ULL, 5);f91(v0, v0_n, p1, p2);}); @@ -4626,7 +4638,7 @@ for(;o_op(8,5, v4, k2);v4=o_op(1,5, v4,1)){ } return o_leave(0); } -static uint64_t f159(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f160(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[64]={0}; uint64_t v4_n=64; @@ -4634,8 +4646,8 @@ o_fill(v4, v4_n, 0ULL, 5); uint64_t v5[128]={0}; uint64_t v5_n=128; o_fill(v5, v5_n, 18446744073709551615ULL, 5); -({f135(v1, v1_n, v2, v2_n, v3, v3_n);}); -if(({uint64_t _a=({f136(v0, v0_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +({f136(v1, v1_n, v2, v2_n, v3, v3_n);}); +if(({uint64_t _a=({f137(v0, v0_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(1ULL); } { @@ -4653,33 +4665,33 @@ if(({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 37ULL, 5);uint64_t _b=2ULL;o_op(5 {uint64_t _i=39ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 34ULL, 5);uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(3, 5, _a,_b);});uint64_t _b=o_get(v4, v4_n, 35ULL, 5);o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=40ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 33ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=41ULL;uint64_t _v=({uint64_t _a=o_get(v4, v4_n, 35ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=42ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(4, 5, _a,_b);});f98(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=43ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 34ULL, 5);f98(p0);});o_put(v4, v4_n, _i,_v,5);} -{uint64_t _i=44ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 40ULL, 5);f98(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=42ULL;uint64_t _v=({uint64_t p0=({uint64_t _a=128ULL;uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(4, 5, _a,_b);});f99(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=43ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 34ULL, 5);f99(p0);});o_put(v4, v4_n, _i,_v,5);} +{uint64_t _i=44ULL;uint64_t _v=({uint64_t p0=o_get(v4, v4_n, 40ULL, 5);f99(p0);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=45ULL;uint64_t _v=56ULL;o_put(v4, v4_n, _i,_v,5);} if(({uint64_t _a=o_get(v4, v4_n, 33ULL, 5);uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ {uint64_t _i=45ULL;uint64_t _v=57ULL;o_put(v4, v4_n, _i,_v,5);} } -({f137(v2, v2_n, v4, v4_n, v5, v5_n);}); -({f140(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f138(v2, v2_n, v4, v4_n, v5, v5_n);}); ({f141(v1, v1_n, v4, v4_n, v5, v5_n);}); -({f144(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f139(v2, v2_n, v4, v4_n, v5, v5_n);}); +({f142(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f145(v1, v1_n, v4, v4_n, v5, v5_n);}); { uint64_t v6=0; uint64_t k1=o_get(v4, v4_n, 38ULL, 5); uint64_t c1=0; for(;o_op(8,5, v6, k1);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p4=v6;f145(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); -({uint64_t p4=v6;f150(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); -({uint64_t p3=v6;f156(v1, v1_n, v4, v4_n, v5, v5_n, p3);}); +({uint64_t p4=v6;f146(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); +({uint64_t p4=v6;f151(v1, v1_n, v4, v4_n, v5, v5_n, v2, v2_n, p4);}); +({uint64_t p3=v6;f157(v1, v1_n, v4, v4_n, v5, v5_n, p3);}); } } -({f157(v1, v1_n, v4, v4_n, v5, v5_n);}); ({f158(v1, v1_n, v4, v4_n, v5, v5_n);}); +({f159(v1, v1_n, v4, v4_n, v5, v5_n);}); if(({uint64_t _a=o_get(v4, v4_n, 3ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({f135(v1, v1_n, v2, v2_n, v3, v3_n);}); +({f136(v1, v1_n, v2, v2_n, v3, v3_n);}); return o_leave(2ULL); } {uint64_t _i=0ULL;uint64_t _v=o_get(v4, v4_n, 0ULL, 5);o_put(v3, v3_n, _i,_v,5);} @@ -4688,7 +4700,7 @@ return o_leave(2ULL); {uint64_t _i=3ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=o_get(v4, v4_n, 34ULL, 5);uint64_t _b=128ULL;o_op(3, 5, _a,_b);});uint64_t _b=o_get(v4, v4_n, 33ULL, 5);o_op(3, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f160(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ +static uint64_t f161(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ o_enter(); uint64_t v5[16]={0}; uint64_t v5_n=16; @@ -4732,21 +4744,21 @@ for(;o_op(8,5, v10, k1);v10=o_op(1,5, v10,1)){ } uint64_t __attribute__((unused)) v10=1ULL; if(({uint64_t _a=v9;uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -v10=({f115(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f116(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v9;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=o_get(v0, v0_n, 5ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(1ULL); } -v10=({f133(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f134(v6, v6_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v9;uint64_t _b=3ULL;o_op(6, 5, _a,_b);})){ -v10=({f159(v5, v5_n, v1, v1_n, v2, v2_n, v7, v7_n);}); +v10=({f160(v5, v5_n, v1, v1_n, v2, v2_n, v7, v7_n);}); } if(({uint64_t _a=v10;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(v10); } -v10=({uint64_t p1=o_get(v7, v7_n, 0ULL, 5);f97(v1, v1_n, p1, v2, v2_n);}); +v10=({uint64_t p1=o_get(v7, v7_n, 0ULL, 5);f98(v1, v1_n, p1, v2, v2_n);}); if(({uint64_t _a=v10;uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(({uint64_t _a=v10;uint64_t _b=8ULL;o_op(1, 4, _a,_b);})); } @@ -4762,11 +4774,11 @@ return o_leave(({uint64_t _a=v10;uint64_t _b=16ULL;o_op(1, 4, _a,_b);})); {uint64_t _i=5ULL;uint64_t _v=o_get(v7, v7_n, 2ULL, 5);o_put(v4, v4_n, _i,_v,5);} return o_leave(0ULL); } -static uint64_t f161(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ +static uint64_t f162(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n, void *v2, uint64_t v2_n, void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ o_enter(); -return o_leave(o_cast(5, 4, ({f160(v0, v0_n, v1, v1_n, v2, v2_n, v3, v3_n, v4, v4_n);}))); +return o_leave(o_cast(5, 4, ({f161(v0, v0_n, v1, v1_n, v2, v2_n, v3, v3_n, v4, v4_n);}))); } -static uint64_t f162(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4){ +static uint64_t f163(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4){ o_enter(); {uint64_t _i=0ULL;uint64_t _v=v1;o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=1ULL;uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} @@ -4774,39 +4786,39 @@ o_enter(); {uint64_t _i=3ULL;uint64_t _v=v4;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f163(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f164(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); if(({uint64_t _a=v1;uint64_t _b=9223372036854775808ULL;o_op(11, 5, _a,_b);})){ return o_leave(v3); } return o_leave(({uint64_t _a=o_get(v0, v0_n, v1, 5);uint64_t _b=v2;o_op(1, 5, _a,_b);})); } -static uint64_t f164(uint64_t v0){ +static uint64_t f165(uint64_t v0){ o_enter(); if(({uint64_t _a=v0;uint64_t _b=9223372036854775808ULL;o_op(11, 5, _a,_b);})){ return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f165(uint64_t v0){ +static uint64_t f166(uint64_t v0){ o_enter(); return o_leave(({uint64_t _a=({uint64_t _a=v0;uint64_t _b=6ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=7ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})); } -static uint64_t f166(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f167(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t _a=v1;uint64_t _b=8ULL;o_op(3, 5, _a,_b);}); uint64_t __attribute__((unused)) v5=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=7ULL;o_op(1, 5, _a,_b);}), 5); {uint64_t _i=0ULL;uint64_t _v=o_get(v0, v0_n, v4, 5);o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=1ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=16ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f163(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=2ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=24ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f163(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=3ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=3ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=32ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f163(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=4ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=4ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=40ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=255ULL;f163(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=1ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=16ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f164(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=2ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=24ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f164(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=3ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=3ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=32ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=0ULL;f164(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=4ULL;uint64_t _v=({uint64_t p1=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=4ULL;o_op(1, 5, _a,_b);}), 5);uint64_t p2=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=40ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t p3=255ULL;f164(v2, v2_n, p1, p2, p3);});o_put(v3, v3_n, _i,_v,5);} uint64_t __attribute__((unused)) v6=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5); {uint64_t _i=5ULL;uint64_t _v=0ULL;o_put(v3, v3_n, _i,_v,5);} if(({uint64_t _a=v6;uint64_t _b=9223372036854775808ULL;o_op(8, 5, _a,_b);})){ {uint64_t _i=5ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=v6;uint64_t _b=256ULL;o_op(1, 5, _a,_b);}), 5);o_put(v3, v3_n, _i,_v,5);} } -{uint64_t _i=14ULL;uint64_t _v=({uint64_t p0=v6;f164(p0);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=14ULL;uint64_t _v=({uint64_t p0=v6;f165(p0);});o_put(v3, v3_n, _i,_v,5);} uint64_t __attribute__((unused)) v7=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=6ULL;o_op(1, 5, _a,_b);}), 5); {uint64_t _i=6ULL;uint64_t _v=({uint64_t _a=v7;uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} {uint64_t _i=7ULL;uint64_t _v=({uint64_t _a=v7;uint64_t _b=32ULL;o_op(16, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} @@ -4814,15 +4826,15 @@ uint64_t __attribute__((unused)) v7=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b {uint64_t _i=9ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=1ULL;o_op(16, 5, _a,_b);});uint64_t _b=1ULL;o_op(12, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} {uint64_t _i=10ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=2ULL;o_op(16, 5, _a,_b);});uint64_t _b=1ULL;o_op(12, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} {uint64_t _i=11ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v5;uint64_t _b=8ULL;o_op(16, 5, _a,_b);});uint64_t _b=255ULL;o_op(12, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);f164(p0);});o_put(v3, v3_n, _i,_v,5);} -{uint64_t _i=13ULL;uint64_t _v=({uint64_t p0=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=3ULL;o_op(1, 5, _a,_b);}), 5);f164(p0);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=12ULL;uint64_t _v=({uint64_t p0=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=2ULL;o_op(1, 5, _a,_b);}), 5);f165(p0);});o_put(v3, v3_n, _i,_v,5);} +{uint64_t _i=13ULL;uint64_t _v=({uint64_t p0=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=3ULL;o_op(1, 5, _a,_b);}), 5);f165(p0);});o_put(v3, v3_n, _i,_v,5);} uint64_t __attribute__((unused)) v8=o_get(v0, v0_n, ({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5); -if(({uint64_t _a=({uint64_t p0=o_get(v3, v3_n, 0ULL, 5);f165(p0);});uint64_t _b=({uint64_t _a=v8;uint64_t _b=9223372036854775808ULL;o_op(8, 5, _a,_b);});o_op(12, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=o_get(v3, v3_n, 0ULL, 5);f166(p0);});uint64_t _b=({uint64_t _a=v8;uint64_t _b=9223372036854775808ULL;o_op(8, 5, _a,_b);});o_op(12, 1, _a,_b);})){ {uint64_t _i=1ULL;uint64_t _v=o_get(v2, v2_n, ({uint64_t _a=v8;uint64_t _b=256ULL;o_op(1, 5, _a,_b);}), 5);o_put(v3, v3_n, _i,_v,5);} } return o_leave(0); } -static uint64_t f167(const void *v0, uint64_t v0_n, uint64_t v1){ +static uint64_t f168(const void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 7ULL, 5); if(({uint64_t _a=v2;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ @@ -4830,30 +4842,30 @@ return o_leave(v2); } return o_leave(v1); } -static uint64_t f168(const void *v0, uint64_t v0_n, uint64_t v1){ +static uint64_t f169(const void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); return o_leave(({uint64_t _a=o_get(v0, v0_n, v1, 5);uint64_t _b=255ULL;o_op(12, 5, _a,_b);})); } -static uint64_t f169(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ +static uint64_t f170(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2){ o_enter(); if(({uint64_t _a=o_get(v0, v0_n, v2, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -return o_leave(({uint64_t p1=v1;f168(v0, v0_n, p1);})); +return o_leave(({uint64_t p1=v1;f169(v0, v0_n, p1);})); } return o_leave(255ULL); } -static uint64_t f170(const void *v0, uint64_t v0_n, uint64_t v1){ -o_enter(); -return o_leave(({uint64_t _a=v1;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f168(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); -} static uint64_t f171(const void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); -return o_leave(({uint64_t _a=v1;uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); +return o_leave(({uint64_t _a=v1;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f169(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); } static uint64_t f172(const void *v0, uint64_t v0_n, uint64_t v1){ o_enter(); -return o_leave(({uint64_t _a=({uint64_t p1=v1;f170(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); +return o_leave(({uint64_t _a=v1;uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); +} +static uint64_t f173(const void *v0, uint64_t v0_n, uint64_t v1){ +o_enter(); +return o_leave(({uint64_t _a=({uint64_t p1=v1;f171(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);})); } -static uint64_t f173(const void *v0, uint64_t v0_n){ +static uint64_t f174(const void *v0, uint64_t v0_n){ o_enter(); if(({uint64_t _a=o_get(v0, v0_n, 9ULL, 5);uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ return o_leave(7ULL); @@ -4863,92 +4875,92 @@ return o_leave(0ULL); } return o_leave(8ULL); } -static uint64_t f174(uint64_t v0){ +static uint64_t f175(uint64_t v0){ o_enter(); return o_leave(({uint64_t _a=({uint64_t _a=v0;uint64_t _b=8388608ULL;o_op(8, 5, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=4286578688ULL;o_op(11, 5, _a,_b);});o_op(13, 1, _a,_b);})); } -static uint64_t f175(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f176(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 6ULL, 5); if(({uint64_t _a=v2;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=1032192ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=1032192ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=1ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29186ULL;f170(v0, v0_n, p1);});uint64_t p2=255ULL;uint64_t p3=3840ULL;uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29186ULL;f171(v0, v0_n, p1);});uint64_t p2=255ULL;uint64_t p3=3840ULL;uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=2ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=30722ULL;f170(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=3840ULL;uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=30722ULL;f171(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=3840ULL;uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=3ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31001ULL;f170(v0, v0_n, p1);});uint64_t p2=0ULL;uint64_t p3=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});uint64_t p4=({uint64_t p1=926208ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31001ULL;f171(v0, v0_n, p1);});uint64_t p2=0ULL;uint64_t p3=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});uint64_t p4=({uint64_t p1=926208ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=4ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=4278221698ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=6ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=2048ULL;uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=4278221698ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=6ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=2048ULL;uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=5ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=4278221698ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=6ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=2560ULL;uint64_t p4=({uint64_t p1=926208ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=4278221698ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=6ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=2560ULL;uint64_t p4=({uint64_t p1=926208ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=6ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=4278220716ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=5ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=134219776ULL;uint64_t p4=({uint64_t p1=926208ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=4278220716ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=5ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=134219776ULL;uint64_t p4=({uint64_t p1=926208ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=7ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=4278220716ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=5ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=134220288ULL;uint64_t p4=({uint64_t p1=945664ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=4278220716ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=5ULL;o_op(15, 5, _a,_b);});uint64_t _b=16776960ULL;o_op(12, 5, _a,_b);});uint64_t p3=134220288ULL;uint64_t p4=({uint64_t p1=945664ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=8ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=o_get(v0, v0_n, 13ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29220ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=126747136ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29220ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=126747136ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 8ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 14ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31780ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=260964864ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31780ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=260964864ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } -({uint64_t p1=({uint64_t p1=30756ULL;f172(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=126747136ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=30756ULL;f173(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=126747136ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=9ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=30757ULL;f172(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083840ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=30757ULL;f173(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083840ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=10ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 8ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=o_get(v0, v0_n, 14ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);});o_op(12, 1, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31756ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=200302704ULL;uint64_t p4=({uint64_t p1=3136000ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31756ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=200302704ULL;uint64_t p4=({uint64_t p1=3136000ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } -({uint64_t p1=({uint64_t p1=30732ULL;f172(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=66085488ULL;uint64_t p4=({uint64_t p1=2087424ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=30732ULL;f173(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=66085488ULL;uint64_t p4=({uint64_t p1=2087424ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=11ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=203299072ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=203299072ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=12ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t p0=v3;f174(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=v3;f175(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(1ULL); } -({uint64_t p1=({uint64_t p1=31110ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=202381568ULL;uint64_t _b=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31110ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=202381568ULL;uint64_t _b=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=13ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31110ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=202447104ULL;uint64_t _b=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31110ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=202447104ULL;uint64_t _b=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=14ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29200ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=134209791ULL;uint64_t p4=({uint64_t p1=17811968ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29200ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=134209791ULL;uint64_t p4=({uint64_t p1=17811968ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f176(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f177(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 6ULL, 5); @@ -4957,85 +4969,85 @@ uint64_t __attribute__((unused)) v4=0ULL; if(({uint64_t _a=v2;uint64_t _b=16ULL;o_op(6, 5, _a,_b);})){ v4=262144ULL; } -({uint64_t p1=({uint64_t p1=29244ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=({uint64_t _a=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});uint64_t _b=6144ULL;o_op(13, 5, _a,_b);});uint64_t _b=v4;o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29244ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=({uint64_t _a=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});uint64_t _b=6144ULL;o_op(13, 5, _a,_b);});uint64_t _b=v4;o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=17ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t _a=({uint64_t p1=30745ULL;f170(v0, v0_n, p1);});uint64_t _b=4278190080ULL;o_op(13, 5, _a,_b);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=71168ULL;uint64_t _b=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t _a=({uint64_t p1=30745ULL;f171(v0, v0_n, p1);});uint64_t _b=4278190080ULL;o_op(13, 5, _a,_b);});uint64_t p2=v3;uint64_t p3=({uint64_t _a=71168ULL;uint64_t _b=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=18ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=30738ULL;f172(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=126796031ULL;uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=30738ULL;f173(v0, v0_n, p1);});uint64_t p2=v3;uint64_t p3=126796031ULL;uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=19ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=203298048ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=203298048ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=20ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=203380992ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=203380992ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=21ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t p3=202250496ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t p3=202250496ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=22ULL;o_op(6, 5, _a,_b);})){ -uint64_t __attribute__((unused)) v4=({uint64_t p1=31110ULL;f171(v0, v0_n, p1);}); +uint64_t __attribute__((unused)) v4=({uint64_t p1=31110ULL;f172(v0, v0_n, p1);}); if(({uint64_t _a=o_get(v0, v0_n, 9ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ -v4=({uint64_t _a=({uint64_t p1=2438ULL;f171(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({f173(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +v4=({uint64_t _a=({uint64_t p1=2438ULL;f172(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({f174(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); } -({uint64_t p1=v4;uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=202463488ULL;uint64_t _b=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=202463488ULL;uint64_t _b=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=23ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=31122ULL;uint64_t p2=0ULL;uint64_t p3=45056ULL;uint64_t p4=({uint64_t p1=1043456ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=31122ULL;uint64_t p2=0ULL;uint64_t p3=45056ULL;uint64_t p4=({uint64_t p1=1043456ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=24ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=31122ULL;uint64_t p2=0ULL;uint64_t p3=12288ULL;uint64_t p4=({uint64_t p1=1043456ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=31122ULL;uint64_t p2=0ULL;uint64_t p3=12288ULL;uint64_t p4=({uint64_t p1=1043456ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=25ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=4278221199ULL;uint64_t p2=0ULL;uint64_t p3=33554432ULL;uint64_t p4=({uint64_t p1=1042432ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=4278221199ULL;uint64_t p2=0ULL;uint64_t p3=33554432ULL;uint64_t p4=({uint64_t p1=1042432ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=26ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31144ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=136270080ULL;uint64_t _b=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=3284480ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31144ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=136270080ULL;uint64_t _b=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=3284480ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=27ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31144ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=203378944ULL;uint64_t _b=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=3284480ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31144ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=({uint64_t _a=203378944ULL;uint64_t _b=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=3284480ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=28ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29196ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=66084976ULL;uint64_t p4=({uint64_t p1=2087424ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29196ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=66084976ULL;uint64_t p4=({uint64_t p1=2087424ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=29ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29202ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=126762239ULL;uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29202ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=126762239ULL;uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f177(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f178(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 6ULL, 5); if(({uint64_t _a=v2;uint64_t _b=30ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29217ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29217ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=31ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29217ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29217ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t _b=2147483648ULL;o_op(13, 5, _a,_b);});uint64_t p3=0ULL;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=32ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29216ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=4194304ULL;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29216ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=4194304ULL;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=33ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29219ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29219ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=34ULL;o_op(6, 5, _a,_b);})){ @@ -5043,48 +5055,48 @@ uint64_t __attribute__((unused)) v4=66084864ULL; if(({uint64_t _a=v3;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ v4=v3; } -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29195ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=7ULL;o_op(12, 5, _a,_b);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=v4;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29195ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=7ULL;o_op(12, 5, _a,_b);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=v4;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=35ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29192ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=o_get(v0, v0_n, 4ULL, 5);uint64_t _b=7ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1034752ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29192ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=o_get(v0, v0_n, 4ULL, 5);uint64_t _b=7ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1034752ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=36ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29193ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=58720256ULL;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29193ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=58720256ULL;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=37ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29193ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=125829120ULL;uint64_t p4=({uint64_t p1=5227520ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29193ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=125829120ULL;uint64_t p4=({uint64_t p1=5227520ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=38ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29253ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=2102272ULL;uint64_t p4=({uint64_t p1=5235200ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29253ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=2102272ULL;uint64_t p4=({uint64_t p1=5235200ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=39ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29445ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=2158848ULL;uint64_t p4=({uint64_t p1=5120512ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29445ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=2158848ULL;uint64_t p4=({uint64_t p1=5120512ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=40ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29448ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=4096ULL;uint64_t p4=({uint64_t p1=926720ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29448ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=4096ULL;uint64_t p4=({uint64_t p1=926720ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=41ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29448ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=5120ULL;uint64_t p4=({uint64_t p1=926720ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29448ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=5120ULL;uint64_t p4=({uint64_t p1=926720ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=42ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=32649ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=134225664ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=31ULL;o_op(12, 5, _a,_b);});uint64_t _b=21ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=917504ULL;uint64_t p4=({uint64_t p1=926720ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=32649ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=134225664ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=31ULL;o_op(12, 5, _a,_b);});uint64_t _b=21ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=917504ULL;uint64_t p4=({uint64_t p1=926720ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=43ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31108ULL;f172(v0, v0_n, p1);});uint64_t p2=0ULL;uint64_t p3=({uint64_t _a=v3;uint64_t _b=65535ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31108ULL;f173(v0, v0_n, p1);});uint64_t p2=0ULL;uint64_t p3=({uint64_t _a=v3;uint64_t _b=65535ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=44ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29576ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=v3;uint64_t _b=65535ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29576ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=({uint64_t _a=v3;uint64_t _b=65535ULL;o_op(12, 5, _a,_b);});uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=45ULL;o_op(6, 5, _a,_b);})){ @@ -5092,12 +5104,12 @@ uint64_t __attribute__((unused)) v4=31053ULL; if(({uint64_t _a=o_get(v0, v0_n, 9ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ v4=2381ULL; } -({uint64_t p1=v4;uint64_t p2=0ULL;uint64_t p3=58720256ULL;uint64_t p4=({uint64_t p1=1042944ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=v4;uint64_t p2=0ULL;uint64_t p3=58720256ULL;uint64_t p4=({uint64_t p1=1042944ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f178(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f179(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 6ULL, 5); uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=v2;uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);}); @@ -5114,107 +5126,107 @@ if(({uint64_t _a=({uint64_t _a=v2;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t v6=1032192ULL; } } -uint64_t __attribute__((unused)) v7=({uint64_t _a=({uint64_t _a=2375ULL;uint64_t _b=({uint64_t _a=({f173(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=63ULL;o_op(12, 5, _a,_b);});uint64_t _b=18ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v7;uint64_t p2=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=2ULL;o_op(15, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});uint64_t p3=v5;uint64_t p4=v6;f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v7=({uint64_t _a=({uint64_t _a=2375ULL;uint64_t _b=({uint64_t _a=({f174(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=63ULL;o_op(12, 5, _a,_b);});uint64_t _b=18ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v7;uint64_t p2=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=2ULL;o_op(15, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});uint64_t p3=v5;uint64_t p4=v6;f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } -static uint64_t f179(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f180(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); uint64_t __attribute__((unused)) v3=o_get(v0, v0_n, 6ULL, 5); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, 11ULL, 5); if(({uint64_t _a=v2;uint64_t _b=46ULL;o_op(6, 5, _a,_b);})){ -return o_leave(({f178(v0, v0_n, v1, v1_n);})); +return o_leave(({f179(v0, v0_n, v1, v1_n);})); } if(({uint64_t _a=v2;uint64_t _b=47ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29448ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=2048ULL;uint64_t p4=({uint64_t p1=926720ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29448ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=2048ULL;uint64_t p4=({uint64_t p1=926720ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=48ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=31517ULL;uint64_t p2=0ULL;uint64_t p3=65536ULL;uint64_t p4=({uint64_t p1=1043456ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=31517ULL;uint64_t p2=0ULL;uint64_t p3=65536ULL;uint64_t p4=({uint64_t p1=1043456ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=49ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31108ULL;f172(v0, v0_n, p1);});uint64_t p2=255ULL;uint64_t p3=134219776ULL;uint64_t p4=({uint64_t p1=927744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31108ULL;f173(v0, v0_n, p1);});uint64_t p2=255ULL;uint64_t p3=134219776ULL;uint64_t p4=({uint64_t p1=927744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=50ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=31112ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f168(v0, v0_n, p1);});uint64_t p3=134220031ULL;uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31112ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=3ULL;f169(v0, v0_n, p1);});uint64_t p3=134220031ULL;uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=51ULL;o_op(6, 5, _a,_b);})){ -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29202ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f168(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f169(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f169(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29202ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f169(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f170(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f170(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=255ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=52ULL;o_op(6, 5, _a,_b);})){ -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29209ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f168(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f169(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f169(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=1536ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29209ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f169(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f170(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f170(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=1536ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=53ULL;o_op(6, 5, _a,_b);})){ -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29223ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f168(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f169(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f169(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t p1=4ULL;f168(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=29223ULL;uint64_t _b=({uint64_t _a=({uint64_t p1=1ULL;f169(v0, v0_n, p1);});uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t p1=2ULL;uint64_t p2=12ULL;f170(v0, v0_n, p1, p2);});uint64_t _b=24ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=({uint64_t p1=3ULL;uint64_t p2=13ULL;f170(v0, v0_n, p1, p2);});uint64_t p3=({uint64_t _a=126746624ULL;uint64_t _b=({uint64_t p1=4ULL;f169(v0, v0_n, p1);});o_op(13, 5, _a,_b);});uint64_t p4=({uint64_t p1=2083328ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=54ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=2ULL;o_op(8, 5, _a,_b);});uint64_t _b=({uint64_t _a=v3;uint64_t _b=2147483648ULL;o_op(11, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=16ULL;o_op(11, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(1ULL); } -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=2373ULL;uint64_t _b=({uint64_t _a=({f173(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=({uint64_t _a=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=16ULL;o_op(3, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});uint64_t p3=58720768ULL;uint64_t p4=({uint64_t p1=1040896ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=2373ULL;uint64_t _b=({uint64_t _a=({f174(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=({uint64_t _a=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=1ULL;o_op(2, 5, _a,_b);});uint64_t _b=16ULL;o_op(3, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});uint64_t p3=58720768ULL;uint64_t p4=({uint64_t p1=1040896ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=55ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=v4;uint64_t _b=16ULL;o_op(11, 5, _a,_b);})){ return o_leave(1ULL); } -uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=2369ULL;uint64_t _b=({uint64_t _a=({f173(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); -({uint64_t p1=v5;uint64_t p2=0ULL;uint64_t p3=58720768ULL;uint64_t p4=({uint64_t p1=1042944ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +uint64_t __attribute__((unused)) v5=({uint64_t _a=({uint64_t _a=2369ULL;uint64_t _b=({uint64_t _a=({f174(v0, v0_n);});uint64_t _b=12ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t _b=({uint64_t _a=v4;uint64_t _b=16ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);}); +({uint64_t p1=v5;uint64_t p2=0ULL;uint64_t p3=58720768ULL;uint64_t p4=({uint64_t p1=1042944ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=56ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t p0=v3;f174(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=v3;f175(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(1ULL); } -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=203299584ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=203299584ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=57ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t p0=v3;f174(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +if(({uint64_t _a=({uint64_t p0=v3;f175(p0);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(1ULL); } -({uint64_t p1=({uint64_t p1=31105ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=5ULL;f168(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=203300096ULL;uint64_t p4=({uint64_t p1=991744ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31105ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t p1=5ULL;f169(v0, v0_n, p1);});uint64_t _b=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});uint64_t p3=203300096ULL;uint64_t p4=({uint64_t p1=991744ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=58ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=v3;uint64_t _b=8388608ULL;o_op(11, 5, _a,_b);})){ return o_leave(1ULL); } -({uint64_t p1=({uint64_t p1=31108ULL;f172(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});uint64_t p3=3072ULL;uint64_t p4=({uint64_t p1=1042432ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=31108ULL;f173(v0, v0_n, p1);});uint64_t p2=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=16777215ULL;o_op(12, 5, _a,_b);});uint64_t _b=8ULL;o_op(15, 5, _a,_b);});uint64_t p3=3072ULL;uint64_t p4=({uint64_t p1=1042432ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } if(({uint64_t _a=v2;uint64_t _b=59ULL;o_op(6, 5, _a,_b);})){ -({uint64_t p1=({uint64_t p1=29448ULL;f170(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f168(v0, v0_n, p1);});uint64_t p3=3072ULL;uint64_t p4=({uint64_t p1=926720ULL;f167(v0, v0_n, p1);});f162(v1, v1_n, p1, p2, p3, p4);}); +({uint64_t p1=({uint64_t p1=29448ULL;f171(v0, v0_n, p1);});uint64_t p2=({uint64_t p1=2ULL;f169(v0, v0_n, p1);});uint64_t p3=3072ULL;uint64_t p4=({uint64_t p1=926720ULL;f168(v0, v0_n, p1);});f163(v1, v1_n, p1, p2, p3, p4);}); return o_leave(0ULL); } return o_leave(1ULL); } -static uint64_t f180(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f181(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v0, v0_n, 0ULL, 5); if(({uint64_t _a=v2;uint64_t _b=15ULL;o_op(8, 5, _a,_b);})){ -return o_leave(({f175(v0, v0_n, v1, v1_n);})); +return o_leave(({f176(v0, v0_n, v1, v1_n);})); } if(({uint64_t _a=v2;uint64_t _b=30ULL;o_op(8, 5, _a,_b);})){ -return o_leave(({f176(v0, v0_n, v1, v1_n);})); +return o_leave(({f177(v0, v0_n, v1, v1_n);})); } if(({uint64_t _a=v2;uint64_t _b=46ULL;o_op(8, 5, _a,_b);})){ -return o_leave(({f177(v0, v0_n, v1, v1_n);})); +return o_leave(({f178(v0, v0_n, v1, v1_n);})); } -return o_leave(({f179(v0, v0_n, v1, v1_n);})); +return o_leave(({f180(v0, v0_n, v1, v1_n);})); } -static uint64_t f181(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f182(void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); { uint64_t v3=0; @@ -5233,7 +5245,7 @@ for(;o_op(8,5, v6, k2);v6=o_op(1,5, v6,1)){ } return o_leave(0); } -static uint64_t f182(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n){ +static uint64_t f183(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n){ o_enter(); uint64_t v5[16]={0}; uint64_t v5_n=16; @@ -5257,19 +5269,19 @@ uint64_t c1=0; for(;o_op(8,5, v8, v7);v8=o_op(1,5, v8,1)){ if(c1++>=16777216)o_trap(4); if(({uint64_t _a=v8;uint64_t _b=v2;o_op(8, 5, _a,_b);})){ -({uint64_t p1=v8;f166(v0, v0_n, p1, v1, v1_n, v5, v5_n);}); -if(({uint64_t _a=({f180(v5, v5_n, v6, v6_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +({uint64_t p1=v8;f167(v0, v0_n, p1, v1, v1_n, v5, v5_n);}); +if(({uint64_t _a=({f181(v5, v5_n, v6, v6_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(0ULL); } }else{ -({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;f162(v6, v6_n, p1, p2, p3, p4);}); +({uint64_t p1=31000ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;f163(v6, v6_n, p1, p2, p3, p4);}); } -({uint64_t p1=v8;f181(v4, v4_n, p1, v6, v6_n);}); +({uint64_t p1=v8;f182(v4, v4_n, p1, v6, v6_n);}); } } return o_leave(({uint64_t _a=v7;uint64_t _b=16ULL;o_op(3, 5, _a,_b);})); } -static uint64_t f183(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f184(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); uint64_t __attribute__((unused)) v6=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);}); {uint64_t _i=v6;uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} @@ -5278,28 +5290,28 @@ uint64_t __attribute__((unused)) v6=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5 {uint64_t _i=({uint64_t _a=v6;uint64_t _b=9ULL;o_op(1, 5, _a,_b);});uint64_t _v=v5;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f184(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f185(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);}); {uint64_t _i=({uint64_t _a=v4;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=({uint64_t _a=v4;uint64_t _b=3ULL;o_op(1, 5, _a,_b);});uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f185(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f186(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);}); {uint64_t _i=({uint64_t _a=v4;uint64_t _b=4ULL;o_op(1, 5, _a,_b);});uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=({uint64_t _a=v4;uint64_t _b=5ULL;o_op(1, 5, _a,_b);});uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f186(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f187(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);}); {uint64_t _i=({uint64_t _a=v4;uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=v2;o_put(v0, v0_n, _i,_v,5);} {uint64_t _i=({uint64_t _a=v4;uint64_t _b=7ULL;o_op(1, 5, _a,_b);});uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f187(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f188(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); uint64_t __attribute__((unused)) v6=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);});uint64_t _b=10ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=v2;uint64_t _b=7ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); {uint64_t _i=v6;uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} @@ -5307,7 +5319,7 @@ uint64_t __attribute__((unused)) v6=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1 {uint64_t _i=({uint64_t _a=v6;uint64_t _b=2ULL;o_op(1, 5, _a,_b);});uint64_t _v=v5;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f188(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ +static uint64_t f189(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3, uint64_t v4, uint64_t v5){ o_enter(); uint64_t __attribute__((unused)) v6=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);});uint64_t _b=10ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=v2;uint64_t _b=7ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); {uint64_t _i=({uint64_t _a=v6;uint64_t _b=3ULL;o_op(1, 5, _a,_b);});uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} @@ -5315,824 +5327,824 @@ uint64_t __attribute__((unused)) v6=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1 {uint64_t _i=({uint64_t _a=v6;uint64_t _b=5ULL;o_op(1, 5, _a,_b);});uint64_t _v=v5;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f189(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f190(void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); uint64_t __attribute__((unused)) v4=({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=45ULL;o_op(3, 5, _a,_b);});uint64_t _b=10ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=v2;uint64_t _b=7ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); {uint64_t _i=({uint64_t _a=v4;uint64_t _b=6ULL;o_op(1, 5, _a,_b);});uint64_t _v=v3;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f190(void *v0, uint64_t v0_n){ -o_enter(); -({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;uint64_t p5=0ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=0ULL;uint64_t p2=31000ULL;uint64_t p3=4294967295ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=1ULL;uint64_t p2=1ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=1ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=1ULL;uint64_t p2=29186ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=1ULL;uint64_t p2=255ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=1ULL;uint64_t p2=3840ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=2ULL;uint64_t p2=2ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=2ULL;uint64_t p2=30722ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=2ULL;uint64_t p2=3840ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=3ULL;uint64_t p2=3ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=3ULL;uint64_t p2=31001ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=4294902015ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=2ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=4ULL;uint64_t p2=4ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=4ULL;uint64_t p2=4278221698ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=4278190143ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=4ULL;uint64_t p2=2048ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=6ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=262143ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=5ULL;uint64_t p2=5ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=5ULL;uint64_t p2=4278221698ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=4278190143ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=5ULL;uint64_t p2=2560ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=6ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=262143ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=6ULL;uint64_t p2=6ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=6ULL;uint64_t p2=4278220716ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=4278190111ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=6ULL;uint64_t p2=134219776ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=5ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=19ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=524287ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=7ULL;uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=945664ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=7ULL;uint64_t p2=4278220716ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=4278190111ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=7ULL;uint64_t p2=134220288ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=5ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=19ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=524287ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=8ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=29220ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=126747136ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -return o_leave(0); -} static uint64_t f191(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=9ULL;uint64_t p2=8ULL;uint64_t p3=1ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=31780ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=260964864ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=8ULL;uint64_t p3=2ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=30756ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=126747136ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=9ULL;uint64_t p3=0ULL;uint64_t p4=2083840ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=30757ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=126746624ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=10ULL;uint64_t p3=0ULL;uint64_t p4=3136000ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=31756ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=200302704ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=10ULL;uint64_t p3=1ULL;uint64_t p4=2087424ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=30732ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=66085488ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=11ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=203299072ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=12ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=31110ULL;uint64_t p3=16777215ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=202381568ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=8388607ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=13ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=31110ULL;uint64_t p3=16777215ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=202447104ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=14ULL;uint64_t p3=0ULL;uint64_t p4=17811968ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=29200ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=134209791ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;uint64_t p4=1032192ULL;uint64_t p5=0ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=0ULL;uint64_t p2=31000ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=0ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=1ULL;uint64_t p2=1ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=1ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=1ULL;uint64_t p2=29186ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=1ULL;uint64_t p2=255ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=1ULL;uint64_t p2=3840ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=1ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=2ULL;uint64_t p2=2ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=2ULL;uint64_t p2=30722ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=2ULL;uint64_t p2=3840ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=2ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=2ULL;uint64_t p2=1ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=3ULL;uint64_t p2=3ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=3ULL;uint64_t p2=31001ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=4294902015ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=3ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=2ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=3ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=4ULL;uint64_t p2=4ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=4ULL;uint64_t p2=4278221698ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=4278190143ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=4ULL;uint64_t p2=2048ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=4ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=6ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=4ULL;uint64_t p2=1ULL;uint64_t p3=262143ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=5ULL;uint64_t p2=5ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=5ULL;uint64_t p2=4278221698ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=4278190143ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=5ULL;uint64_t p2=2560ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=5ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=6ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=18ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=5ULL;uint64_t p2=1ULL;uint64_t p3=262143ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=6ULL;uint64_t p2=6ULL;uint64_t p3=0ULL;uint64_t p4=926208ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=6ULL;uint64_t p2=4278220716ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=4278190111ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=6ULL;uint64_t p2=134219776ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=6ULL;uint64_t p2=0ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=5ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=19ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=6ULL;uint64_t p2=1ULL;uint64_t p3=524287ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=7ULL;uint64_t p2=7ULL;uint64_t p3=0ULL;uint64_t p4=945664ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=7ULL;uint64_t p2=4278220716ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=4278190111ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=7ULL;uint64_t p2=134220288ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=7ULL;uint64_t p2=0ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;uint64_t p4=1ULL;uint64_t p5=5ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=19ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=7ULL;uint64_t p2=1ULL;uint64_t p3=524287ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=8ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=29220ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=126747136ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=8ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f192(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=18ULL;uint64_t p2=15ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=29244ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=6144ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=16ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=29244ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=268288ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=17ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=4278220825ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=71168ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=2ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=18ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=30738ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=126796031ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=19ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=203298048ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=20ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=203380992ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=21ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=202250496ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=22ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=2438ULL;uint64_t p3=4095ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=202463488ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=26ULL;uint64_t p2=23ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=26ULL;uint64_t p2=31122ULL;uint64_t p3=4294967295ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=26ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=26ULL;uint64_t p2=45056ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=8ULL;uint64_t p3=1ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=31780ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=260964864ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=9ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=8ULL;uint64_t p3=2ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=30756ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=126747136ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=10ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=9ULL;uint64_t p3=0ULL;uint64_t p4=2083840ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=30757ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=126746624ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=11ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=10ULL;uint64_t p3=0ULL;uint64_t p4=3136000ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=31756ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=200302704ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=12ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=10ULL;uint64_t p3=1ULL;uint64_t p4=2087424ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=30732ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=66085488ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=13ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=11ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=203299072ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=14ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=12ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=31110ULL;uint64_t p3=16777215ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=202381568ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=2ULL;uint64_t p3=8388607ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=15ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=13ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=31110ULL;uint64_t p3=16777215ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=202447104ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=16ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=14ULL;uint64_t p3=0ULL;uint64_t p4=17811968ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=29200ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=134209791ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=17ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f193(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=27ULL;uint64_t p2=24ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=27ULL;uint64_t p2=31122ULL;uint64_t p3=4294967295ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=27ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=27ULL;uint64_t p2=12288ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=28ULL;uint64_t p2=25ULL;uint64_t p3=0ULL;uint64_t p4=1042432ULL;uint64_t p5=0ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=28ULL;uint64_t p2=4278221199ULL;uint64_t p3=4294967295ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=28ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=28ULL;uint64_t p2=33554432ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=26ULL;uint64_t p3=0ULL;uint64_t p4=3284480ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=31144ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=136270080ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=27ULL;uint64_t p3=0ULL;uint64_t p4=3284480ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=31144ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=203378944ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=31ULL;uint64_t p2=28ULL;uint64_t p3=0ULL;uint64_t p4=2087424ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=31ULL;uint64_t p2=29196ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=31ULL;uint64_t p2=66084976ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=29ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=29202ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=126762239ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=30ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=29217ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=31ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=29217ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=32ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=29216ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=4194304ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=15ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=29244ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=6144ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=18ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=16ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=29244ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=268288ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=19ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=17ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=4278220825ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=71168ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=1ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=2ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=20ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=18ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=30738ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=126796031ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=9ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=21ULL;uint64_t p2=2ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=19ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=203298048ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=22ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=20ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=203380992ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=23ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=21ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=202250496ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=24ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=22ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=2438ULL;uint64_t p3=4095ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=202463488ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=25ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=26ULL;uint64_t p2=23ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=26ULL;uint64_t p2=31122ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=26ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=26ULL;uint64_t p2=45056ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f194(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=36ULL;uint64_t p2=33ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=29219ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=34ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=29195ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=20ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=4294967295ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=35ULL;uint64_t p3=0ULL;uint64_t p4=1034752ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=29192ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=4294967288ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=21ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=36ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=29193ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=58720256ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=37ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=29193ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=125829120ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=41ULL;uint64_t p2=38ULL;uint64_t p3=0ULL;uint64_t p4=5235200ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=41ULL;uint64_t p2=29253ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=41ULL;uint64_t p2=2102272ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=42ULL;uint64_t p2=39ULL;uint64_t p3=0ULL;uint64_t p4=5120512ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=42ULL;uint64_t p2=29445ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=42ULL;uint64_t p2=2158848ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=43ULL;uint64_t p2=40ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=43ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=43ULL;uint64_t p2=4096ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=44ULL;uint64_t p2=41ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=44ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=44ULL;uint64_t p2=5120ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=27ULL;uint64_t p2=24ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=27ULL;uint64_t p2=31122ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=27ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=27ULL;uint64_t p2=12288ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=28ULL;uint64_t p2=25ULL;uint64_t p3=0ULL;uint64_t p4=1042432ULL;uint64_t p5=0ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=28ULL;uint64_t p2=4278221199ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=28ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=28ULL;uint64_t p2=33554432ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=26ULL;uint64_t p3=0ULL;uint64_t p4=3284480ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=31144ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=136270080ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=29ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=27ULL;uint64_t p3=0ULL;uint64_t p4=3284480ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=31144ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=203378944ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=30ULL;uint64_t p2=3ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=31ULL;uint64_t p2=28ULL;uint64_t p3=0ULL;uint64_t p4=2087424ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=31ULL;uint64_t p2=29196ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=31ULL;uint64_t p2=66084976ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=31ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=31ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=29ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=29202ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=126762239ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=32ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=30ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=29217ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=33ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=31ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=29217ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=2147483648ULL;uint64_t p3=2147483648ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=34ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=32ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=29216ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=4194304ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=35ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f195(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=45ULL;uint64_t p2=42ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=32649ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=45ULL;uint64_t p2=134225664ULL;uint64_t p3=4229955583ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=45ULL;uint64_t p2=917504ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=1ULL;uint64_t p5=21ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=58ULL;uint64_t p3=0ULL;uint64_t p4=1042432ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=3072ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=19ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=24ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=8388607ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=43ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=4294901760ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=11ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=65535ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=44ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=29576ULL;uint64_t p3=16777215ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=4294901760ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=11ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=65535ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=49ULL;uint64_t p2=45ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=1ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=49ULL;uint64_t p2=2381ULL;uint64_t p3=4095ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=49ULL;uint64_t p2=58720256ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=50ULL;uint64_t p2=46ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=50ULL;uint64_t p2=2375ULL;uint64_t p3=4095ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=3ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=50ULL;uint64_t p2=58720256ULL;uint64_t p3=4286578688ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=14ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=1ULL;uint64_t p5=18446744071562067968ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=2147483647ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=51ULL;uint64_t p2=47ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=51ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=51ULL;uint64_t p2=2048ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=52ULL;uint64_t p2=48ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=52ULL;uint64_t p2=31517ULL;uint64_t p3=4294967295ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=52ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=52ULL;uint64_t p2=65536ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=53ULL;uint64_t p2=49ULL;uint64_t p3=0ULL;uint64_t p4=927744ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=53ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=53ULL;uint64_t p2=255ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=53ULL;uint64_t p2=134219776ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=33ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=29219ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=36ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=34ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=29195ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=21ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=20ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=37ULL;uint64_t p2=3ULL;uint64_t p3=4294967295ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=35ULL;uint64_t p3=0ULL;uint64_t p4=1034752ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=29192ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=4294967288ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=21ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=38ULL;uint64_t p2=3ULL;uint64_t p3=7ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=36ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=29193ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=58720256ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=39ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=37ULL;uint64_t p3=0ULL;uint64_t p4=5227520ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=29193ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=125829120ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=40ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=41ULL;uint64_t p2=38ULL;uint64_t p3=0ULL;uint64_t p4=5235200ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=41ULL;uint64_t p2=29253ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=41ULL;uint64_t p2=2102272ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=41ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=41ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=42ULL;uint64_t p2=39ULL;uint64_t p3=0ULL;uint64_t p4=5120512ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=42ULL;uint64_t p2=29445ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=42ULL;uint64_t p2=2158848ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=42ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=42ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=43ULL;uint64_t p2=40ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=43ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=43ULL;uint64_t p2=4096ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=43ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=43ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=44ULL;uint64_t p2=41ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=44ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=44ULL;uint64_t p2=5120ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=44ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=44ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f196(void *v0, uint64_t v0_n){ o_enter(); -({uint64_t p1=54ULL;uint64_t p2=50ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=54ULL;uint64_t p2=31112ULL;uint64_t p3=16777215ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=54ULL;uint64_t p2=134220031ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=51ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=5ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=29202ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=126746624ULL;uint64_t p3=4294901760ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=17ULL;uint64_t p4=2ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=52ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=29209ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=1536ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=53ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=29223ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=126746624ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=54ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=2373ULL;uint64_t p3=4095ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=58720768ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=12ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=13ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=2ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=2147483647ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=59ULL;uint64_t p2=55ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=59ULL;uint64_t p2=2369ULL;uint64_t p3=4095ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=59ULL;uint64_t p2=58720768ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=12ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=56ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=203299584ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=8388607ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=57ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=4ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=203300096ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=8388607ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=62ULL;uint64_t p2=59ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f183(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=62ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f184(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f185(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=62ULL;uint64_t p2=3072ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); -({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f187(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); -({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f189(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=42ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=32649ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=134225664ULL;uint64_t p3=4229955583ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=917504ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=1ULL;uint64_t p5=21ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=5ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=45ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=58ULL;uint64_t p3=0ULL;uint64_t p4=1042432ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=3072ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=19ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=24ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=46ULL;uint64_t p2=2ULL;uint64_t p3=8388607ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=43ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=4294901760ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=11ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=47ULL;uint64_t p2=2ULL;uint64_t p3=65535ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=44ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=29576ULL;uint64_t p3=16777215ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=4294901760ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=11ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=16ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=48ULL;uint64_t p2=2ULL;uint64_t p3=65535ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=49ULL;uint64_t p2=45ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=1ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=49ULL;uint64_t p2=2381ULL;uint64_t p3=4095ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=49ULL;uint64_t p2=58720256ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=49ULL;uint64_t p2=0ULL;uint64_t p3=7ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=50ULL;uint64_t p2=46ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=50ULL;uint64_t p2=2375ULL;uint64_t p3=4095ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=3ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=50ULL;uint64_t p2=58720256ULL;uint64_t p3=4286578688ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=50ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=14ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=32ULL;uint64_t p4=1ULL;uint64_t p5=18446744071562067968ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=50ULL;uint64_t p2=1ULL;uint64_t p3=2147483647ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=51ULL;uint64_t p2=47ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=51ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=51ULL;uint64_t p2=2048ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=51ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=51ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=52ULL;uint64_t p2=48ULL;uint64_t p3=0ULL;uint64_t p4=1043456ULL;uint64_t p5=0ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=52ULL;uint64_t p2=31517ULL;uint64_t p3=4294967295ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=52ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=52ULL;uint64_t p2=65536ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=53ULL;uint64_t p2=49ULL;uint64_t p3=0ULL;uint64_t p4=927744ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=53ULL;uint64_t p2=31108ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=53ULL;uint64_t p2=255ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=53ULL;uint64_t p2=134219776ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=53ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=53ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); return o_leave(0); } static uint64_t f197(void *v0, uint64_t v0_n){ o_enter(); +({uint64_t p1=54ULL;uint64_t p2=50ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=54ULL;uint64_t p2=31112ULL;uint64_t p3=16777215ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=54ULL;uint64_t p2=134220031ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=54ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=54ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=51ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=5ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=29202ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=126746624ULL;uint64_t p3=4294901760ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=17ULL;uint64_t p4=2ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=55ULL;uint64_t p2=4ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=52ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=29209ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=1536ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=56ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=53ULL;uint64_t p3=0ULL;uint64_t p4=2083328ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=29223ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=126746624ULL;uint64_t p3=4294967040ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=3ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=2ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=4ULL;uint64_t p4=2ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=57ULL;uint64_t p2=3ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=54ULL;uint64_t p3=0ULL;uint64_t p4=1040896ULL;uint64_t p5=3ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=2373ULL;uint64_t p3=4095ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=58720768ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=12ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=13ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=32ULL;uint64_t p4=0ULL;uint64_t p5=2ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=58ULL;uint64_t p2=2ULL;uint64_t p3=2147483647ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=59ULL;uint64_t p2=55ULL;uint64_t p3=0ULL;uint64_t p4=1042944ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=59ULL;uint64_t p2=2369ULL;uint64_t p3=4095ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=4294967295ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=59ULL;uint64_t p2=58720768ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=12ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=59ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=12ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=4ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=59ULL;uint64_t p2=1ULL;uint64_t p3=15ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=56ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=203299584ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=60ULL;uint64_t p2=3ULL;uint64_t p3=8388607ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=57ULL;uint64_t p3=0ULL;uint64_t p4=991744ULL;uint64_t p5=4ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=31105ULL;uint64_t p3=65535ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=0ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=203300096ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=0ULL;uint64_t p5=24ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=7ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=2ULL;uint64_t p3=31ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=10ULL;uint64_t p4=1ULL;uint64_t p5=8ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=24ULL;uint64_t p4=1ULL;uint64_t p5=18446744073701163008ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=61ULL;uint64_t p2=3ULL;uint64_t p3=8388607ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=62ULL;uint64_t p2=59ULL;uint64_t p3=0ULL;uint64_t p4=926720ULL;uint64_t p5=2ULL;f184(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=62ULL;uint64_t p2=29448ULL;uint64_t p3=4278255615ULL;f185(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=4294967040ULL;f186(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=62ULL;uint64_t p2=3072ULL;uint64_t p3=4294967295ULL;f187(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=1ULL;uint64_t p4=0ULL;uint64_t p5=16ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=62ULL;uint64_t p2=0ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=2ULL;uint64_t p4=1ULL;uint64_t p5=0ULL;f188(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=8ULL;uint64_t p4=0ULL;uint64_t p5=0ULL;f189(v0, v0_n, p1, p2, p3, p4, p5);}); +({uint64_t p1=62ULL;uint64_t p2=1ULL;uint64_t p3=255ULL;f190(v0, v0_n, p1, p2, p3);}); +return o_leave(0); +} +static uint64_t f198(void *v0, uint64_t v0_n){ +o_enter(); if(({uint64_t _a=o_get(v0, v0_n, 3000ULL, 5);uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(0); } -({f190(v0, v0_n);}); ({f191(v0, v0_n);}); ({f192(v0, v0_n);}); ({f193(v0, v0_n);}); ({f194(v0, v0_n);}); ({f195(v0, v0_n);}); ({f196(v0, v0_n);}); +({f197(v0, v0_n);}); {uint64_t _i=3000ULL;uint64_t _v=1ULL;o_put(v0, v0_n, _i,_v,5);} return o_leave(0); } -static uint64_t f198(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n){ +static uint64_t f199(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=o_get(v1, v1_n, 0ULL, 5); { @@ -6179,7 +6191,7 @@ return o_leave(v3); } return o_leave(63ULL); } -static uint64_t f199(uint64_t v0, uint64_t v1, const void *v2, uint64_t v2_n){ +static uint64_t f200(uint64_t v0, uint64_t v1, const void *v2, uint64_t v2_n){ o_enter(); if(({uint64_t _a=({uint64_t _a=v0;uint64_t _b=1ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=5ULL;o_op(6, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(o_get(v2, v2_n, 1ULL, 5)); @@ -6238,14 +6250,14 @@ return o_leave(o_get(v2, v2_n, 6ULL, 5)); } return o_leave(o_get(v2, v2_n, 6ULL, 5)); } -static uint64_t f200(uint64_t v0){ +static uint64_t f201(uint64_t v0){ o_enter(); return o_leave(({uint64_t _a=({uint64_t _a=v0;uint64_t _b=8388608ULL;o_op(8, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=v0;uint64_t _b=4286578688ULL;o_op(11, 5, _a,_b);});uint64_t _b=({uint64_t _a=v0;uint64_t _b=4294967295ULL;o_op(9, 5, _a,_b);});o_op(12, 1, _a,_b);});o_op(13, 1, _a,_b);})); } -static uint64_t f201(uint64_t v0, uint64_t v1, uint64_t v2, uint64_t v3){ +static uint64_t f202(uint64_t v0, uint64_t v1, uint64_t v2, uint64_t v3){ o_enter(); if(({uint64_t _a=v0;uint64_t _b=10ULL;o_op(6, 5, _a,_b);})){ -return o_leave(({uint64_t p0=v1;f200(p0);})); +return o_leave(({uint64_t p0=v1;f201(p0);})); } if(({uint64_t _a=v0;uint64_t _b=13ULL;o_op(6, 5, _a,_b);})){ return o_leave(({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=2ULL;o_op(8, 5, _a,_b);});uint64_t _b=({uint64_t _a=v1;uint64_t _b=2147483648ULL;o_op(11, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=0;o_op(18, 1, _a,_b);})); @@ -6258,7 +6270,7 @@ return o_leave(({uint64_t _a=v1;uint64_t _b=4294967295ULL;o_op(9, 5, _a,_b);})); } return o_leave(({uint64_t _a=({uint64_t _a=({uint64_t _a=v1;uint64_t _b=v2;o_op(8, 5, _a,_b);});uint64_t _b=({uint64_t _a=v3;uint64_t _b=v1;o_op(8, 5, _a,_b);});o_op(13, 1, _a,_b);});uint64_t _b=0;o_op(18, 1, _a,_b);})); } -static uint64_t f202(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, void *v3, uint64_t v3_n){ +static uint64_t f203(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, void *v3, uint64_t v3_n){ o_enter(); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, v1, 5); if(({uint64_t _a=v4;uint64_t _b=14ULL;o_op(6, 5, _a,_b);})){ @@ -6304,22 +6316,22 @@ uint64_t __attribute__((unused)) v10=o_get(v3, v3_n, v5, 5); {uint64_t _i=v5;uint64_t _v=({uint64_t _a=v10;uint64_t _b=({uint64_t _a=v9;uint64_t _b=v6;o_op(15, 5, _a,_b);});o_op(13, 5, _a,_b);});o_put(v3, v3_n, _i,_v,5);} return o_leave(0); } -static uint64_t f203(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f204(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, v1, 5); uint64_t __attribute__((unused)) v5=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5); uint64_t __attribute__((unused)) v6=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=5ULL;o_op(1, 5, _a,_b);}), 5); uint64_t __attribute__((unused)) v7=o_get(v0, v0_n, ({uint64_t _a=v1;uint64_t _b=6ULL;o_op(1, 5, _a,_b);}), 5); -uint64_t __attribute__((unused)) v8=({uint64_t p0=v4;uint64_t p1=v5;f199(p0, p1, v2, v2_n);}); -uint64_t __attribute__((unused)) v9=({uint64_t p0=v4;uint64_t p1=v8;uint64_t p2=v6;uint64_t p3=v7;f201(p0, p1, p2, p3);}); +uint64_t __attribute__((unused)) v8=({uint64_t p0=v4;uint64_t p1=v5;f200(p0, p1, v2, v2_n);}); +uint64_t __attribute__((unused)) v9=({uint64_t p0=v4;uint64_t p1=v8;uint64_t p2=v6;uint64_t p3=v7;f202(p0, p1, p2, p3);}); if(({uint64_t _a=v9;uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(2ULL); } -({uint64_t p1=v1;uint64_t p2=v8;f202(v0, v0_n, p1, p2, v3, v3_n);}); +({uint64_t p1=v1;uint64_t p2=v8;f203(v0, v0_n, p1, p2, v3, v3_n);}); uint64_t v10[16]={0}; uint64_t v10_n=16; o_fill(v10, v10_n, 0ULL, 5); -uint64_t __attribute__((unused)) v11=({uint64_t p1=v4;uint64_t p2=v1;f207(v0, v0_n, p1, p2, v3, v3_n, v10, v10_n);}); +uint64_t __attribute__((unused)) v11=({uint64_t p1=v4;uint64_t p2=v1;f208(v0, v0_n, p1, p2, v3, v3_n, v10, v10_n);}); if(v11){ if(({uint64_t _a=v4;uint64_t _b=20ULL;o_op(6, 5, _a,_b);})){ if(({uint64_t _a=v8;uint64_t _b=0ULL;o_op(6, 5, _a,_b);})){ @@ -6332,10 +6344,10 @@ return o_leave(2ULL); } return o_leave(0ULL); } -static uint64_t f204(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f205(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); -({f197(v0, v0_n);}); -uint64_t __attribute__((unused)) v3=({f198(v0, v0_n, v1, v1_n);}); +({f198(v0, v0_n);}); +uint64_t __attribute__((unused)) v3=({f199(v0, v0_n, v1, v1_n);}); if(({uint64_t _a=v3;uint64_t _b=63ULL;o_op(6, 5, _a,_b);})){ return o_leave(1ULL); } @@ -6356,7 +6368,7 @@ uint64_t c1=0; for(;o_op(8,5, v7, v6);v7=o_op(1,5, v7,1)){ if(c1++>=16777216)o_trap(4); uint64_t __attribute__((unused)) v8=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=10ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=v7;uint64_t _b=7ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); -uint64_t __attribute__((unused)) v9=({uint64_t p1=v8;f203(v0, v0_n, p1, v1, v1_n, v2, v2_n);}); +uint64_t __attribute__((unused)) v9=({uint64_t p1=v8;f204(v0, v0_n, p1, v1, v1_n, v2, v2_n);}); if(({uint64_t _a=v9;uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(v9); } @@ -6374,7 +6386,7 @@ if(({uint64_t _a=({uint64_t _a=v7;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t } return o_leave(0ULL); } -static uint64_t f205(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n){ +static uint64_t f206(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n){ o_enter(); { uint64_t v2=0; @@ -6401,7 +6413,7 @@ return o_leave(v2); } return o_leave(63ULL); } -static uint64_t f206(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ +static uint64_t f207(const void *v0, uint64_t v0_n, void *v1, uint64_t v1_n){ o_enter(); uint64_t __attribute__((unused)) v2=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 0ULL, 5);uint64_t _b=18ULL;o_op(16, 5, _a,_b);});uint64_t _b=63ULL;o_op(12, 5, _a,_b);}); uint64_t __attribute__((unused)) v3=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=2ULL;o_op(16, 5, _a,_b);});uint64_t _b=67108863ULL;o_op(12, 5, _a,_b);}); @@ -6414,10 +6426,10 @@ uint64_t __attribute__((unused)) v4=({uint64_t _a=({uint64_t _a=v3;uint64_t _b=6 {uint64_t _i=6ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=1ULL;o_op(1, 5, _a,_b);});uint64_t _b=4294967295ULL;o_op(12, 5, _a,_b);});o_put(v1, v1_n, _i,_v,5);} return o_leave(0); } -static uint64_t f207(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, const void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ +static uint64_t f208(const void *v0, uint64_t v0_n, uint64_t v1, uint64_t v2, const void *v3, uint64_t v3_n, void *v4, uint64_t v4_n){ o_enter(); if(({uint64_t _a=v1;uint64_t _b=14ULL;o_op(6, 5, _a,_b);})){ -({f206(v3, v3_n, v4, v4_n);}); +({f207(v3, v3_n, v4, v4_n);}); return o_leave(1ULL); } if(({uint64_t _a=v1;uint64_t _b=13ULL;o_op(6, 5, _a,_b);})){ @@ -6443,10 +6455,10 @@ return o_leave(1ULL); } return o_leave(0ULL); } -static uint64_t f208(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ +static uint64_t f209(const void *v0, uint64_t v0_n, uint64_t v1, const void *v2, uint64_t v2_n, void *v3, uint64_t v3_n){ o_enter(); uint64_t __attribute__((unused)) v4=o_get(v0, v0_n, v1, 5); -uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;uint64_t p2=v1;f207(v0, v0_n, p1, p2, v2, v2_n, v3, v3_n);}); +uint64_t __attribute__((unused)) v5=({uint64_t p1=v4;uint64_t p2=v1;f208(v0, v0_n, p1, p2, v2, v2_n, v3, v3_n);}); if(v5){ return o_leave(0); } @@ -6515,10 +6527,10 @@ return o_leave(0); {uint64_t _i=6ULL;uint64_t _v=v10;o_put(v3, v3_n, _i,_v,5);} return o_leave(0); } -static uint64_t f209(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ +static uint64_t f210(void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, void *v2, uint64_t v2_n){ o_enter(); -({f197(v0, v0_n);}); -uint64_t __attribute__((unused)) v3=({f205(v0, v0_n, v1, v1_n);}); +({f198(v0, v0_n);}); +uint64_t __attribute__((unused)) v3=({f206(v0, v0_n, v1, v1_n);}); if(({uint64_t _a=v3;uint64_t _b=63ULL;o_op(6, 5, _a,_b);})){ return o_leave(3ULL); } @@ -6539,12 +6551,12 @@ uint64_t c1=0; for(;o_op(8,5, v6, v5);v6=o_op(1,5, v6,1)){ if(c1++>=16777216)o_trap(4); uint64_t __attribute__((unused)) v7=({uint64_t _a=({uint64_t _a=v4;uint64_t _b=10ULL;o_op(1, 5, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=7ULL;o_op(3, 5, _a,_b);});o_op(1, 5, _a,_b);}); -({uint64_t p1=v7;f208(v0, v0_n, p1, v1, v1_n, v2, v2_n);}); +({uint64_t p1=v7;f209(v0, v0_n, p1, v1, v1_n, v2, v2_n);}); } } return o_leave(0ULL); } -static uint64_t f210(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n){ +static uint64_t f211(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, uint64_t v3, void *v4, uint64_t v4_n){ o_enter(); uint64_t v5[3001]={0}; uint64_t v5_n=3001; @@ -6570,11 +6582,11 @@ uint64_t v9=0; uint64_t c1=0; for(;o_op(8,5, v9, v2);v9=o_op(1,5, v9,1)){ if(c1++>=16777216)o_trap(4); -({uint64_t p1=v9;f166(v0, v0_n, p1, v1, v1_n, v6, v6_n);}); -if(({uint64_t _a=({f204(v5, v5_n, v6, v6_n, v7, v7_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +({uint64_t p1=v9;f167(v0, v0_n, p1, v1, v1_n, v6, v6_n);}); +if(({uint64_t _a=({f205(v5, v5_n, v6, v6_n, v7, v7_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(0ULL); } -({uint64_t p1=v9;f181(v4, v4_n, p1, v7, v7_n);}); +({uint64_t p1=v9;f182(v4, v4_n, p1, v7, v7_n);}); } } if(({uint64_t _a=v8;uint64_t _b=v2;o_op(10, 5, _a,_b);})){ @@ -6585,7 +6597,7 @@ for(;o_op(8,5, v9, k2);v9=o_op(1,5, v9,1)){ {uint64_t _i=v9;uint64_t _v=0ULL;o_put(v6, v6_n, _i,_v,5);} } } -if(({uint64_t _a=({f204(v5, v5_n, v6, v6_n, v7, v7_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ +if(({uint64_t _a=({f205(v5, v5_n, v6, v6_n, v7, v7_n);});uint64_t _b=0ULL;o_op(7, 5, _a,_b);})){ return o_leave(0ULL); } { @@ -6594,13 +6606,13 @@ uint64_t k2=({uint64_t _a=v8;uint64_t _b=v2;o_op(2, 5, _a,_b);}); uint64_t c2=0; for(;o_op(8,5, v9, k2);v9=o_op(1,5, v9,1)){ if(c2++>=16777216)o_trap(4); -({uint64_t p1=({uint64_t _a=v2;uint64_t _b=v9;o_op(1, 5, _a,_b);});f181(v4, v4_n, p1, v7, v7_n);}); +({uint64_t p1=({uint64_t _a=v2;uint64_t _b=v9;o_op(1, 5, _a,_b);});f182(v4, v4_n, p1, v7, v7_n);}); } } } return o_leave(({uint64_t _a=v8;uint64_t _b=16ULL;o_op(3, 5, _a,_b);})); } -static uint64_t f211(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ +static uint64_t f212(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[16]={0}; uint64_t v4_n=16; @@ -6627,7 +6639,7 @@ for(;o_op(8,5, v5, k1);v5=o_op(1,5, v5,1)){ {uint64_t _i=v5;uint64_t _v=o_get(v0, v0_n, ({uint64_t _a=v5;uint64_t _b=1ULL;o_op(1, 5, _a,_b);}), 5);o_put(v4, v4_n, _i,_v,5);} } } -if(({uint64_t _a=({f136(v4, v4_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ +if(({uint64_t _a=({f137(v4, v4_n);});uint64_t _b=0;o_op(18, 1, _a,_b);})){ return o_leave(2ULL); } if(({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 1ULL, 5);uint64_t _b=({uint64_t p1=6ULL;f21(v1, v1_n, p1);});o_op(7, 5, _a,_b);});uint64_t _b=({uint64_t _a=({uint64_t _a=o_get(v0, v0_n, 2ULL, 5);uint64_t _b=32ULL;o_op(3, 5, _a,_b);});uint64_t _b=({uint64_t p1=16ULL;f21(v1, v1_n, p1);});o_op(7, 5, _a,_b);});o_op(13, 1, _a,_b);})){ @@ -6665,7 +6677,7 @@ return o_leave(3ULL); } return o_leave(0ULL); } -static uint64_t f212(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ +static uint64_t f213(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n){ o_enter(); uint64_t v4[32]={0}; uint64_t v4_n=32; @@ -6677,14 +6689,14 @@ for(;o_op(8,5, v5, k1);v5=o_op(1,5, v5,1)){ {uint64_t _i=v5;uint64_t _v=({uint64_t p1=v5;f21(v2, v2_n, p1);});o_put(v4, v4_n, _i,_v,5);} } } -return o_leave(({f211(v0, v0_n, v1, v1_n, v4, v4_n, v3, v3_n);})); +return o_leave(({f212(v0, v0_n, v1, v1_n, v4, v4_n, v3, v3_n);})); } -static uint64_t f213(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, const void *v3, uint64_t v3_n, uint64_t v4){ +static uint64_t f214(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, uint64_t v2, const void *v3, uint64_t v3_n, uint64_t v4){ o_enter(); uint8_t v5[16384]={0}; uint64_t v5_n=16384; o_fill(v5, v5_n, 0ULL, 2); -uint64_t __attribute__((unused)) v6=({uint64_t p2=v2;uint64_t p3=1ULL;f210(v0, v0_n, v1, v1_n, p2, p3, v5, v5_n);}); +uint64_t __attribute__((unused)) v6=({uint64_t p2=v2;uint64_t p3=1ULL;f211(v0, v0_n, v1, v1_n, p2, p3, v5, v5_n);}); if(({uint64_t _a=({uint64_t _a=v6;uint64_t _b=0ULL;o_op(6, 5, _a,_b);});uint64_t _b=({uint64_t _a=v6;uint64_t _b=v4;o_op(7, 5, _a,_b);});o_op(13, 1, _a,_b);})){ return o_leave(18446744073709551602ULL); } @@ -6700,7 +6712,7 @@ return o_leave(18446744073709551602ULL); } return o_leave(0ULL); } -static uint64_t f214(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ +static uint64_t f215(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, uint64_t v3){ o_enter(); uint64_t v4[16]={0}; uint64_t v4_n=16; @@ -6726,15 +6738,15 @@ return o_leave(18446744073709551602ULL); {uint64_t _i=3ULL;uint64_t _v=({uint64_t p1=14ULL;f21(v0, v0_n, p1);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=4ULL;uint64_t _v=({uint64_t p1=17ULL;f21(v0, v0_n, p1);});o_put(v4, v4_n, _i,_v,5);} {uint64_t _i=5ULL;uint64_t _v=({uint64_t _a=({uint64_t _a=({uint64_t p1=12ULL;f21(v2, v2_n, p1);});uint64_t _b=8ULL;o_op(2, 5, _a,_b);});uint64_t _b=4ULL;o_op(4, 5, _a,_b);});o_put(v4, v4_n, _i,_v,5);} -if(({uint64_t _a=({f160(v4, v4_n, v5, v5_n, v6, v6_n, v7, v7_n, v8, v8_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +if(({uint64_t _a=({f161(v4, v4_n, v5, v5_n, v6, v6_n, v7, v7_n, v8, v8_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(18446744073709551602ULL); } -if(({uint64_t _a=({f212(v4, v4_n, v0, v0_n, v2, v2_n, v8, v8_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ +if(({uint64_t _a=({f213(v4, v4_n, v0, v0_n, v2, v2_n, v8, v8_n);});uint64_t _b=0ULL;o_op(7, 4, _a,_b);})){ return o_leave(18446744073709551602ULL); } -return o_leave(({uint64_t p2=o_get(v8, v8_n, 0ULL, 5);uint64_t p4=v3;f213(v5, v5_n, v7, v7_n, p2, v1, v1_n, p4);})); +return o_leave(({uint64_t p2=o_get(v8, v8_n, 0ULL, 5);uint64_t p4=v3;f214(v5, v5_n, v7, v7_n, p2, v1, v1_n, p4);})); } -static uint64_t f215(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n, const void *v4, uint64_t v4_n, void *v5, uint64_t v5_n){ +static uint64_t f216(const void *v0, uint64_t v0_n, const void *v1, uint64_t v1_n, const void *v2, uint64_t v2_n, const void *v3, uint64_t v3_n, const void *v4, uint64_t v4_n, void *v5, uint64_t v5_n){ o_enter(); uint8_t v6[32]={0}; uint64_t v6_n=32; @@ -6751,7 +6763,7 @@ if(({uint64_t _a=v7;uint64_t _b=0ULL;o_op(7, 8, _a,_b);})){ return o_leave(o_cast(9, 8, v7)); } if(({uint64_t _a=({uint64_t p1=19ULL;f21(v0, v0_n, p1);});uint64_t _b=3ULL;o_op(6, 5, _a,_b);})){ -if(({uint64_t _a=({uint64_t p3=o_get(v1, v1_n, 1ULL, 5);f214(v0, v0_n, v2, v2_n, v3, v3_n, p3);});uint64_t _b=0ULL;o_op(7, 8, _a,_b);})){ +if(({uint64_t _a=({uint64_t p3=o_get(v1, v1_n, 1ULL, 5);f215(v0, v0_n, v2, v2_n, v3, v3_n, p3);});uint64_t _b=0ULL;o_op(7, 8, _a,_b);})){ return o_leave(18446744073709551602ULL); } } @@ -6785,7 +6797,7 @@ if(o_overlap(p5, p5_n*1, p3, p3_n*1))return 32; if(o_overlap(p5, p5_n*1, p4, p4_n*1))return 32; if(o_busy)return 33; o_busy=1;o_depth=0;int code=setjmp(o_jmp); -if(!code)*result=f215(p0, p0_n, p1, p1_n, p2, p2_n, p3, p3_n, p4, p4_n, p5, p5_n); +if(!code)*result=f216(p0, p0_n, p1, p1_n, p2, p2_n, p3, p3_n, p4, p4_n, p5, p5_n); o_busy=0;o_depth=0;return (uint32_t)code; } #if defined(__GNUC__) diff --git a/src/cudapp_om_validate.ident b/src/cudapp_om_validate.ident index 59c5a825..e03083d2 100644 --- a/src/cudapp_om_validate.ident +++ b/src/cudapp_om_validate.ident @@ -1 +1 @@ -omega-ident 2 unit=validate abi=bridge-seeded src=fc2c74b27215b4157ce6bd387dab2e914fcada1ec367ec70a836fa529c9a7abb c=3905447de491d20f111f723b2f4e996f4921f79d34f2d2ac6d03b1fb07eddfac omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=validate=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/residency.om,om/cache/artifact.om,om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om,om/encoder/bw_enc_sm121.om,om/encoder/bw_spec_sm121.om,om/components/encode.om,om/components/admit.om,om/cache/validate.om +omega-ident 2 unit=validate abi=bridge-seeded src=6783c94d357411b9adf67601225687af7e0a34753797453c670272cba500c743 c=ebaf85e1f327fc8b607d7e11ef8fc947a9139875bf13aae6b24d30da47dfc0df omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=validate=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/cache/residency.om,om/cache/artifact.om,om/components/bw_alloc.om,om/components/bw_effect.om,om/components/bw_check.om,om/components/bw_project.om,om/components/rowpipe.om,om/components/staged.om,om/components/compose.om,om/components/runtime.om,om/encoder/bw_enc_sm121.om,om/encoder/bw_spec_sm121.om,om/components/encode.om,om/components/admit.om,om/cache/validate.om diff --git a/tests/components/.crumb b/tests/components/.crumb index d85bafce..b47f8420 100644 --- a/tests/components/.crumb +++ b/tests/components/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T15:46:07Z", + "compiled_at": "2026-10-28T18:19:59Z", "compiler": "crumb-compile/1", - "digest": "sha256:71a5e4075ce92cc88d89b08c8a8986baf095bf60ef0fef90389948b768650026", + "digest": "sha256:2a0c2832199b9162a4160cf4670f0314bc4332128d180f97db700ff0733b6439", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "files": 16, - "generated_at_commit": "017069c63f80dca6ebb97f4426296bba9e01ad76", - "source_tree": "sha256:bee726888f639bfc65369c92659636a0dc91fcd23faf599edf8908845d5e9ae9" + "generated_at_commit": "204e53fcb4c9996ef0dacd5d5f2617eb0ec9edbd", + "source_tree": "sha256:3472b6b807fa35ee705d9daab1c8d254666e5a9fbba4e01e4e5f4ddcc9ddc804" } }, "name": "componenttests", diff --git a/tests/components/capacity-host-receipt.json b/tests/components/capacity-host-receipt.json new file mode 100644 index 00000000..f4ef2404 --- /dev/null +++ b/tests/components/capacity-host-receipt.json @@ -0,0 +1,29 @@ +{"conductor":"seeded Omega proc.om + cases.om + run.om","compiler":"2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f","source_baseline":"b759afc3f5e46f152ffb06b39882ffa28cacaf96","encoder_source_revision":"1c5a8398d93b49e6765c2e3752aaad8611027d0d","quant_source_revision":"fe25929ce71b11703eafa72395df2dd495aa61f2","physical_execution":"NOT_RUN: no GPU authority","cases":[ +{"family":"direct","spec":[256,8,1,4,0],"whole_frame_sha256":"b5bb30768c79fdd6e463153e38ce69663e6b7bfa6f9777f21e59d29aee3dc5e7","code_sha256":"b98ca8e082ea30ac4b4dfc6fd1c467dae9b2d7ec57e8e485d269a35bf75eb218","code_bytes":1792,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst4.6231305e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[256,8,1,4,1],"whole_frame_sha256":"82e1fe1f85ae72da78da8435a467aeaad12ba3142355dda985111d5e74ab7e78","code_sha256":"4332a0604636db1bba0190e3924cca4a48bf1edbb92dcc436c329fb8a8f2186a","code_bytes":1792,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst4.6231305e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[512,16,1,4,0],"whole_frame_sha256":"dfe766517383af13f38a3be4832881d7b1fbff1820e6d4fd08916cb9da0248e2","code_sha256":"5ddf1834fa8f873cfb408a3db23bf9ee98856717bca07eb0bc2de86ca5ea1203","code_bytes":2560,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[512,16,1,4,1],"whole_frame_sha256":"f76f241f356bd835eee26ebb6c62649cdff353125ae6dee88065d36017490ce9","code_sha256":"c6e0000a724c9b60294c1c04fbdc9fd3d3d66a77644533bd3be6c7051b4f2a35","code_bytes":2560,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[2048,8,2,8,0],"whole_frame_sha256":"b5c9e72c669b051bbb176fc6e34ab7cd0fd2e404f153c60669935693a7a16744","code_sha256":"54a6dccc0a7e28049b78b86143b773a1674169104437f38bdf6cdf795e57d3b0","code_bytes":2688,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst2.19413562e-08\u000awrong-result mutant: double-oracle bad192\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[2048,8,2,8,1],"whole_frame_sha256":"205d60f19cfeef336863ee70719cc4ad19e0868f95b09da40309ae5c4cd5260d","code_sha256":"27df81f48fb5e37108b83ffac9432108245105f1f0bcad05a4db378b7ec5a05b","code_bytes":2688,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst2.19413562e-08\u000awrong-result mutant: double-oracle bad192\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[4096,16,4,16,0],"whole_frame_sha256":"e28872ee8f3ef58ef893c7cc8d0f55f8854208dfb9960a408f67b7f3fdcf9989","code_sha256":"f0231a9e12751e58fd0f8235f15bc517f8fdc9f85f9bb2b0506e5265b2e93fe5","code_bytes":7168,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst2.34430326e-08\u000awrong-result mutant: double-oracle bad96\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"direct","spec":[4096,16,4,16,1],"whole_frame_sha256":"ec5e30c2dddd377866677ee0232f2a2daa69c1c0e1b9795d66cb1dabd26c6146","code_sha256":"7474910f589e2c87ec14c13f2b071085ae0ee8dabe34aa0cfe4b63e6b351b4e4","code_bytes":7168,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst2.34430326e-08\u000awrong-result mutant: double-oracle bad96\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[256,8,1,1],"whole_frame_sha256":"3a371f1666bd5dc9a19cf5b8194efe036ab870a7fc75895f8e6ec19f3ac35e91","code_sha256":"78bc0f2df9a571413ffcdd3a39ddbd5dbc7621110df820f61315dfaab377ac69","code_bytes":2464,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst4.6231305e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[768,8,1,5],"whole_frame_sha256":"a4a5dbd7262f52094cab063de88f87acb64495bfbe22b721dff58cb4e4df0566","code_sha256":"90aee5a111786f94c020e9811292fe00163d58149286958d01fb417e688673e3","code_bytes":4192,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst4.09446669e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[512,16,8,16],"whole_frame_sha256":"3098e413ee1a5dcc9f88eb391aedeecd213605f73347b3dea72b1f9c82c3f4ed","code_sha256":"0f74138cc209383a759856cc664ad93191bac3be216a67445d7d6584d3c3e885","code_bytes":14032,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad48\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[4096,16,1,32],"whole_frame_sha256":"cdfaf9063264eac4a82ec5d8a2e485030d16fd6e5c566fdc03fd94e00f05428d","code_sha256":"26fa9aa2e8c7f13092ee0c3ce05af084817c463c3c5729bcf44886aa214d9b30","code_bytes":13776,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst2.34430326e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, 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not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[256,8,8,1],"whole_frame_sha256":"aa3277e5d7eb736c85893d6fed49e1cdb388d495498981eb44669bdae834696c","code_sha256":"baf48e0f39b2f28248aef84ceeb0d16f9eba8d6169a9cda47a713103e626859b","code_bytes":9072,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst4.6231305e-08\u000awrong-result mutant: double-oracle bad48\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[512,16,1,1],"whole_frame_sha256":"0e79082d41d08f8731e4b18b9bcf076f19d7b2229eae0a2bd9c47e6daf481633","code_sha256":"f027ef23ca78a894058c5dfb1f5fa03a7d84c6140239a6dc30c03e329bfce4ea","code_bytes":3680,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[512,16,2,3],"whole_frame_sha256":"69a78e64b0b94c6158b39e9c22fae4f07352aaf85d996683acae19dcf9626474","code_sha256":"f3a31d0e46633f8b8f6f676e60200fdc70e7dccece61a621e9e2566744692f41","code_bytes":4880,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad192\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[512,16,4,3],"whole_frame_sha256":"f0724d95784e2823dc71db7f54c594e3441baacddce5e6cb9688f3a3749777a6","code_sha256":"14c088bcc43a1ea3d969efbd48ce58178826829f2a432ed65b56222162a65add","code_bytes":8112,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst5.08413955e-08\u000awrong-result mutant: double-oracle bad96\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[1024,8,1,2],"whole_frame_sha256":"0d7e5e353eef118c833e5e59d4d1b2312e22f0003d81f7836c4e9675b1c49aee","code_sha256":"951d37014603add081a6aed701bedfb9092ca68ca24c5ba95591204588a74724","code_bytes":5520,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 worst3.52032282e-08\u000awrong-result mutant: double-oracle bad384\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"rowpipe","spec":[2048,16,1,4],"whole_frame_sha256":"2556960f0cd0a56319fc07874ef7272a3e387fbdb8ac1859bdff6d5a6e3cdecd","code_sha256":"31ff252e98a4bec3aceac3927c4a2ee85d0ae06db4ecb47f535da2ad213b7e58","code_bytes":8336,"numerical_result":"native grouped gemv both fragment orders, distinct experts/X rows, double-oracle bad0 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distinct experts/X rows, double-oracle bad0 worst2.77894745e-08\u000awrong-result mutant: double-oracle bad192\u000aunknown-op mutant refused: run 0 (order 0, warp order 0): OP at pc 0: opcode not modelled\u000a","result":"PASS"}, +{"family":"staged","spec":[2048,16,4,16,0],"whole_frame_sha256":"b9c7ab925b8ac3218fa5da8b84ec1a4274bfbc3825178810dea6c3662aaf0cb0","code_sha256":"8a22d1b4d7410de7ba90c99b2df9d411cd57ca62be65874892c333dfe6ec7053","code_bytes":8320,"numerical_result":"native staged both fragment orders, empty segment, tail rows, multi-segment: 0 of 600 outputs differ from the emulation (bit-identical)\u000awrong-result mutant: 240 of 600 outputs differ from the emulation\u000aunknown-op mutant refused: order 0: OP at pc 0: opcode not modelled (pc 0)\u000a","staged_structural_result":"PASS staged canonical/launch/cfg/out8 controls and independent C statistics\u000a","result":"PASS"}, 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multi-segment, YMAP movement: 0 of 600 outputs differ from the emulation (bit-identical), rows moved by YMAP\u000awrong-result mutant: 240 of 600 outputs differ from the emulation, rows moved by YMAP\u000aunknown-op mutant refused: order 0: OP at pc 0: opcode not modelled (pc 0)\u000a","staged_structural_result":"PASS staged canonical/launch/cfg/out8 controls and independent C statistics\u000a","result":"PASS"}, +{"family":"staged","spec":[768,8,4,8,0],"whole_frame_sha256":"1187077d46bbde6a47308c5a0eb0cdb2f7b656609c612667f466c9c27cf1373e","code_sha256":"dcc15337b09a9567dac2ff8b3e909fce8cc1cc270ddcd85ddbd7c2998d1a9ba3","code_bytes":7424,"numerical_result":"native staged both fragment orders, empty segment, tail rows, multi-segment: 0 of 600 outputs differ from the emulation (bit-identical)\u000awrong-result mutant: 240 of 600 outputs differ from the emulation\u000aunknown-op mutant refused: order 0: OP at pc 0: opcode not modelled (pc 0)\u000a","staged_structural_result":"PASS staged canonical/launch/cfg/out8 controls and independent C statistics\u000a","result":"PASS"}, +{"family":"staged","spec":[1024,16,4,16,0],"whole_frame_sha256":"397a81243d3f0ebd069fbb667bc0420ff5645d28c48d441a0682ab06cde9b638","code_sha256":"2da1a95abf7f3c1f4fe858f641e17c27503ebecb10ed3a1494a5682983526b77","code_bytes":8064,"numerical_result":"native staged both fragment orders, empty segment, tail rows, multi-segment: 0 of 600 outputs differ from the emulation (bit-identical)\u000awrong-result mutant: 240 of 600 outputs differ from the emulation\u000aunknown-op mutant refused: order 0: OP at pc 0: opcode not modelled (pc 0)\u000a","staged_structural_result":"PASS staged canonical/launch/cfg/out8 controls and independent C statistics\u000a","result":"PASS"}, +{"family":"staged","spec":[256,8,4,8,0],"whole_frame_sha256":"4df0b5844620cf53da7265fdb92cea0409224dceedde6e29695e4cadaec4c947","code_sha256":"f3334526491398abf804757fa866674907376488ae8ee9986d4974eae86cf88f","code_bytes":4224,"numerical_result":"native staged both fragment orders, empty segment, tail rows, multi-segment: 0 of 600 outputs differ from the emulation (bit-identical)\u000awrong-result mutant: 240 of 600 outputs differ from the emulation\u000aunknown-op mutant refused: order 0: OP at pc 0: opcode not modelled (pc 0)\u000a","staged_structural_result":"PASS staged canonical/launch/cfg/out8 controls and independent C statistics\u000a","result":"PASS"}],"independent_numerical_execution":"PASS reused existing scalar/warp oracles on every native IR/allocation frame","composer_root":"PASS direct/changed-direct/rowpipe/dense-staged/mapped-staged and mutant refusal","negative_controls":["reserved component fields refuse","SB_B/SB_RD/branch reference mutations differ","native/oracle resource exhaustion refuses without output","truncated/oversized frames refuse without output","typed op/bundle/wait/branch/resource/MMA controls PASS","every native frame FFMA-to-FADD executes but numerical oracle disagrees","every native frame unknown-op refusal preserved"],"source_sha256":{"tests/components/proc.om":"3253be8b0dbc81956d3ebb2892e45837f85b3fc8030f09a7556c44056168bb42","tests/components/cases.om":"b0ca81ec23f90a23c7cfea3fdfb54582deea3a4e4d9a2df55ee5bb6678b003eb","tests/components/run.om":"973b452e17c000cec7d530a98ebcfae0538fd930b2537bb2732edfd5abc3390b","tests/components/numerical.c":"2a681d826969bcf52422e19e60fc47d73f0529d536738f9007499732dbbfe2dc","tests/components/native-frame.h":"08e7f87ffa3360531e4779ac2b8cc9a8b93dad816b396a8be1f5d3d732640ca6","tests/gpu_fp8_api_test.c":"f71b34e1c77f9f6a17e62757e26a97b4f8f181ba746e5acad6ce87ebf2e81072","tests/gpu_fp8gemm_test.c":"c5a804c46c79da1cf2f4c1bd82f6ab0c2ee5e7f15f0438326392b3a657e6e3de","tests/bw_warp_sim.h":"f709e17cf4fceab93f1f33f8d63798dc652c6cf4e88d968532898b933dd5dc80","tests/bw_warp_sim_k.h":"2f7167ac67d9bb815372df0a8f8cd0cefcb05035b44313bd62f1e8354ecd02c2","src/omega_gpu_fp8_pack.c":"eaa651e04da8bd72957b374395e419e41872e3e1af761e9fba7135014445c87a","src/omega_gpu_hostmath.c":"9aee5b24d788434236f8dd0fd5d201c4dd6d78712adad966f44ce5797e71b622","src/omega_gpu_fp8gemm_api.c":"8ce0fdda2e33bf35035181d695123b3111686341589684327c3ab6940822673a","src/omega_blackwell_matmul.c":"457cafc15d3d040091e64830b1856367a3150d061dd450f15939d1c4462bde69","om/components/bw_alloc.om":"d19186b871f96c3983818cdd1a159f829c2f117f7e5c051d1f51fb39d846399b","om/components/bw_check.om":"3bed2f9d851560ed15997e1cc2d092c4342f5a1eef1a94311b844608d4d24fd6","om/components/bw_effect.om":"73f7521472b611afff83feedcf9a87b9550909a47eebd37c6c26dd3554425b48","om/components/bw_project.om":"b1c85c1afc98a7c46e8bfd942992a10d8a1b1acfe095ee7db1c50e7a409cebb7","om/components/compose.om":"75ae7428c745582c97efd74c370851777062a5de80ac539c3c89ab0b410d0162","om/components/encode.om":"8d112a96ee2fe7719fc40bfafe91f8699a09905a532b0dea583f4b43b22ade4f","om/components/fixture.om":"082e53cff85d139de60bb0bc9dd83b8fc3368b7c1c09397699db9f30883ed3ee","om/components/realize.om":"990ee91cf164d5a77bfa2918ba77828550fc6d191abf40dd293523dda359931c","om/components/rowpipe.om":"e023eb747a07c35405fe876aeee4896d9ce41ff65b978c79fa0d156fbf869ef1","om/components/staged.om":"6c36ce4f58f04225558a384818573c76b11591bcb734c386ff8ee17149f87257","tests/components/component-unit.om":"d383d5df1f3b69e6392c21f912fbb87b6107be0088802363ce150183cb162965","tests/components/compose-unit.om":"514248f0b2f828870150800ef59c0940062c8711ed4de4bf1592d29a5dc648b1","tests/components/direct-caller.om":"829702d137a7b23d92ed7b50f74675c936023194c98ca7d89954daa7831a918a","tests/components/rowpipe-caller.om":"82ebf58234d79426c4a109321548c276bf6ca8695144e951e555798a6cd2840a","tests/components/staged-caller.om":"0c7c811686849666763ab31fd6550af14e322648bd1e19d6d91dc268677cc9c1","tests/components/direct-oracle.c":"14f68114d56814127e0a5d5370dd75f2b9718817aea0af005a8d69ce1f0b5e60","tests/components/rowpipe-oracle.c":"e125b8b3777c4ff1f3aa3db3c3ccba07c691570e0ba584df9a7eb08d84421cd1","tests/components/staged-oracle.c":"a64c615f4e00a85286ba3f4438f7b8af6490107b850939cb75c2683e9976c857","src/omega_blackwell_codegen.c":"5fad4042ea39e498a634dd34a6b833106430c934907a59bdfc8d5ddb074263b6","src/omega_blackwell_codegen_moe.c":"5db114eebcbb02ef0a4c016d7f94757f076b403d72a8ee0400d72d5e956af85d","src/omega_blackwell_codegen_moe2.c":"8032e43778c11da167697be3f20cd408fc8a37ee3b6863c894623c83292f5f19","src/omega_blackwell_codegen_gemm.c":"3bea15f1790dcb26be81cd98c40e52b6059256bb3c15c57b8726708a70d59921","src/omega_blackwell_codegen.h":"4d7e077e9e5b9682fe8fa14c0ea115eb8a4b6670fe2b8082b21c58b7d9ee4146","tests/components/wolfram.json":"33b2a6d34633221bf235433a30b5d760b9b795d5ac0176e02162c338074bc16c","om/components/admit.om":"b62d4647c7e19fe45103af148b2200708e557ba71ce7c533045684cd98089f0d","tests/components/record-unit.om":"8ea97f05b56bead49dc12bf75532dfa6d738248059863f2ee7ca330a3f383b04","tests/components/capacity-unit.om":"dd7f36a57c8c45bb67ec321c6e665749bd82af9e69e6d2734dd7d48958b66292","tests/components/capacity-runtime-unit.om":"20069dca3a5ff43a64a03264c924d084f42ed313ab28b1bfe923c790ddc0d736","om/cache/validate.om":"db1dd670c489f55f84c119ed5b7f0abad21913bd78814cb719374943ac5cbf31","om/cache/digest.om":"b0e49da9e6c146da0d040476d84bff8d93486c563e19ef8f1d731b1ffb15c051","om/cache/residency.om":"0da6b33438e98934425f1ea83d194298f390cc68029f0750ebfc70060f87bf61","om/cache/artifact.om":"788457cd86592f0175913a500424bb13381fc9a777443acd1dfd01c5f6513f04","om/quant/quant.om":"44bce96f3c274401e19a71b835814d69caf2bea8c2b1f4f43616c7c121232f09"},"encoder_source_sha256":{"om/encoder/bw_enc_sm121.om":"12369bf1e383e79a4926e7758aaf5f3f778f2945c91327ce0aa570babffc05e6","om/encoder/bw_spec_sm121.om":"d38dd63f842dff1dae525208576825f3a0027dead5ab2cde9482cf70b87e8ae9"},"tool_versions":{"nvdisasm":"nvdisasm: NVIDIA (R) CUDA disassembler\u000aCopyright (c) 2005-2025 NVIDIA Corporation\u000aBuilt on Thu_Aug_14_07:20:28_PM_PDT_2025\u000aCuda compilation tools, release 13.0, V13.0.85\u000aBuild cuda_13.0.r13.0/compiler.36400806_0\u000a","cc":"cc (Ubuntu 13.3.0-6ubuntu2~24.04.1) 13.3.0\u000aCopyright (C) 2023 Free Software Foundation, Inc.\u000aThis is free software; see the source for copying conditions. There is NO\u000awarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\u000a\u000a","sha256sum":"sha256sum (GNU coreutils) 9.4\u000aCopyright (C) 2023 Free Software Foundation, Inc.\u000aLicense GPLv3+: GNU GPL version 3 or later .\u000aThis is free software: you are free to change and redistribute it.\u000aThere is NO WARRANTY, to the extent permitted by law.\u000a\u000aWritten by Ulrich Drepper, Scott Miller, and David Madore.\u000a","capacity_regression":{"baseline":"c6977b4906229fe83f41103b7eff65b64a0986d6","baseline_exit":103,"fixed_exit":0,"patch_guard_removal_exit":103,"tail_guard_removal_exit":103,"staged_cfg":[3,1536,16,8,16,0],"result":"PASS"}}} diff --git a/tests/components/capacity-runtime-unit.om b/tests/components/capacity-runtime-unit.om new file mode 100644 index 00000000..32d720a4 --- /dev/null +++ b/tests/components/capacity-runtime-unit.om @@ -0,0 +1,21 @@ +note SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +note Actual merged169 nv_staged recomposition seam. This is not full artifact admission or device evidence. +fn main to int +rec = new uchar 4096 0 +launch = new uchar 4096 0 +code = new uchar 16384 99 +compose_put rec 6 1536 +compose_put rec 16 512 +compose_put rec 14 8 +compose_put rec 17 16 +compose_put launch 12 8 +if ne nv_staged rec code launch 0 -14 +ret 78 +end +for j ulong 16384 +if ne get code j 99 +ret 79 +end +end +ret 0 +end diff --git a/tests/components/capacity-unit.om b/tests/components/capacity-unit.om new file mode 100644 index 00000000..27912da1 --- /dev/null +++ b/tests/components/capacity-unit.om @@ -0,0 +1,108 @@ +note SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +note Concatenate allocator,effect,check,project,rowpipe,staged,compose,then this host-only caller. +note Refused emissions must not patch/control a nonexistent slot before their capacity error reaches the caller. +fn cu_slots to int +ins = new ulong 8192 99 +s = new ulong 64 0 +m = new ulong 2048 0 +args = new ulong 4 0 +put s 0 1024 +at = bc_branch ins s 0 false +if or ne at 1024 ne get s 3 1 +ret 70 +end +bc_patch ins at 0 +bc_tail ins at +for j ulong 8192 +if ne get ins j 99 +ret 71 +end +end +note Check both final valid slot and very large rejected indices before multiplication. +bc_patch ins 18446744073709551615 0 +bc_tail ins 18446744073709551615 +bc_patch ins 1023 1023 +if ne and get ins 8190 4294967295 0 +ret 72 +end +bc_tail ins 1023 +if ne get ins 8190 shl ulong 1032192 32 +ret 73 +end +for j ulong 4 +put args j j +put m j 4 +end +put m 2 2 +for j ulong 3 +put s 0 add j 1022 +if eq bc_mma ins s m args 0 +ret 74 +end +if ne get s 0 add j 1022 +ret 75 +end +end +put s 0 1021 +put s 1 0 +put s 3 0 +if ne bc_mma ins s m args 0 +ret 76 +end +if ne get s 0 1024 +ret 77 +end +ret 0 +end +fn cu_case cfg view ulong 16 expected uint to int +ins = new ulong 8192 0 +meta = new ulong 2048 0 +phys = new ulong 288 0 +actual = new ulong 8 99 +rc = bc_compose cfg ins meta phys actual +if ne rc expected +ret 65 +end +if ne rc 0 +for j ulong 8 +if ne get actual j 0 +ret 66 +end +end +end +ret 0 +end +fn main to int +rc = cu_slots +if ne rc 0 +ret rc +end +cfg = new ulong 16 0 +put cfg 0 3 +put cfg 1 1536 +put cfg 2 16 +put cfg 3 8 +put cfg 4 16 +note This legal U3 shape previously trapped103 during branch patching at saturated instruction capacity. +rc = cu_case cfg 2 +if ne rc 0 +ret rc +end +note A legal nearby U2 shape must remain realizable with unchanged instruction effects. +put cfg 1 2048 +rc = cu_case cfg 0 +if ne rc 0 +ret rc +end +put cfg 0 1 +put cfg 1 256 +put cfg 2 8 +put cfg 3 1 +put cfg 4 4 +rc = cu_case cfg 0 +if ne rc 0 +ret rc +end +put cfg 0 2 +ret cu_case cfg 0 +end diff --git a/tests/components/run.om b/tests/components/run.om index e503cca9..3098709f 100644 --- a/tests/components/run.om +++ b/tests/components/run.om @@ -140,7 +140,44 @@ text RtRMut "build/components/record-mutant" text RtGuard "if lt compose_word b 22 add get actual 1 2" text RtWeak "if false" text RtRKey ",\"staged_structural_result\":" -text RtRcpt "tests/components/host-receipt.json" +text RtRcpt "tests/components/capacity-host-receipt.json" +text RtCap "tests/components/capacity-unit.om" +text RtCapB "build/components/capacity-unit" +text RtCapM1 "build/components/capacity-patch-mutant" +text RtCapM2 "build/components/capacity-tail-mutant" +text RtCapIf "if ge at 1024" +text RtCapRs ",\"capacity_regression\":{\"baseline\":\"c6977b4906229fe83f41103b7eff65b64a0986d6\",\"baseline_exit\":103,\"fixed_exit\":0,\"patch_guard_removal_exit\":103,\"tail_guard_removal_exit\":103,\"staged_cfg\":[3,1536,16,8,16,0],\"result\":\"PASS\"}" +text RtCapRun "tests/components/capacity-runtime-unit.om" +text RtCapRB "build/components/capacity-runtime-unit" +text RtVal "om/cache/validate.om" +text RtDig "om/cache/digest.om" +text RtRes "om/cache/residency.om" +text RtArt "om/cache/artifact.om" +fn rt_val to void +path = new uchar 1024 0 +n = rt_qpath path +hp_cat path n +rt_nl +hp_cat Rt00095 len Rt00095 +rt_nl +hp_cat RtDig len RtDig +rt_nl +hp_cat RtRes len RtRes +rt_nl +hp_cat RtArt len RtArt +rt_nl +rt_enc Rt00009 len Rt00009 +rt_spec +hp_cat Rt00010 len Rt00010 +rt_nl +hp_cat RtAdmit len RtAdmit +rt_nl +hp_cat RtVal len RtVal +rt_nl +hp_cat RtCapRun len RtCapRun +rt_nl +hp_build RtCapRB len RtCapRB +end fn rc_publish to void b = new uchar 262144 0 n = hp_read Rt00072 len Rt00072 b len b @@ -208,6 +245,30 @@ hp_build RtRBin len RtRBin end end +fn rt_uncap which ulong to void +hits = ulong 0 +for pos ulong sub get HUsed 0 len RtCapIf +same = true +for j ulong len RtCapIf +if ne get HSrc add pos j get RtCapIf j +same = false +end +end +if same +hits = add hits 1 +if eq hits which +for j ulong len RtCapIf +c = uchar 32 +if lt j len RtWeak +c = get RtWeak j +end +put HSrc add pos j c +end +end +end +end +hp_require eq hits 2 +end fn rt_nl to void pos = get HUsed 0 hp_require lt pos len HSrc @@ -288,9 +349,26 @@ hp_cat Rt00020 len Rt00020 rt_nl hp_build Rt00019 len Rt00019 end -if ge kind 6 +if and ge kind 6 le kind 7 rt_record kind end +if and ge kind 8 le kind 10 +hp_cat RtCap len RtCap +rt_nl +if eq kind 8 +hp_build RtCapB len RtCapB +else +rt_uncap sub kind 8 +if eq kind 9 +hp_build RtCapM1 len RtCapM1 +else +hp_build RtCapM2 len RtCapM2 +end +end +end +if eq kind 11 +rt_val +end end note execprog intentionally supplies an empty environment; locate the selected cc toolchain explicitly. fn rt_ccpref to void @@ -589,6 +667,12 @@ rc_source RtSrc12 len RtSrc12 rc_source RtSrc13 len RtSrc13 rc_source RtAdmit len RtAdmit rc_source RtRUnit len RtRUnit +rc_source RtCap len RtCap +rc_source RtCapRun len RtCapRun +rc_source RtVal len RtVal +rc_source RtDig len RtDig +rc_source RtRes len RtRes +rc_source RtArt len RtArt rc_text Rt00060 len Rt00060 rc_quote RtQuant len RtQuant rc_text Rt00071 len Rt00071 @@ -609,6 +693,7 @@ rc_text RtCcVer len RtCcVer rc_ver 1 RtVFlag len RtVFlag rc_text RtShaVer len RtShaVer rc_ver 3 RtVFlag len RtVFlag +rc_text RtCapRs len RtCapRs rc_text RtVEnd len RtVEnd hp_require eq fsync get RCFile 0 0 hp_require eq fclose get RCFile 0 0 @@ -676,6 +761,18 @@ rt_cc add i 1 end rt_comp 6 rt_comp 7 +rt_comp 8 +rt_comp 9 +rt_comp 10 +hp_start RtCapB len RtCapB +hp_exec -1 -1 0 +hp_start RtCapM1 len RtCapM1 +hp_exec -1 -1 103 +hp_start RtCapM2 len RtCapM2 +hp_exec -1 -1 103 +rt_comp 11 +hp_start RtCapRB len RtCapRB +hp_exec -1 -1 0 rc_begin kc_cases rc_finish From 83c2a8acc059108edff26020cfbabb9c3ced58b3 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:34:09 -0500 Subject: [PATCH 10/21] test(native): reset compose result sentinel before every call Signed-off-by: Drake Stapleton --- tests/native_runtime_controls.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/native_runtime_controls.h b/tests/native_runtime_controls.h index 937e5c30..727ae69f 100644 --- a/tests/native_runtime_controls.h +++ b/tests/native_runtime_controls.h @@ -120,9 +120,10 @@ static void nr_fixture(OmegaGpuNativeArtifact *a, uint8_t weights[65536], uint8_ static void c_native_compose_capacity(void) { uint64_t cfg[16]={3,1536,16,8,16}; uint64_t ins[8192]={0}, metadata[2048]={0}, phys[288]={0}, actual[8]; - uint64_t status=UINT64_MAX; + uint64_t status; for(unsigned pass=0;pass<2;++pass) { memset(actual,0xff,sizeof actual); + status=UINT64_MAX; EXPECT(omega_native_compose(&status,cfg,16,ins,8192,metadata,2048, phys,288,actual,8)==OMEGA_OK); EXPECT(status==2); @@ -131,6 +132,7 @@ static void c_native_compose_capacity(void) { /* The capacity refusal must not poison the next valid native call. */ memset(cfg,0,sizeof cfg); cfg[0]=1; cfg[1]=256; cfg[2]=8; cfg[3]=1; cfg[4]=8; + status=UINT64_MAX; EXPECT(omega_native_compose(&status,cfg,16,ins,8192,metadata,2048, phys,288,actual,8)==OMEGA_OK && status==0); EXPECT(actual[0]>0 && actual[0]<=1024); From dbb1b5002fd7d96ff4695b2da4dcb3238db226c2 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 13:35:47 -0500 Subject: [PATCH 11/21] docs(components): record per-call capacity status controls Signed-off-by: Drake Stapleton --- om/components/.crumb | 8 ++++---- om/components/README.md | 2 ++ tests/components/.crumb | 10 +++++----- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/om/components/.crumb b/om/components/.crumb index e7f4f8c0..3dd42166 100644 --- a/om/components/.crumb +++ b/om/components/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T18:19:59Z", + "compiled_at": "2026-10-28T18:35:46Z", "compiler": "crumb-compile/1", - "digest": "sha256:615823e3c9821360956d7e7e25e3d0f268c5d875594395fb9987aa1c83168bb1", + "digest": "sha256:3e6458e66f2ac0a6c52bc872a386a26ad88239fb0a62e53e39760b947ff563cc", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "files": 13, - "generated_at_commit": "204e53fcb4c9996ef0dacd5d5f2617eb0ec9edbd", - "source_tree": "sha256:60b29711b8759e5be432ae7e02e9cb112ea0c13be67f625da95abfb6ec2f6bc8" + "generated_at_commit": "b165817aa6535de8eefd42b042ea25ed7b5d9ab1", + "source_tree": "sha256:45bd7b4f52220d531f08995aa4c8acb07aa8bfc9fab911e2e7da81569ad83831" } }, "name": "components", diff --git a/om/components/README.md b/om/components/README.md index 8a3943a1..9f7136a4 100644 --- a/om/components/README.md +++ b/om/components/README.md @@ -40,6 +40,8 @@ On source `c6977b4906229fe83f41103b7eff65b64a0986d6`, legal staged configuration `capacity-unit.om` exercises the actual composer refusal, zero result counters, a nearby successful U2 configuration, direct/rowpipe controls, final valid and first invalid patch/tail slots, oversized indices, and HMMA's three-slot atomic capacity boundary. Removing either new slot guard must reproduce trap103. `capacity-runtime-unit.om` calls the actual #169 `nv_staged` recomposition seam and requires refusal without touching supplied code. This last check does not claim a fully admitted artifact or device execution. The generated public composer caller is also exercised by the existing session-platform host test. +The generated public-adapter regression resets its status to `UINT64_MAX` before each capacity-refusal call and again before valid-call recovery. A previous refusal value must not satisfy the next call's assertion. The native runtime fixture runs on the synthetic platform without linking the Linux device platform; its PASS is host-only. + The native conductor writes a new `tests/components/capacity-host-receipt.json`; it preserves the historical `host-receipt.json` unchanged. Both source pins and executed control results belong to their respective receipts. Physical qualification remains NOT_RUN, and every production registration, cache gate and device authorization requirement is unchanged. diff --git a/tests/components/.crumb b/tests/components/.crumb index b47f8420..07e3fc2e 100644 --- a/tests/components/.crumb +++ b/tests/components/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T18:19:59Z", + "compiled_at": "2026-10-28T18:35:46Z", "compiler": "crumb-compile/1", - "digest": "sha256:2a0c2832199b9162a4160cf4670f0314bc4332128d180f97db700ff0733b6439", + "digest": "sha256:6317ea3dc35cbc8ddb3cf7a88745a4f5a3942402693e64b58775e35059f37a5d", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "files": 16, - "generated_at_commit": "204e53fcb4c9996ef0dacd5d5f2617eb0ec9edbd", - "source_tree": "sha256:3472b6b807fa35ee705d9daab1c8d254666e5a9fbba4e01e4e5f4ddcc9ddc804" + "files": 19, + "generated_at_commit": "b165817aa6535de8eefd42b042ea25ed7b5d9ab1", + "source_tree": "sha256:4b259fd8101945997fe4b780dd1420efd8edd792695d2a6339ffddb9b9a90dd1" } }, "name": "componenttests", From 067815f8580206f1bbccd7fa302c1ac354029910 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 14:23:56 -0500 Subject: [PATCH 12/21] Record canonical portable Ampere host acceptance and exact opcode controls --- docs/PORT-AMPERE.md | 27 +++++++++++++++- .../CUDAPP-AMPERE/recovery-exact-oracle.json | 18 +++++++++++ .../recovery-host-acceptance.json | 31 +++++++++++++++++++ .../CUDAPP-AMPERE/recovery-portable-pins.json | 20 ++++++++++++ 4 files changed, 95 insertions(+), 1 deletion(-) create mode 100644 evidence/CUDAPP-AMPERE/recovery-exact-oracle.json create mode 100644 evidence/CUDAPP-AMPERE/recovery-host-acceptance.json create mode 100644 evidence/CUDAPP-AMPERE/recovery-portable-pins.json diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index 357dace3..3a6e4cb2 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -51,7 +51,7 @@ Blackwell header. | Safe reserve refusal proof | DONE | `tests/ampere/memory_refusal.c:39` sets reserve above total VRAM (therefore above free VRAM even if other processes release memory), then requests only a small allocation. It requires refusal, zero intervening RM allocation ioctls and unchanged free VRAM. Simulated-driver coverage is separate from this real-device test. It never pressure-allocates VRAM. | | Open-module and device selection doctor | DONE | `tests/ampere/doctor.py:79` verifies Linux x86_64, the exact pinned open module, requested PCI IDs, device nodes and an unambiguous BDF. `CUDAPP_GPU_BDF` selects that exact GPU in the driver client. `test_doctor.py` uses a fake filesystem and is always SIMULATED. No driver is opened by the doctor. | | Portable Omega build provenance | IMPLEMENTED | `om/units.sh` covers all canonical hosted roots plus Ampere encoding/runtime and the separate revision/epoch freestanding profile. Checked portable generated translation units replace executable-code trampolines. `om/omega-bridge.lock`, per-unit identities and generated declarations retain exact composed-source SHA → C SHA provenance. Missing/mismatched converter, profile or seed refuses before installation. Final host acceptance is recorded separately below. | -| Native x86_64 host build | DONE | `.github/workflows/ampere-x86.yml:13` uses a native Ubuntu x86 runner for the full host build/tests and offline oracle. `src/omega_numeric.c:31` adds the x86 host-reference tier using scalar SSE/fused libm where appropriate; integer-defined conversions are not mislabeled as an independent conversion oracle. Local x86 emulation, if run, is labeled HOST_EMULATED separately. | +| Native x86_64 host build | IMPLEMENTED | `.github/workflows/ampere-x86.yml` schedules a native Ubuntu x86 runner for the full host build/tests and offline oracle. Adding the job is not a successful run: current-head native CI was not observed during recovery. `src/omega_numeric.c` supplies the x86 host-reference tier; integer-defined conversions are not mislabeled as an independent oracle. Converter scalar x86 emulation is HOST_EMULATED, not whole-consumer native acceptance. | | Device test plan / runner | DONE | `tests/ampere/README.md`, `doctor.py`, `run.py`, `math_device.c`, and `memory_refusal.c` cover doctor, complete vector-add output, intentionally failing vector-add, exhaustive unary math, a numerical negative control and safe memory refusal. The runner starts each result at NOT_RUN, records real outputs and stops on failure. | | GA102 / GA104 execution and qualification | BLOCKED | No RTX device is attached or authorized here. Both device states remain NOT_RUN. Need the actual host, OS, driver version, SSH access and a GPU window before any real execution. | @@ -66,6 +66,31 @@ programs without executing them. The instruction oracle command is: make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle ``` +Recovery host acceptance at `dbb1b5002fd7d96ff4695b2da4dcb3238db226c2` +used bridge `cb492a76348546dc1ffe5857492e0796cfcec232`, after preserving +the interrupted index at `3e4145d3` and integrating canonical `c6977b49` +plus the accepted capacity-refusal source/tests through `ca441c5a`. +`make -j2 OUT_DIR=build-ampere-final all test test-native-artifact +zero-cuda-gate ampere-device-build` exited zero on the AArch64 host: +`CUDA++ HOST TESTS PASS (57 targets)`. This includes byte-identical +regeneration of all 39 roots, real compose-capacity refusal, import-free +scalar linkage/allowlist controls, Ampere simulated ordering and VRAM +admission, numeric/cubin checks, and existing encoder/cubin differentials. +The five compiler/converter/frontend mutation controls each refused with +exit 3 and installed no output ([pin receipt](../evidence/CUDAPP-AMPERE/recovery-portable-pins.json)). +These are host results, not RTX execution or a native x86 compiler result. + +The fresh instrumented producer run captured 773 SM121 kernels and emitted +the Ampere math corpus. Its 600-second make deadline expired during decoding; +the completed standalone comparison then exited zero: 2169 SM86 kernels, +every opcode and operand matched, 73 native-FP8 refusals. Register operand, +uniform destination, EF-versus-MMIO.GPU policy, subtraction sign, branch, +reconvergence join/barrier and carry-output mutants were refused. +See [exact oracle receipt](../evidence/CUDAPP-AMPERE/recovery-exact-oracle.json). +The legacy SM121 MMIO repair remains separate in issue171/draft172; +its unchanged 773-kernel and four-artifact impact receipts are not hardware +qualification and are not silently folded into Ampere's expected semantics. + The [device plan](../tests/ampere/README.md) keeps separate NOT_RUN entries for every check on each card. Exhaustive math uses the intended NVIDIA PTX bounds, not an invented tolerance or a claim that raw MUFU matches PTX normalization. diff --git a/evidence/CUDAPP-AMPERE/recovery-exact-oracle.json b/evidence/CUDAPP-AMPERE/recovery-exact-oracle.json new file mode 100644 index 00000000..ecdd271a --- /dev/null +++ b/evidence/CUDAPP-AMPERE/recovery-exact-oracle.json @@ -0,0 +1,18 @@ +{ + "status": "EXERCISED_HOST_ONLY", + "source": "dbb1b5002fd7d96ff4695b2da4dcb3238db226c2", + "nvdisasm_version": "13.0.85", + "nvdisasm_sha256": "bc40070d596fa49b81c0905ca1d05e457aaec071280f742997d4a0b511781b25", + "producer_command": "make -j2 OUT_DIR=build-ampere-oracle-final CUDAPP_AMPERE_CORPUS=1 OMEGA_SEED= OMEGA_OMC= OMEGA_MV= OMEGA_BRIDGE= test-ampere-encoder-oracle", + "producer_result": "All producer commands exited0; SM121 capture contained773 kernels; Ampere math emission PASS. Overall make deadline600s expired while running the comparison. This invocation is not reported as PASS.", + "completed_comparison_command": "python3 tools/ampere_nvdisasm.py build-ampere-oracle-final/ampere-oracle-corpus", + "completed_comparison_exit": 0, + "completed_comparison_output": [ + "SM86 offline oracle: 2169 kernels, every opcode/operand matched; mutated operand refused;", + "native FP8 refusals: 73 kernels. Device qualification: NOT_RUN", + "MMIO policy, subtraction sign, branch target, reconvergence join/barrier controls refused", + "IADD3's discarded PT outputs retained semantically; unexpected carry output refused" + ], + "SM121_MMIO_repair": "Separate issue171/draft172, source885e32017eaae6208719eefcfa516ceaa853a846. Do not treat historical EF as an alias of MMIO.GPU; explicit per-op expected semantics are retained here.", + "device_qualification": "NOT_RUN" +} diff --git a/evidence/CUDAPP-AMPERE/recovery-host-acceptance.json b/evidence/CUDAPP-AMPERE/recovery-host-acceptance.json new file mode 100644 index 00000000..482445a0 --- /dev/null +++ b/evidence/CUDAPP-AMPERE/recovery-host-acceptance.json @@ -0,0 +1,31 @@ +{ + "status": "EXERCISED_HOST_ONLY", + "source": "dbb1b5002fd7d96ff4695b2da4dcb3238db226c2", + "bridge": "cb492a76348546dc1ffe5857492e0796cfcec232", + "host": "Linux AArch64", + "command": "make -j2 OUT_DIR=build-ampere-final OMEGA_SEED= OMEGA_OMC= OMEGA_MV= OMEGA_BRIDGE= OMEGA_BRIDGE_DIR= all test test-native-artifact zero-cuda-gate ampere-device-build", + "exit": 0, + "final_verdict": "CUDA++ HOST TESTS PASS (57 targets)", + "observed": [ + "PASS portable Omega units regenerate byte for byte: 37 hosted plus separate revision and epoch scalar translation units", + "PASS NATIVE_REAL_COMPOSE_CAPACITY_REFUSES_WITHOUT_TRAP", + "freestanding malloc-import allowlist negative control refused", + "native artifact manifest: 70 checks, 0 failed", + "artifact export: 47 checks, 0 failed", + "ZERO_CUDA SELF-TEST PASS; both final executable probes PASS", + "VENDORED PASS: 68 files match hashes, none unlisted", + "encoder differential: 68 golden instructions and 14 fixture programs; flipped-bit control refused", + "cubin differential: 869 calls, 750 images; flipped-image-bit control refused", + "AMPERE CUBIN HOST PASS and AMPERE NUMERIC HOST PASS", + "Ampere simulated RM allocation, QMD/class, session-ordering and argument serialization PASS", + "Ampere VRAM reserve and mismatched-target simulated refusals PASS", + "Ampere simulated doctor, math oracle negative controls, emit-only and hello simulator PASS", + "existing backend mutants: 120 total, 107 killed, 13 classified redundant, 0 test gaps" + ], + "verification_runner_note": "An earlier Python capture invocation was interrupted by a queued Eval-cell deadline before saving its log; it is not counted as acceptance. The durable shell invocation above completed normally. Raw session artifact: artifact://540.", + "native_x86_consumer_ci": "NOT_OBSERVED", + "native_x86_omega_compiler_923": "SEPARATE_FAILING_ROUTE_NOT_A_DEPENDENCY", + "RTX3090": "NOT_RUN", + "RTX3060Ti": "NOT_RUN", + "GPU_or_live_service_actions": "NONE" +} diff --git a/evidence/CUDAPP-AMPERE/recovery-portable-pins.json b/evidence/CUDAPP-AMPERE/recovery-portable-pins.json new file mode 100644 index 00000000..906d8fe5 --- /dev/null +++ b/evidence/CUDAPP-AMPERE/recovery-portable-pins.json @@ -0,0 +1,20 @@ +{ + "status": "EXERCISED_HOST_ONLY", + "consumer_source": "dbb1b5002fd7d96ff4695b2da4dcb3238db226c2", + "canonical_base": "c6977b4906229fe83f41103b7eff65b64a0986d6", + "bridge_source": "cb492a76348546dc1ffe5857492e0796cfcec232", + "compiler_sha256": "2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f", + "baseline_compiler_sha256": "191b776ef98821597c3e30655da6d680a9b66edbc9ceaca3c39c61ea6df098e9", + "generation": {"command": "OMEGA_SEED= OMEGA_OMC= OMEGA_BRIDGE= sh om/units.sh", "exit": 0, "hosted_roots": 37, "import_free_scalar_roots": 2}, + "refusal_method": "Run sh om/units.sh with OMEGA_UNITS_DEST an empty temporary directory. Substitute /bin/true for compiler, or append one newline to exactly one pinned source/frontend in an isolated bridge copy. Require exit3 and no installed output files for each control.", + "refusals": [ + {"mutation":"compiler", "exit":3, "installed_files":0}, + {"mutation":"src/toc.om", "exit":3, "installed_files":0}, + {"mutation":"src/freest.om", "exit":3, "installed_files":0}, + {"mutation":"tools/bridge-seeded", "exit":3, "installed_files":0}, + {"mutation":"tools/bridge-freest", "exit":3, "installed_files":0} + ], + "native_x86_compiler_923": "FAILING_SEPARATE_WORK_NOT_A_DEPENDENCY", + "device": "NOT_RUN", + "historical_receipts": "UNCHANGED" +} From 18883812612e020bd89a52c378ac85654ad4a848 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 14:59:01 -0500 Subject: [PATCH 13/21] feat(numeric): add portable scalar IEEE f32-to-f16 RNE conversion and behavior fixtures - om/numeric/f16.om: native_f16(bits ulong) to ulong implementing IEEE 754-2008 binary32 to binary16 RNE scalar integer conversion. Preserves signed zero, IEEE subnormals with RNE tie-breaking, overflow to signed infinity, and quiet/signaling NaNs with payload preservation. No dynamic shifts or div/rem. - tests/ampere/f16_fixture.om: pure Omega behavior fixture covering all boundary conditions and tie-breaking rules. - tests/ampere/test_f16_behavior.c: C behavior fixture running boundary table, 6 negative mutant controls, and 44M sweep points against native _Float16 reference on ARM host and x86_64 under QEMU. - src/cudapp_freest_f16.c: generated freestanding C via bridge-freest emitting omega_native_f16(uint64_t *result, uint64_t p0). --- om/numeric/.crumb | 20 ++++ om/numeric/f16.om | 95 ++++++++++++++++ src/cudapp_freest_f16.c | 108 ++++++++++++++++++ tests/ampere/.crumb | 10 +- tests/ampere/f16_fixture.om | 140 +++++++++++++++++++++++ tests/ampere/test_f16_behavior.c | 186 +++++++++++++++++++++++++++++++ tests/moe/.crumb | 8 +- 7 files changed, 558 insertions(+), 9 deletions(-) create mode 100644 om/numeric/.crumb create mode 100644 om/numeric/f16.om create mode 100644 src/cudapp_freest_f16.c create mode 100644 tests/ampere/f16_fixture.om create mode 100644 tests/ampere/test_f16_behavior.c diff --git a/om/numeric/.crumb b/om/numeric/.crumb new file mode 100644 index 00000000..4e97b5dc --- /dev/null +++ b/om/numeric/.crumb @@ -0,0 +1,20 @@ +{ + "extensions": { + "generated": { + "children": [], + "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", + "compiled_at": "2026-10-28T19:58:29Z", + "compiler": "crumb-compile/1", + "digest": "sha256:19bf03508a03ea9fe4a98949a6144d2590f4500c3d7c6226c0c004a2d31f7508", + "evidence_files": 0, + "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", + "files": 1, + "generated_at_commit": "067815f8580206f1bbccd7fa302c1ac354029910", + "source_tree": "sha256:4c752a1a64a5b6c9c7df491445eb1f6ed00794628aa43a133b6e358b601036d9" + } + }, + "layer": "numeric", + "name": "numeric", + "purpose": "Portable scalar numeric conversions, IEEE binary32 to binary16 RNE", + "schema_version": "1.0.0" +} diff --git a/om/numeric/f16.om b/om/numeric/f16.om new file mode 100644 index 00000000..e8ccddf6 --- /dev/null +++ b/om/numeric/f16.om @@ -0,0 +1,95 @@ +note SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +note Scalar binary32 to binary16 IEEE 754-2008 conversion. +note Rounding mode: roundTiesToEven. +note Signed zero preserved. Subnormals rounded with RNE. +note Overflow rounded to signed infinity. +note Quiet and signaling NaNs preserved as quiet NaN with payload and sign. +note Inputs and outputs are raw IEEE bit representations passed as ulong. + +fn f16_sub exp ulong m ulong to ulong +if eq exp 112 +lsb = and shr m 14 1 +r = add add m 8191 lsb +ret shr r 14 +end +if eq exp 111 +lsb = and shr m 15 1 +r = add add m 16383 lsb +ret shr r 15 +end +if eq exp 110 +lsb = and shr m 16 1 +r = add add m 32767 lsb +ret shr r 16 +end +if eq exp 109 +lsb = and shr m 17 1 +r = add add m 65535 lsb +ret shr r 17 +end +if eq exp 108 +lsb = and shr m 18 1 +r = add add m 131071 lsb +ret shr r 18 +end +if eq exp 107 +lsb = and shr m 19 1 +r = add add m 262143 lsb +ret shr r 19 +end +if eq exp 106 +lsb = and shr m 20 1 +r = add add m 524287 lsb +ret shr r 20 +end +if eq exp 105 +lsb = and shr m 21 1 +r = add add m 1048575 lsb +ret shr r 21 +end +if eq exp 104 +lsb = and shr m 22 1 +r = add add m 2097151 lsb +ret shr r 22 +end +if eq exp 103 +lsb = and shr m 23 1 +r = add add m 4194303 lsb +ret shr r 23 +end +if eq exp 102 +lsb = and shr m 24 1 +r = add add m 8388607 lsb +ret shr r 24 +end +ret 0 +end + +fn native_f16 bits ulong to ulong +sign = and shr bits 16 32768 +u = and bits 2147483647 +if ge u 2139095040 +if gt u 2139095040 +payload = and shr u 13 1023 +res = or 32256 payload +ret or sign res +end +ret or sign 31744 +end +if ge u 1199566848 +ret or sign 31744 +end +if ge u 947912704 +lsb = and shr u 13 1 +rounded = add add u 4095 lsb +val = sub rounded 939524096 +ret or sign shr val 13 +end +if gt u 855638016 +exp = shr u 23 +m = or 8388608 and u 8388607 +res = f16_sub exp m +ret or sign res +end +ret sign +end diff --git a/src/cudapp_freest_f16.c b/src/cudapp_freest_f16.c new file mode 100644 index 00000000..cbf3bc75 --- /dev/null +++ b/src/cudapp_freest_f16.c @@ -0,0 +1,108 @@ +/* Omega Bridge portable nontrapping scalar profile. No host runtime. */ +#include +#if defined(__GNUC__) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-function" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wunused-variable" +#endif +static unsigned ombr_fs_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} +static int ombr_fs_valid(unsigned t,uint64_t v){unsigned w=ombr_fs_width(t);if(t<6)return w==64||v<((uint64_t)1<=UINT64_MAX-m+1;} +static uint64_t ombr_fs_op(unsigned op,unsigned t,uint64_t a,uint64_t b){unsigned w=ombr_fs_width(t);uint64_t mask=UINT64_MAX>>(64-w);if(op>=6&&op<=11){uint64_t x=a,y=b;if(t>=6){x^=(uint64_t)1<<63;y^=(uint64_t)1<<63;}switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}}switch(op){case 1:return (a+b)&mask;case 2:return (a-b)&mask;case 3:return (a*b)&mask;case 12:return a&b;case 13:return a|b;case 14:return a^b;case 15:return (a<>b;case 17:return (0-a)&mask;default:return t==1?!a:t>=6?~a:(~a)&mask;}} +static uint64_t f0(uint64_t v0, uint64_t v1); +static uint64_t f1(uint64_t v0); +static uint64_t f0(uint64_t v0, uint64_t v1){ +if(ombr_fs_op(6, 5, v0, 112ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 14ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 8191ULL), v2); +return ombr_fs_op(16, 5, v3, 14ULL); +} +if(ombr_fs_op(6, 5, v0, 111ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 15ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 16383ULL), v2); +return ombr_fs_op(16, 5, v3, 15ULL); +} +if(ombr_fs_op(6, 5, v0, 110ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 16ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 32767ULL), v2); +return ombr_fs_op(16, 5, v3, 16ULL); +} +if(ombr_fs_op(6, 5, v0, 109ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 17ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 65535ULL), v2); +return ombr_fs_op(16, 5, v3, 17ULL); +} +if(ombr_fs_op(6, 5, v0, 108ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 18ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 131071ULL), v2); +return ombr_fs_op(16, 5, v3, 18ULL); +} +if(ombr_fs_op(6, 5, v0, 107ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 19ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 262143ULL), v2); +return ombr_fs_op(16, 5, v3, 19ULL); +} +if(ombr_fs_op(6, 5, v0, 106ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 20ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 524287ULL), v2); +return ombr_fs_op(16, 5, v3, 20ULL); +} +if(ombr_fs_op(6, 5, v0, 105ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 21ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 1048575ULL), v2); +return ombr_fs_op(16, 5, v3, 21ULL); +} +if(ombr_fs_op(6, 5, v0, 104ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 22ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 2097151ULL), v2); +return ombr_fs_op(16, 5, v3, 22ULL); +} +if(ombr_fs_op(6, 5, v0, 103ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 23ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 4194303ULL), v2); +return ombr_fs_op(16, 5, v3, 23ULL); +} +if(ombr_fs_op(6, 5, v0, 102ULL)){ +uint64_t v2=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v1, 24ULL), 1ULL); +uint64_t v3=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v1, 8388607ULL), v2); +return ombr_fs_op(16, 5, v3, 24ULL); +} +return 0ULL; +} +static uint64_t f1(uint64_t v0){ +uint64_t v1=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v0, 16ULL), 32768ULL); +uint64_t v2=ombr_fs_op(12, 5, v0, 2147483647ULL); +if(ombr_fs_op(11, 5, v2, 2139095040ULL)){ +if(ombr_fs_op(10, 5, v2, 2139095040ULL)){ +uint64_t v3=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v2, 13ULL), 1023ULL); +uint64_t v4=ombr_fs_op(13, 5, 32256ULL, v3); +return ombr_fs_op(13, 5, v1, v4); +} +return ombr_fs_op(13, 5, v1, 31744ULL); +} +if(ombr_fs_op(11, 5, v2, 1199566848ULL)){ +return ombr_fs_op(13, 5, v1, 31744ULL); +} +if(ombr_fs_op(11, 5, v2, 947912704ULL)){ +uint64_t v3=ombr_fs_op(12, 5, ombr_fs_op(16, 5, v2, 13ULL), 1ULL); +uint64_t v4=ombr_fs_op(1, 5, ombr_fs_op(1, 5, v2, 4095ULL), v3); +uint64_t v5=ombr_fs_op(2, 5, v4, 939524096ULL); +return ombr_fs_op(13, 5, v1, ombr_fs_op(16, 5, v5, 13ULL)); +} +if(ombr_fs_op(10, 5, v2, 855638016ULL)){ +uint64_t v3=ombr_fs_op(16, 5, v2, 23ULL); +uint64_t v4=ombr_fs_op(13, 5, 8388608ULL, ombr_fs_op(12, 5, v2, 8388607ULL)); +uint64_t v5=f0(v3, v4); +return ombr_fs_op(13, 5, v1, v5); +} +return v1; +} +uint32_t omega_native_f16(uint64_t *result, uint64_t p0){ +if(!result || (uintptr_t)result%_Alignof(uint64_t) || (uintptr_t)result>UINTPTR_MAX-sizeof(uint64_t))return 32; +if(!ombr_fs_valid(5, p0))return 32; +*result=f1(p0); +return 0; +} +#if defined(__GNUC__) +#pragma GCC diagnostic pop +#endif diff --git a/tests/ampere/.crumb b/tests/ampere/.crumb index 60b07e0e..ec696c94 100644 --- a/tests/ampere/.crumb +++ b/tests/ampere/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T17:55:27Z", + "compiled_at": "2026-10-28T19:58:29Z", "compiler": "crumb-compile/1", - "digest": "sha256:1727642b7e2f3553b02d7a6856836d9d2861d5461443033d05f1aeade30e7a51", + "digest": "sha256:2e513b4df7955e4aa901342e5617fb4c0e0ea17364918e33ce1f80b693cf1eec", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "files": 7, - "generated_at_commit": "2e6bf8c716a2ad3a0835e4354e166482ca631dfd", - "source_tree": "sha256:e5759f07067515cefb5d8522d0710a501b924604141eece303f56f9e2fb9934e" + "files": 9, + "generated_at_commit": "067815f8580206f1bbccd7fa302c1ac354029910", + "source_tree": "sha256:075983713c0598e1e3d6234c31a1e82b73a19617ff7332420a7acdcf135b0f02" } }, "layer": "tests", diff --git a/tests/ampere/f16_fixture.om b/tests/ampere/f16_fixture.om new file mode 100644 index 00000000..b4ae577f --- /dev/null +++ b/tests/ampere/f16_fixture.om @@ -0,0 +1,140 @@ +note SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +note Dedicated behavior fixture for native_f16 scalar binary32 to binary16 RNE conversion. + +fn f16_sub exp ulong m ulong to ulong +if eq exp 112 +lsb = and shr m 14 1 +r = add add m 8191 lsb +ret shr r 14 +end +if eq exp 111 +lsb = and shr m 15 1 +r = add add m 16383 lsb +ret shr r 15 +end +if eq exp 110 +lsb = and shr m 16 1 +r = add add m 32767 lsb +ret shr r 16 +end +if eq exp 109 +lsb = and shr m 17 1 +r = add add m 65535 lsb +ret shr r 17 +end +if eq exp 108 +lsb = and shr m 18 1 +r = add add m 131071 lsb +ret shr r 18 +end +if eq exp 107 +lsb = and shr m 19 1 +r = add add m 262143 lsb +ret shr r 19 +end +if eq exp 106 +lsb = and shr m 20 1 +r = add add m 524287 lsb +ret shr r 20 +end +if eq exp 105 +lsb = and shr m 21 1 +r = add add m 1048575 lsb +ret shr r 21 +end +if eq exp 104 +lsb = and shr m 22 1 +r = add add m 2097151 lsb +ret shr r 22 +end +if eq exp 103 +lsb = and shr m 23 1 +r = add add m 4194303 lsb +ret shr r 23 +end +if eq exp 102 +lsb = and shr m 24 1 +r = add add m 8388607 lsb +ret shr r 24 +end +ret 0 +end + +fn native_f16 bits ulong to ulong +sign = and shr bits 16 32768 +u = and bits 2147483647 +if ge u 2139095040 +if gt u 2139095040 +payload = and shr u 13 1023 +res = or 32256 payload +ret or sign res +end +ret or sign 31744 +end +if ge u 1199566848 +ret or sign 31744 +end +if ge u 947912704 +lsb = and shr u 13 1 +rounded = add add u 4095 lsb +val = sub rounded 939524096 +ret or sign shr val 13 +end +if gt u 855638016 +exp = shr u 23 +m = or 8388608 and u 8388607 +res = f16_sub exp m +ret or sign res +end +ret sign +end + +fn check eq_val ulong exp_val ulong to ulong +if ne eq_val exp_val +ret 1 +end +ret 0 +end + +fn main to int +fails = ulong 0 + +note Zero +fails = add fails check native_f16 0 0 +fails = add fails check native_f16 2147483648 32768 +note Subnormal boundary and underflow +fails = add fails check native_f16 855638016 0 +fails = add fails check native_f16 855638017 1 +fails = add fails check native_f16 947904511 1023 +fails = add fails check native_f16 947904512 1024 +fails = add fails check native_f16 947912703 1024 + +note Normal min and 1.0f +fails = add fails check native_f16 947912704 1024 +fails = add fails check native_f16 1065353216 15360 + +note RNE ties to even +fails = add fails check native_f16 1065357312 15360 +fails = add fails check native_f16 1065365504 15362 + +note Normal max and overflow boundary +fails = add fails check native_f16 1199562752 31743 +fails = add fails check native_f16 1199566847 31743 +fails = add fails check native_f16 1199566848 31744 +fails = add fails check native_f16 3347050496 64512 + +note Infinities +fails = add fails check native_f16 2139095040 31744 +fails = add fails check native_f16 4286578688 64512 + +note NaNs +fails = add fails check native_f16 2143289344 32256 +fails = add fails check native_f16 2139095041 32256 +fails = add fails check native_f16 4290773024 65024 +fails = add fails check native_f16 2147483647 32767 + +if ne fails 0 +ret 1 +end +ret 0 +end diff --git a/tests/ampere/test_f16_behavior.c b/tests/ampere/test_f16_behavior.c new file mode 100644 index 00000000..0cbea995 --- /dev/null +++ b/tests/ampere/test_f16_behavior.c @@ -0,0 +1,186 @@ +/* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ +/* Dedicated boundary, native sweep, and negative mutant controls for scalar f16. */ + +#include +#include +#include +#include + +extern uint32_t omega_native_f16(uint64_t *result, uint64_t p0); + +static uint16_t native_reference(uint32_t u) { + float f; + memcpy(&f, &u, 4); + _Float16 h = (_Float16)f; + uint16_t r; + memcpy(&r, &h, 2); + return r; +} + +/* Mutant 1: Truncation towards zero (omits +4095/lsb rounding) */ +static uint16_t mutant_truncate(uint32_t u) { + uint32_t sign = (u >> 16) & 0x8000u; + uint32_t abs_u = u & 0x7fffffffu; + if (abs_u >= 0x7f800000u) { + if (abs_u > 0x7f800000u) return (uint16_t)(sign | 0x7e00u | ((abs_u >> 13) & 0x03ffu)); + return (uint16_t)(sign | 0x7c00u); + } + if (abs_u >= 0x47800000u) return (uint16_t)(sign | 0x7c00u); + if (abs_u >= 0x38800000u) { + uint32_t val = abs_u - 0x38000000u; + return (uint16_t)(sign | (val >> 13)); + } + return (uint16_t)sign; +} + +/* Mutant 2: Round ties to away/odd instead of even (lsb bit ignored) */ +static uint16_t mutant_no_tie_even(uint32_t u) { + uint32_t sign = (u >> 16) & 0x8000u; + uint32_t abs_u = u & 0x7fffffffu; + if (abs_u >= 0x7f800000u) return (uint16_t)(sign | 0x7e00u); + if (abs_u >= 0x477ff000u) return (uint16_t)(sign | 0x7c00u); + if (abs_u >= 0x38800000u) { + uint32_t val = (abs_u + 0x1000u) - 0x38000000u; + return (uint16_t)(sign | (val >> 13)); + } + return (uint16_t)sign; +} + +/* Mutant 3: Overflow threshold off by 1 (0x477ff001 instead of 0x477ff000) */ +static uint16_t mutant_bad_overflow_threshold(uint32_t u) { + uint32_t sign = (u >> 16) & 0x8000u; + uint32_t abs_u = u & 0x7fffffffu; + if (abs_u >= 0x7f800000u) return (uint16_t)(sign | 0x7e00u); + if (abs_u > 0x477ff000u) return (uint16_t)(sign | 0x7c00u); + if (abs_u >= 0x38800000u) { + uint32_t lsb = (abs_u >> 13) & 1u; + uint32_t rounded = abs_u + 0x0fffu + lsb; + uint32_t val = rounded - 0x38000000u; + return (uint16_t)(sign | (val >> 13)); + } + return (uint16_t)sign; +} + +/* Mutant 4: Subnormal shift/bias off by 1 */ +static uint16_t mutant_bad_subnormal(uint32_t u) { + uint32_t sign = (u >> 16) & 0x8000u; + uint32_t abs_u = u & 0x7fffffffu; + if (abs_u >= 0x38800000u) { + uint64_t res = 0; + omega_native_f16(&res, u); + return (uint16_t)res; + } + return (uint16_t)(sign | 0x0002u); /* corrupted subnormal */ +} + +/* Mutant 5: NaN quiet bit omitted */ +static uint16_t mutant_nan_no_quiet(uint32_t u) { + uint32_t sign = (u >> 16) & 0x8000u; + uint32_t abs_u = u & 0x7fffffffu; + if (abs_u > 0x7f800000u) { + return (uint16_t)(sign | 0x7c00u | ((abs_u >> 13) & 0x01ffu)); /* bit 9 (0x0200) missing */ + } + uint64_t res = 0; + omega_native_f16(&res, u); + return (uint16_t)res; +} + +/* Mutant 6: Sign bit ignored / zeroed */ +static uint16_t mutant_ignore_sign(uint32_t u) { + uint64_t res = 0; + omega_native_f16(&res, u & 0x7fffffffu); + return (uint16_t)res; +} + +int main(void) { + /* 1. Boundary table verification */ + struct { + uint32_t u; + uint16_t expected; + const char *desc; + } boundaries[] = { + {0x00000000u, 0x0000u, "+0.0"}, + {0x80000000u, 0x8000u, "-0.0"}, + {0x33000000u, 0x0000u, "underflow cutoff"}, + {0x33000001u, 0x0001u, "min subnormal"}, + {0x387fdfffu, 0x03ffu, "max subnormal (below round-to-normal)"}, + {0x387fe000u, 0x0400u, "subnormal round up to min normal"}, + {0x387fffffu, 0x0400u, "subnormal top round to min normal"}, + {0x38800000u, 0x0400u, "min normal"}, + {0x3f800000u, 0x3c00u, "1.0f"}, + {0x3f801000u, 0x3c00u, "RNE tie down to even"}, + {0x3f803000u, 0x3c02u, "RNE tie up to even"}, + {0x477fe000u, 0x7bffu, "max normal"}, + {0x477fefffu, 0x7bffu, "max normal below overflow"}, + {0x477ff000u, 0x7c00u, "+overflow to +inf"}, + {0xc77ff000u, 0xfc00u, "-overflow to -inf"}, + {0x7f800000u, 0x7c00u, "+inf"}, + {0xff800000u, 0xfc00u, "-inf"}, + {0x7fc00000u, 0x7e00u, "canonical qNaN"}, + {0x7f800001u, 0x7e00u, "sNaN made quiet"}, + {0xffc00000u, 0xfe00u, "-qNaN"}, + {0x7fffffffu, 0x7fffu, "NaN payload preservation"}, + }; + + for (size_t i = 0; i < sizeof(boundaries)/sizeof(boundaries[0]); i++) { + uint64_t res = 0; + uint32_t rc = omega_native_f16(&res, boundaries[i].u); + if (rc != 0) { + fprintf(stderr, "FAIL: %s: rc %u != 0\n", boundaries[i].desc, rc); + return 1; + } + if ((uint16_t)res != boundaries[i].expected) { + fprintf(stderr, "FAIL: %s (0x%08x): got 0x%04x, expected 0x%04x\n", + boundaries[i].desc, boundaries[i].u, (uint16_t)res, boundaries[i].expected); + return 1; + } + uint16_t ref = native_reference(boundaries[i].u); + if ((uint16_t)res != ref) { + fprintf(stderr, "FAIL: %s (0x%08x): got 0x%04x, native ref 0x%04x\n", + boundaries[i].desc, boundaries[i].u, (uint16_t)res, ref); + return 1; + } + } + + /* 2. Negative mutant controls */ + int mutant1_caught = 0; + int mutant2_caught = 0; + int mutant3_caught = 0; + int mutant4_caught = 0; + int mutant5_caught = 0; + int mutant6_caught = 0; + + for (size_t i = 0; i < sizeof(boundaries)/sizeof(boundaries[0]); i++) { + uint32_t u = boundaries[i].u; + uint16_t exp = boundaries[i].expected; + if (mutant_truncate(u) != exp) mutant1_caught++; + if (mutant_no_tie_even(u) != exp) mutant2_caught++; + if (mutant_bad_overflow_threshold(u) != exp) mutant3_caught++; + if (mutant_bad_subnormal(u) != exp) mutant4_caught++; + if (mutant_nan_no_quiet(u) != exp) mutant5_caught++; + if (mutant_ignore_sign(u) != exp) mutant6_caught++; + } + + if (!mutant1_caught) { fprintf(stderr, "FAIL: mutant1 (truncate) not caught\n"); return 1; } + if (!mutant2_caught) { fprintf(stderr, "FAIL: mutant2 (no tie even) not caught\n"); return 1; } + if (!mutant3_caught) { fprintf(stderr, "FAIL: mutant3 (bad overflow threshold) not caught\n"); return 1; } + if (!mutant4_caught) { fprintf(stderr, "FAIL: mutant4 (bad subnormal) not caught\n"); return 1; } + if (!mutant5_caught) { fprintf(stderr, "FAIL: mutant5 (nan no quiet) not caught\n"); return 1; } + if (!mutant6_caught) { fprintf(stderr, "FAIL: mutant6 (ignore sign) not caught\n"); return 1; } + + /* 3. Comprehensive stepped sweep across 2^32 inputs against native _Float16 */ + uint64_t diffs = 0; + for (uint64_t i = 0; i < 0x100000000ull; i += 97) { + uint32_t u = (uint32_t)i; + uint64_t res = 0; + omega_native_f16(&res, u); + uint16_t ref = native_reference(u); + if ((uint16_t)res != ref) { + fprintf(stderr, "Diff at 0x%08x: res 0x%04x != ref 0x%04x\n", u, (uint16_t)res, ref); + if (++diffs > 10) return 1; + } + } + + puts("F16 BEHAVIOR CONTROLS PASS (all boundaries, native sweep, and negative mutants verified)"); + return 0; +} diff --git a/tests/moe/.crumb b/tests/moe/.crumb index 6dfd3dae..f5dab603 100644 --- a/tests/moe/.crumb +++ b/tests/moe/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-28T12:16:22Z", + "compiled_at": "2026-10-28T19:58:29Z", "compiler": "crumb-compile/1", - "digest": "sha256:f5236b5fc39629c6c5052d69fcb7de066ab1a5f2d9c28e63d36510fa919db75b", + "digest": "sha256:e571fb2e12c1d3698d1fa5cfc8402ff2909ccb05f3d2f331ae7a5acda2a80121", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "files": 6, - "generated_at_commit": "018fd1a7ef819e6f21775c637be27100c3fe7562", - "source_tree": "sha256:1a7bfa66193411b2203408935a354bc6c1a98c55eb3a43df28e8a284c07aecf1" + "generated_at_commit": "067815f8580206f1bbccd7fa302c1ac354029910", + "source_tree": "sha256:eeb0323428b2b38a5ddcd6c760532be91f7839244062030dfb4fec4321a137e0" } }, "name": "moevf", From 7b06a7542017dc0987f1bdbd3c13992ec0baa46c Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 15:01:54 -0500 Subject: [PATCH 14/21] Keep x86 freestanding half conversion in portable Omega with pinned provenance oracle --- .github/workflows/ampere-x86.yml | 86 +++++++++++++++++++++++++++++++- Makefile | 4 +- docs/PORT-AMPERE.md | 19 ++++++- mk/ampere-cubin.mk | 9 ++++ mk/omega-gpu-engine.mk | 4 +- om/omega-bridge.lock | 2 +- om/units.sh | 6 +-- src/cudapp_freest_epoch.c | 2 +- src/cudapp_freest_revision.c | 2 +- src/cudapp_native.h | 1 + src/cudapp_om_epoch.ident | 2 +- src/cudapp_om_f16.ident | 1 + src/cudapp_om_revision.ident | 2 +- src/cudapp_om_units.ident | 5 +- src/omega_blackwell_matmul.c | 13 +++++ 15 files changed, 141 insertions(+), 17 deletions(-) create mode 100644 src/cudapp_om_f16.ident diff --git a/.github/workflows/ampere-x86.yml b/.github/workflows/ampere-x86.yml index fc3c1858..e2d4cfd4 100644 --- a/.github/workflows/ampere-x86.yml +++ b/.github/workflows/ampere-x86.yml @@ -1,6 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -# Native x86 execution of the checked Omega-to-C units; no ARM emulation, -# CUDA runtime, driver submission or GPU qualification. +# Native x86 execution of checked Omega-to-C units. Only pinned AArch64 +# compiler/converter provenance runs under QEMU; no driver submission or GPU. name: Ampere native x86 host on: pull_request: @@ -10,13 +10,34 @@ on: permissions: contents: read jobs: + provenance-baseline: + runs-on: ubuntu-24.04-arm + timeout-minutes: 20 + steps: + - uses: actions/checkout@11d5960a326750d5838078e36cf38b85af677262 + with: + persist-credentials: false + - name: Source-bootstrap exact baseline on AArch64 + run: | + git clone -q https://github.com/aien-dev/omega-bridge "$RUNNER_TEMP/omega-bridge" + git -C "$RUNNER_TEMP/omega-bridge" checkout -q "$(grep -v '^#' om/omega-bridge.lock)" + (cd "$RUNNER_TEMP/omega-bridge" && sh tools/bootstrap.sh) + cp "$RUNNER_TEMP/omega-bridge/build/bootstrap/omc" "$RUNNER_TEMP/baseline-omc" + printf '%s %s\n' 191b776ef98821597c3e30655da6d680a9b66edbc9ceaca3c39c61ea6df098e9 "$RUNNER_TEMP/baseline-omc" | sha256sum --check --strict + - uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 + with: + name: ampere-baseline-${{ github.sha }} + path: ${{ runner.temp }}/baseline-omc + retention-days: 7 native-x86-host: + needs: provenance-baseline runs-on: ubuntu-24.04 timeout-minutes: 40 steps: - uses: actions/checkout@11d5960a326750d5838078e36cf38b85af677262 # v4.4.0 with: persist-credentials: false + fetch-depth: 0 # Immutable original blobs are required by portable_receipts. - name: Native scalar numeric portability (no bridge or GPU) run: make test-ampere-numeric-host - name: Pinned offline x86 instruction oracle @@ -35,10 +56,71 @@ jobs: printf '%s\n' /usr/local/cuda/bin >> "$GITHUB_PATH" git clone -q https://github.com/aien-dev/omega-bridge "$RUNNER_TEMP/omega-bridge" git -C "$RUNNER_TEMP/omega-bridge" checkout -q "$(grep -v '^#' om/omega-bridge.lock)" + - uses: actions/download-artifact@d3f86a106a0bac45b974a628896c90dbdf5c8093 + with: + name: ampere-baseline-${{ github.sha }} + path: ${{ runner.temp }}/baseline + - name: EMULATED provenance oracle, NATIVE x86 consumers + # Bare ARM compiler/converter/checker executions are required by the + # unchanged gate. Register only AArch64 ELF, only on this disposable VM. + # QEMU is a verification oracle, never linked into shipped artifacts. + env: + OMEGA_SEED: ${{ runner.temp }}/baseline/baseline-omc + run: | + package=qemu-user-static_8.2.2+ds-0ubuntu1.19_amd64.deb + curl --fail --location --silent --show-error --proto '=https' --tlsv1.2 \ + "https://archive.ubuntu.com/ubuntu/pool/universe/q/qemu/$package" \ + --output "$RUNNER_TEMP/$package" + printf '%s %s\n' ec80ee896fe8f57f7420f4d4076164cb0fa613df6848568cdf5d1a2dbe2347cb "$RUNNER_TEMP/$package" | sha256sum --check --strict + mkdir -p "$RUNNER_TEMP/qemu" + dpkg-deb --fsys-tarfile "$RUNNER_TEMP/$package" | tar -x -C "$RUNNER_TEMP/qemu" \ + ./usr/bin/qemu-aarch64-static ./usr/lib/binfmt.d/qemu-aarch64.conf + printf '%s %s\n' 1152646a17920a81c618d62574ee8ae8b63243349957095d40212c2245f20aab "$RUNNER_TEMP/qemu/usr/bin/qemu-aarch64-static" | sha256sum --check --strict + interpreter="$RUNNER_TEMP/qemu/aarch64-binfmt-P" + ln -s "$RUNNER_TEMP/qemu/usr/bin/qemu-aarch64-static" "$interpreter" + "$RUNNER_TEMP/qemu/usr/bin/qemu-aarch64-static" --version + line=$(cat "$RUNNER_TEMP/qemu/usr/lib/binfmt.d/qemu-aarch64.conf") + packaged_interpreter=/usr/libexec/qemu-binfmt/aarch64-binfmt-P + line=${line/"$packaged_interpreter"/"$interpreter"} + printf '%s\n' "${line/:qemu-aarch64:/:cudapp-seed-aarch64:}" | sudo tee /proc/sys/fs/binfmt_misc/register + handler=/proc/sys/fs/binfmt_misc/cudapp-seed-aarch64 + cat "$handler" + grep -Fx 'enabled' "$handler" + grep -Fx "interpreter $interpreter" "$handler" + grep -Fx 'flags: POF' "$handler" + grep -Fx 'offset 0' "$handler" + grep -Fx 'magic 7f454c460201010000000000000000000200b700' "$handler" + grep -Fx 'mask ffffffffffffff00fffffffffffffffffeffffff' "$handler" + printf '%s %s\n' 191b776ef98821597c3e30655da6d680a9b66edbc9ceaca3c39c61ea6df098e9 "$OMEGA_SEED" | sha256sum --check --strict + chmod +x "$OMEGA_SEED" + git clone -q https://github.com/aien-dev/omega-mv "$RUNNER_TEMP/omega-mv" + git -C "$RUNNER_TEMP/omega-mv" checkout -q e5b32567a7aff3ce594e3254a622a846a6cd190b + printf '%s %s\n' 2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f "$RUNNER_TEMP/omega-mv/seed/out/omc" | sha256sum --check --strict + (cd "$RUNNER_TEMP/omega-bridge" && sh tools/build.sh) + { + echo "OMEGA_SEED=$OMEGA_SEED" + echo "OMEGA_OMC=$RUNNER_TEMP/omega-mv/seed/out/omc" + echo "OMEGA_MV=$RUNNER_TEMP/omega-mv" + echo "OMEGA_BRIDGE=$RUNNER_TEMP/omega-bridge" + echo "OMEGA_BRIDGE_DIR=$RUNNER_TEMP/omega-bridge" + } >> "$GITHUB_ENV" - name: Native host build and tests (no GPU) env: OMEGA_BRIDGE: ${{ runner.temp }}/omega-bridge run: | make -j2 all + test "$(uname -m)" = x86_64 + make build/test_codegen_hosted build/test_codegen_freestanding build/ampere-cubin/f16-host + for consumer in build/test_codegen_hosted build/test_codegen_freestanding build/ampere-cubin/f16-host; do + LC_ALL=C readelf -h "$consumer" | grep -F 'Advanced Micro Devices X86-64' + done make test test-native-artifact zero-cuda-gate test-ampere-cubin-disasm make OUT_DIR=build-ampere-oracle CUDAPP_AMPERE_CORPUS=1 test-ampere-encoder-oracle + - name: Remove only this run's ARM provenance handler + if: always() + run: | + handler=/proc/sys/fs/binfmt_misc/cudapp-seed-aarch64 + if test -e "$handler"; then + printf '%s\n' -1 | sudo tee "$handler" + test ! -e "$handler" + fi diff --git a/Makefile b/Makefile index 0eb33af2..548bde00 100644 --- a/Makefile +++ b/Makefile @@ -26,7 +26,7 @@ CFLAGS ?= -std=gnu11 -Wall -Wextra -Werror -MMD -MP -D_GNU_SOURCE -O2 -Isrc \ -I$(NVIDIA_OPEN)/src/nvidia/arch/nvalloc/unix/include # Portable checked Omega-to-C output; each unit has a separate private runtime namespace. CUDAPP_OM_HOSTED_SRCS = $(wildcard src/cudapp_om_*.c) -CUDAPP_OM_FREEST_SRCS = src/cudapp_freest_revision.c src/cudapp_freest_epoch.c +CUDAPP_OM_FREEST_SRCS = src/cudapp_freest_revision.c src/cudapp_freest_epoch.c src/cudapp_freest_f16.c CUDAPP_OM_UNIT_SRCS = $(CUDAPP_OM_HOSTED_SRCS) $(CUDAPP_OM_FREEST_SRCS) -include mk/*.mk @@ -338,7 +338,7 @@ HOST_TESTS = test-gpu-matmul-api test-gpu-elementwise test-gpu-reconv test-gpu-a test-codegen-freestanding test-gpu-session-platform test-gpu-native-runtime test-gpu-wait test-gpu-wait-mutants host-tests-m16 \ test-runtime-api test-runtime-portability test-doctor test-hello-sim test-native-artifact-manifest test-gemm-selectors \ test-native-artifact zero-cuda-gate verify-vendored test-swap-cli test-om-encoder test-om-spec-encoder test-om-cubin \ - test-ampere-encoder test-ampere-cubin test-ampere-numeric-host test-ampere-runtime test-ampere-plan test-portable-receipts $(CARRIED_HOST_TESTS) + test-ampere-encoder test-ampere-cubin test-ampere-numeric-host test-ampere-f16-host test-ampere-runtime test-ampere-plan test-portable-receipts $(CARRIED_HOST_TESTS) test: $(HOST_TESTS) @echo "CUDA++ HOST TESTS PASS ($(words $(HOST_TESTS)) targets)" diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index 3a6e4cb2..20c5135a 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -51,7 +51,7 @@ Blackwell header. | Safe reserve refusal proof | DONE | `tests/ampere/memory_refusal.c:39` sets reserve above total VRAM (therefore above free VRAM even if other processes release memory), then requests only a small allocation. It requires refusal, zero intervening RM allocation ioctls and unchanged free VRAM. Simulated-driver coverage is separate from this real-device test. It never pressure-allocates VRAM. | | Open-module and device selection doctor | DONE | `tests/ampere/doctor.py:79` verifies Linux x86_64, the exact pinned open module, requested PCI IDs, device nodes and an unambiguous BDF. `CUDAPP_GPU_BDF` selects that exact GPU in the driver client. `test_doctor.py` uses a fake filesystem and is always SIMULATED. No driver is opened by the doctor. | | Portable Omega build provenance | IMPLEMENTED | `om/units.sh` covers all canonical hosted roots plus Ampere encoding/runtime and the separate revision/epoch freestanding profile. Checked portable generated translation units replace executable-code trampolines. `om/omega-bridge.lock`, per-unit identities and generated declarations retain exact composed-source SHA → C SHA provenance. Missing/mismatched converter, profile or seed refuses before installation. Final host acceptance is recorded separately below. | -| Native x86_64 host build | IMPLEMENTED | `.github/workflows/ampere-x86.yml` schedules a native Ubuntu x86 runner for the full host build/tests and offline oracle. Adding the job is not a successful run: current-head native CI was not observed during recovery. `src/omega_numeric.c` supplies the x86 host-reference tier; integer-defined conversions are not mislabeled as an independent oracle. Converter scalar x86 emulation is HOST_EMULATED, not whole-consumer native acceptance. | +| Native x86_64 host build | IMPLEMENTED; acceptance pending | The native run at `067815f8` executed x86 host consumers but failed the unchanged freestanding undefined-symbol gate on `__truncsfhf2` ([actual run](https://github.com/aien-dev/CUDApp/actions/runs/40753959689)). The repair uses import-free integer Omega conversion rather than weakening that gate or linking libgcc. `.github/workflows/ampere-x86.yml` separates pinned ARM provenance under QEMU from genuinely native x86 compiled-C consumers and offline oracles. `src/omega_numeric.c` is the host-reference tier; integer-defined conversions are not an independent device oracle. Converter x86 emulation alone is not whole-consumer native acceptance. | | Device test plan / runner | DONE | `tests/ampere/README.md`, `doctor.py`, `run.py`, `math_device.c`, and `memory_refusal.c` cover doctor, complete vector-add output, intentionally failing vector-add, exhaustive unary math, a numerical negative control and safe memory refusal. The runner starts each result at NOT_RUN, records real outputs and stops on failure. | | GA102 / GA104 execution and qualification | BLOCKED | No RTX device is attached or authorized here. Both device states remain NOT_RUN. Need the actual host, OS, driver version, SSH access and a GPU window before any real execution. | @@ -112,6 +112,23 @@ operations; a separately checked scalar profile supplies import-free revision and epoch without hosted trap machinery. Generated identities pin each converter, frontend and compiler, not a moving branch name. +The disposable x86 CI runner uses Ubuntu's verification-only +`qemu-user-static` package `8.2.2+ds-0ubuntu1.19`, amd64 package SHA256 +`ec80ee896fe8f57f7420f4d4076164cb0fa613df6848568cdf5d1a2dbe2347cb`, +and AArch64 interpreter SHA256 +`1152646a17920a81c618d62574ee8ae8b63243349957095d40212c2245f20aab`. +An ARM runner source-bootstraps baseline compiler +`191b776ef98821597c3e30655da6d680a9b66edbc9ceaca3c39c61ea6df098e9`; +the x86 job checks that artifact and the seeded compiler before use. +Only their AArch64 ELF execution is registered, with exact magic, mask and +interpreter checks and unconditional removal of this run's handler afterward. +No Spark binfmt configuration is changed. These executions are EMULATED +provenance, not a native compiler result. Native x86 ELF consumers are built +with the runner's C compiler, checked with `readelf`, then exercised by the +unchanged acceptance targets. QEMU is neither linked into production nor an +implementation dependency; its intended Omega replacement is the separate +native x86 compiler, which still fails and is not assumed usable. + Experimental native x86 compiler work (#923) remains a distinct failing route, not a build, generation or acceptance prerequisite here. Portable C is generated by the seeded AArch64 compiler and compiled normally for the selected host. diff --git a/mk/ampere-cubin.mk b/mk/ampere-cubin.mk index ce9acdb2..dae39c21 100644 --- a/mk/ampere-cubin.mk +++ b/mk/ampere-cubin.mk @@ -33,3 +33,12 @@ $(AMPERE_CUBIN_DIR)/numeric-host: tests/ampere_numeric_host_test.c src/omega_num test-ampere-numeric-host: $(AMPERE_CUBIN_DIR)/numeric-host $(AMPERE_CUBIN_DIR)/numeric-host + +# The native floating cast is an independent verification oracle only. +.PHONY: test-ampere-f16-host +$(AMPERE_CUBIN_DIR)/f16-host: tests/ampere/test_f16_behavior.c src/cudapp_freest_f16.c + @mkdir -p $(AMPERE_CUBIN_DIR) + $(CC) $(CFLAGS) -O3 -o $@ tests/ampere/test_f16_behavior.c src/cudapp_freest_f16.c + +test-ampere-f16-host: $(AMPERE_CUBIN_DIR)/f16-host + $(AMPERE_CUBIN_DIR)/f16-host diff --git a/mk/omega-gpu-engine.mk b/mk/omega-gpu-engine.mk index bd2d3402..226f804d 100644 --- a/mk/omega-gpu-engine.mk +++ b/mk/omega-gpu-engine.mk @@ -132,7 +132,7 @@ GPU_FS_SRCS = src/omega_gpu_engine.c src/omega_gpu_platform.c src/omega_blackwel src/omega_gpu_serving.c src/omega_gpu_wait.c $(CUDAPP_OM_FREEST_SRCS) GPU_FS_HDRS = src/omega_gpu_engine.h src/omega_gpu_platform.h src/omega_blackwell_codegen.h src/omega_blackwell_matmul.h \ src/omega_gpu_session.h src/omega_gpu_fmt.h src/omega_gpu_matmul_api.h src/omega_gpu_attention_api.h \ - src/omega_gpu_serving.h src/omega_gpu_wait.h + src/omega_gpu_serving.h src/omega_gpu_wait.h src/cudapp_native.h GPU_FS_OBJS = $(patsubst src/%.c,$(GPU_FS_DIR)/%.o,$(GPU_FS_SRCS)) GPU_FS_LINK = $(GPU_FS_DIR)/omega_gpu_freestanding.o GPU_FS_ALLOWED = memcpy|memmove|memset|memcmp|strlen|strcmp @@ -178,7 +178,7 @@ build/test_codegen_hosted: $(CODEGEN_FS_TEST_DEPS) src/omega_blackwell_codegen.c build/test_codegen_freestanding: $(CODEGEN_FS_TEST_DEPS) $(GPU_FS_LINK) @mkdir -p build gcc -std=gnu11 -O2 -Wall -Wextra -Werror -Isrc -DOMEGA_GPU_NO_POSIX -o $@ tests/test_omega_codegen_freestanding.c \ - $(GPU_FS_DIR)/omega_blackwell_codegen.o $(GPU_FS_DIR)/omega_blackwell_matmul.o $(GPU_FS_DIR)/sha256.o + $(GPU_FS_DIR)/omega_blackwell_codegen.o $(GPU_FS_DIR)/omega_blackwell_matmul.o $(GPU_FS_DIR)/sha256.o $(GPU_FS_DIR)/cudapp_freest_f16.o test-codegen-freestanding: build/test_codegen_hosted build/test_codegen_freestanding test-gpu-fs-allowlist-control ./build/test_codegen_hosted --dump > build/codegen_dump_hosted.txt ./build/test_codegen_freestanding --dump > build/codegen_dump_freestanding.txt diff --git a/om/omega-bridge.lock b/om/omega-bridge.lock index 1d15a57c..b2b6bd98 100644 --- a/om/omega-bridge.lock +++ b/om/omega-bridge.lock @@ -1,3 +1,3 @@ # Checked portable hosted and import-free scalar Omega converters. # Draft omega-bridge#36; exact source and frontend hashes checked by om/units.sh. -cb492a76348546dc1ffe5857492e0796cfcec232 +ead98302ff0a649c49c3f2c7568af5e1b3da33eb diff --git a/om/units.sh b/om/units.sh index 9ddc7ce5..dfee1167 100755 --- a/om/units.sh +++ b/om/units.sh @@ -6,7 +6,7 @@ set -eu OMC_PIN=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f CONVERTER_PIN=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 FRONTEND_PIN=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 -FREEST_CONVERTER_PIN=6e4f5099713d437229d890f1870908dcdf7c6bbb1ae2c52aae01170c57a0fd98 +FREEST_CONVERTER_PIN=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 FREEST_FRONTEND_PIN=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d ROOT=$(cd "$(dirname "$0")/.." && pwd) QUANT=om/quant/quant.om @@ -19,7 +19,7 @@ MOE="om/moe/moe_plan.om om/moe/moe_group.om om/moe/moe_ids32.om om/moe/moe_maps3 CLOSURE="$REAL,om/cache/digest.om,om/moe/moe_windows.om,om/moe/moe_group.om,native/learn53/moe-closure.om" OBSERVE="closure_code=$CLOSURE,om/moe/closure_code.om closure_launch=$CLOSURE,om/moe/closure_launch.om closure_dir=$CLOSURE,om/moe/closure_dir.om closure_alloc=$CLOSURE,om/moe/closure_alloc.om closure_series=$CLOSURE,om/moe/closure_series.om" UNITS="${OMEGA_UNITS:-om/encoder/bw_enc_sm121.om om/cubin/cubin_elf.om om/encoder/ampere_enc_sm86.om om/encoder/amp_runtime.om repack=$QUANT,om/quant/repack.om quant_wire=$QUANT,om/quant/runtime.om compose=$COMP encode=$ENC cache_runtime=om/cache/residency.om,om/cache/runtime.om lease=om/cache/residency.om,om/cache/runtime.om,om/cache/lease.om slotrev=om/cache/residency.om,om/cache/slotrev.om command=om/cache/residency.om,om/cache/command.om validate=$CACHE,$COMP,$ENC,om/components/admit.om,om/cache/validate.om digest=$REAL,om/cache/digest.om,om/cache/key.om code_digest=$REAL,om/cache/digest.om,om/cache/codekey.om templates=$REAL,om/cache/digest.om,om/cache/templates.om graph=$PIPE,om/pipeline/runtime.om context_lookup=om/pipeline/context.om,om/pipeline/context_abi.om binding=$REAL,om/pipeline/binding.om $MOE closure_pack=$CLOSURE,om/moe/closure_pack.om closure_bind=$CLOSURE,om/moe/closure_bind.om closure_blob=$CLOSURE,om/moe/closure_blob.om closure_cover=$CLOSURE,om/pipeline/mccover.om,om/pipeline/coverage_entry.om closure_intent=$CLOSURE,om/pipeline/mccover.om closure_seal=$CLOSURE,om/pipeline/mccover.om,om/pipeline/seal_entry.om $OBSERVE}" -PURE_UNITS="revision=om/pipeline/revision.om epoch=om/pipeline/epoch.om" +PURE_UNITS="revision=om/pipeline/revision.om epoch=om/pipeline/epoch.om f16=om/numeric/f16.om" DEST="${OMEGA_UNITS_DEST:-$ROOT/src}" OUTS="cudapp_native.h cudapp_om_units.ident" [ -n "${OMEGA_OMC:-}" ] && [ -n "${OMEGA_BRIDGE:-}" ] || { echo "NOT_RUN: set OMEGA_OMC and OMEGA_BRIDGE"; exit 3; } @@ -65,7 +65,7 @@ for u in $UNITS $PURE_UNITS; do frontend_pin=$FRONTEND_PIN file=cudapp_om_$name.c case "$name" in - revision|epoch) + revision|epoch|f16) frontend=bridge-freest converter_pin=$FREEST_CONVERTER_PIN frontend_pin=$FREEST_FRONTEND_PIN diff --git a/src/cudapp_freest_epoch.c b/src/cudapp_freest_epoch.c index 6f8e0d21..91e94fbf 100644 --- a/src/cudapp_freest_epoch.c +++ b/src/cudapp_freest_epoch.c @@ -8,7 +8,7 @@ #endif static unsigned ombr_fs_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} static int ombr_fs_valid(unsigned t,uint64_t v){unsigned w=ombr_fs_width(t);if(t<6)return w==64||v<((uint64_t)1<=UINT64_MAX-m+1;} -static uint64_t ombr_fs_op(unsigned op,unsigned t,uint64_t a,uint64_t b){unsigned w=ombr_fs_width(t);uint64_t mask=UINT64_MAX>>(64-w);if(op>=6&&op<=11){uint64_t x=a,y=b;if(t>=6){x^=(uint64_t)1<<63;y^=(uint64_t)1<<63;}switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}}switch(op){case 1:return (a+b)&mask;case 2:return (a-b)&mask;case 3:return (a*b)&mask;case 12:return a&b;case 13:return a|b;case 14:return a^b;case 17:return (0-a)&mask;default:return t==1?!a:t>=6?~a:(~a)&mask;}} +static uint64_t ombr_fs_op(unsigned op,unsigned t,uint64_t a,uint64_t b){unsigned w=ombr_fs_width(t);uint64_t mask=UINT64_MAX>>(64-w);if(op>=6&&op<=11){uint64_t x=a,y=b;if(t>=6){x^=(uint64_t)1<<63;y^=(uint64_t)1<<63;}switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}}switch(op){case 1:return (a+b)&mask;case 2:return (a-b)&mask;case 3:return (a*b)&mask;case 12:return a&b;case 13:return a|b;case 14:return a^b;case 15:return (a<>b;case 17:return (0-a)&mask;default:return t==1?!a:t>=6?~a:(~a)&mask;}} static uint64_t f0(uint64_t v0); static uint64_t f0(uint64_t v0){ if(ombr_fs_op(6, 5, v0, 18446744073709551615ULL)){ diff --git a/src/cudapp_freest_revision.c b/src/cudapp_freest_revision.c index cc2a2beb..edc5ac9c 100644 --- a/src/cudapp_freest_revision.c +++ b/src/cudapp_freest_revision.c @@ -8,7 +8,7 @@ #endif static unsigned ombr_fs_width(unsigned t){static const unsigned w[]={0,1,8,16,32,64,8,16,32,64};return w[t];} static int ombr_fs_valid(unsigned t,uint64_t v){unsigned w=ombr_fs_width(t);if(t<6)return w==64||v<((uint64_t)1<=UINT64_MAX-m+1;} -static uint64_t ombr_fs_op(unsigned op,unsigned t,uint64_t a,uint64_t b){unsigned w=ombr_fs_width(t);uint64_t mask=UINT64_MAX>>(64-w);if(op>=6&&op<=11){uint64_t x=a,y=b;if(t>=6){x^=(uint64_t)1<<63;y^=(uint64_t)1<<63;}switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}}switch(op){case 1:return (a+b)&mask;case 2:return (a-b)&mask;case 3:return (a*b)&mask;case 12:return a&b;case 13:return a|b;case 14:return a^b;case 17:return (0-a)&mask;default:return t==1?!a:t>=6?~a:(~a)&mask;}} +static uint64_t ombr_fs_op(unsigned op,unsigned t,uint64_t a,uint64_t b){unsigned w=ombr_fs_width(t);uint64_t mask=UINT64_MAX>>(64-w);if(op>=6&&op<=11){uint64_t x=a,y=b;if(t>=6){x^=(uint64_t)1<<63;y^=(uint64_t)1<<63;}switch(op){case 6:return x==y;case 7:return x!=y;case 8:return xy;default:return x>=y;}}switch(op){case 1:return (a+b)&mask;case 2:return (a-b)&mask;case 3:return (a*b)&mask;case 12:return a&b;case 13:return a|b;case 14:return a^b;case 15:return (a<>b;case 17:return (0-a)&mask;default:return t==1?!a:t>=6?~a:(~a)&mask;}} static uint64_t f0(uint64_t v0); static uint64_t f0(uint64_t v0){ if(ombr_fs_op(6, 5, v0, 18446744073709551615ULL)){ diff --git a/src/cudapp_native.h b/src/cudapp_native.h index 2b1d5b8f..419d0571 100644 --- a/src/cudapp_native.h +++ b/src/cudapp_native.h @@ -50,6 +50,7 @@ uint32_t omega_native_mcalloc(uint64_t *result, const void *p0, uint64_t p0_n, c uint32_t omega_native_mcseries(uint64_t *result, const void *p0, uint64_t p0_n, const void *p1, uint64_t p1_n, const void *p2, uint64_t p2_n, void *p3, uint64_t p3_n); uint32_t omega_native_revision(uint64_t *result, uint64_t p0); uint32_t omega_native_epoch(uint64_t *result, uint64_t p0); +uint32_t omega_native_f16(uint64_t *result, uint64_t p0); #ifdef __cplusplus } #endif diff --git a/src/cudapp_om_epoch.ident b/src/cudapp_om_epoch.ident index fd120e59..6d079cca 100644 --- a/src/cudapp_om_epoch.ident +++ b/src/cudapp_om_epoch.ident @@ -1 +1 @@ -omega-ident 2 unit=epoch abi=bridge-freest src=7c11d2780ea1bed2aa899857d7cd476b4b300c7bd96825f9e36e73a50cb1b1f4 c=3ab78331952ed48aaa2f28a312a62b1e7229423b77b58faf29176b5b14ecdbfe omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=6e4f5099713d437229d890f1870908dcdf7c6bbb1ae2c52aae01170c57a0fd98 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=epoch=om/pipeline/epoch.om +omega-ident 2 unit=epoch abi=bridge-freest src=7c11d2780ea1bed2aa899857d7cd476b4b300c7bd96825f9e36e73a50cb1b1f4 c=f437139b5681cd5045c05aff9159cc34848d78b97f88e641184e909aec2a7e59 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=epoch=om/pipeline/epoch.om diff --git a/src/cudapp_om_f16.ident b/src/cudapp_om_f16.ident new file mode 100644 index 00000000..ebe20a8e --- /dev/null +++ b/src/cudapp_om_f16.ident @@ -0,0 +1 @@ +omega-ident 2 unit=f16 abi=bridge-freest src=d1525d68f507f69b801be5a29fe2d46b775ba5d1fbdd6fa5ae2fb1539048d734 c=548482f1bbd07815a573157e11a3c72a0d269ced1b12b589e3cb321f20cb2d58 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=f16=om/numeric/f16.om diff --git a/src/cudapp_om_revision.ident b/src/cudapp_om_revision.ident index bad983b7..b61f4e39 100644 --- a/src/cudapp_om_revision.ident +++ b/src/cudapp_om_revision.ident @@ -1 +1 @@ -omega-ident 2 unit=revision abi=bridge-freest src=53a0fb536fed186d2fcd2d1793eb580892f07a372292f2ca0d7d7cb1cafb9c2d c=1db7f7fde1206bff10b7d566b648e96d43ed1d54f27823099932145828c715b3 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=6e4f5099713d437229d890f1870908dcdf7c6bbb1ae2c52aae01170c57a0fd98 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=revision=om/pipeline/revision.om +omega-ident 2 unit=revision abi=bridge-freest src=53a0fb536fed186d2fcd2d1793eb580892f07a372292f2ca0d7d7cb1cafb9c2d c=951aaf9528e3a24ff8e08cf40d064c3816feb9be352b959b512bb0ae59dca718 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=revision=om/pipeline/revision.om diff --git a/src/cudapp_om_units.ident b/src/cudapp_om_units.ident index 52a2a307..acdfd476 100644 --- a/src/cudapp_om_units.ident +++ b/src/cudapp_om_units.ident @@ -35,5 +35,6 @@ omega-ident 2 unit=closure_launch abi=bridge-seeded src=52cdfcc68273ee1410bf5268 omega-ident 2 unit=closure_dir abi=bridge-seeded src=744abff597179e71cbfc63b9f23256d4cfeca09b25ab4c97a61d05a1f459a772 c=aa320abd7ee55333d9aa1dcf1580378a894aa662a9fcf8e28528d5b6b22255d9 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=closure_dir=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/moe/moe_windows.om,om/moe/moe_group.om,native/learn53/moe-closure.om,om/moe/closure_dir.om omega-ident 2 unit=closure_alloc abi=bridge-seeded src=03d54ba1cd85fe2745e53dd8b8f2698db633c2e40d6bd3cffaa282111d04be47 c=7c8c92df360be3b68490e9f6fa3ff66cecd230c4a4c3f1943c5134a80d3de60c omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=closure_alloc=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/moe/moe_windows.om,om/moe/moe_group.om,native/learn53/moe-closure.om,om/moe/closure_alloc.om omega-ident 2 unit=closure_series abi=bridge-seeded src=f58f14e2050dff8ccee6dedc11dfc92fe16d113988f2ee4d8e3d52480345ddae c=bed5ebbf32fcedc251542f42dec994af0c864a5cfc23bf422c89585c4ba46691 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=9116caab9b46e8bea1f1f3dc2752b4f2cdec0d4e266859167e6814085dd4fed3 frontend=23ff7a2356bb5d980060a4685a27ac46587013069b7d24b37c2873d7ee659b37 path=closure_series=om/quant/quant.om,om/components/realize.om,om/cache/digest.om,om/moe/moe_windows.om,om/moe/moe_group.om,native/learn53/moe-closure.om,om/moe/closure_series.om -omega-ident 2 unit=revision abi=bridge-freest src=53a0fb536fed186d2fcd2d1793eb580892f07a372292f2ca0d7d7cb1cafb9c2d c=1db7f7fde1206bff10b7d566b648e96d43ed1d54f27823099932145828c715b3 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=6e4f5099713d437229d890f1870908dcdf7c6bbb1ae2c52aae01170c57a0fd98 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=revision=om/pipeline/revision.om -omega-ident 2 unit=epoch abi=bridge-freest src=7c11d2780ea1bed2aa899857d7cd476b4b300c7bd96825f9e36e73a50cb1b1f4 c=3ab78331952ed48aaa2f28a312a62b1e7229423b77b58faf29176b5b14ecdbfe omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=6e4f5099713d437229d890f1870908dcdf7c6bbb1ae2c52aae01170c57a0fd98 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=epoch=om/pipeline/epoch.om +omega-ident 2 unit=revision abi=bridge-freest src=53a0fb536fed186d2fcd2d1793eb580892f07a372292f2ca0d7d7cb1cafb9c2d c=951aaf9528e3a24ff8e08cf40d064c3816feb9be352b959b512bb0ae59dca718 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=revision=om/pipeline/revision.om +omega-ident 2 unit=epoch abi=bridge-freest src=7c11d2780ea1bed2aa899857d7cd476b4b300c7bd96825f9e36e73a50cb1b1f4 c=f437139b5681cd5045c05aff9159cc34848d78b97f88e641184e909aec2a7e59 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=epoch=om/pipeline/epoch.om +omega-ident 2 unit=f16 abi=bridge-freest src=d1525d68f507f69b801be5a29fe2d46b775ba5d1fbdd6fa5ae2fb1539048d734 c=548482f1bbd07815a573157e11a3c72a0d269ced1b12b589e3cb321f20cb2d58 omc=2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f converter=836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661 frontend=51b41794e7001c5606b715fd7de8a34ec935a6e4e4bc1da36ad08102c009537d path=f16=om/numeric/f16.om diff --git a/src/omega_blackwell_matmul.c b/src/omega_blackwell_matmul.c index e0375f14..512446e2 100644 --- a/src/omega_blackwell_matmul.c +++ b/src/omega_blackwell_matmul.c @@ -5,6 +5,9 @@ #include #endif #include +#ifdef OMEGA_GPU_NO_POSIX +#include "cudapp_native.h" +#endif int omega_matmul_spec_init(OmegaMatMulSpec *spec, uint32_t m, uint32_t k, uint32_t n, OmegaMatMulPrecision precision) { if (!spec || m == 0 || k == 0 || n == 0) return -1; @@ -92,10 +95,20 @@ float omega_bf16_to_fp32(uint16_t b) { } uint16_t omega_fp32_to_fp16(float f) { +#ifdef OMEGA_GPU_NO_POSIX + /* The host cast can import libgcc __truncsfhf2 on x86. Keep the + * freestanding conversion in checked, import-free Omega instead. */ + uint32_t bits; + uint64_t out; + memcpy(&bits, &f, sizeof(bits)); + if (omega_native_f16(&out, bits) != OMEGA_OK) __builtin_trap(); + return (uint16_t)out; +#else _Float16 h = (_Float16)f; uint16_t u; memcpy(&u, &h, 2); return u; +#endif } uint16_t omega_fp32_to_bf16(float f) { From 2e46f5e19cfed589eb27516c659ab7823b93d0d7 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 15:07:46 -0500 Subject: [PATCH 15/21] Record final forty-root portable half host acceptance --- docs/PORT-AMPERE.md | 18 ++++-- .../recovery-portable-half-host.json | 61 +++++++++++++++++++ 2 files changed, 75 insertions(+), 4 deletions(-) create mode 100644 evidence/CUDAPP-AMPERE/recovery-portable-half-host.json diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index 20c5135a..b842338f 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -50,7 +50,7 @@ Blackwell header. | VRAM-aware D1 reserve | DONE | `nvrm/nvrm.c:637` queries the selected framebuffer heap. `src/omega_gpu_platform_linux.c:233` reads reserve policy and `:248` uses free VRAM, never host MemAvailable, for local allocations. `CUDAPP_GPU_MIN_FREE_BYTES` supports a precise safe refusal; the default MiB reserve remains documented by the runtime. The refusal precedes the driver allocation call. | | Safe reserve refusal proof | DONE | `tests/ampere/memory_refusal.c:39` sets reserve above total VRAM (therefore above free VRAM even if other processes release memory), then requests only a small allocation. It requires refusal, zero intervening RM allocation ioctls and unchanged free VRAM. Simulated-driver coverage is separate from this real-device test. It never pressure-allocates VRAM. | | Open-module and device selection doctor | DONE | `tests/ampere/doctor.py:79` verifies Linux x86_64, the exact pinned open module, requested PCI IDs, device nodes and an unambiguous BDF. `CUDAPP_GPU_BDF` selects that exact GPU in the driver client. `test_doctor.py` uses a fake filesystem and is always SIMULATED. No driver is opened by the doctor. | -| Portable Omega build provenance | IMPLEMENTED | `om/units.sh` covers all canonical hosted roots plus Ampere encoding/runtime and the separate revision/epoch freestanding profile. Checked portable generated translation units replace executable-code trampolines. `om/omega-bridge.lock`, per-unit identities and generated declarations retain exact composed-source SHA → C SHA provenance. Missing/mismatched converter, profile or seed refuses before installation. Final host acceptance is recorded separately below. | +| Portable Omega build provenance | IMPLEMENTED | `om/units.sh` covers all canonical hosted roots plus Ampere encoding/runtime and the separate revision/epoch/f16 freestanding profile. Checked portable generated translation units replace executable-code trampolines. `om/omega-bridge.lock`, per-unit identities and generated declarations retain exact composed-source SHA → C SHA provenance. Missing/mismatched converter, profile or seed refuses before installation. Final host acceptance is recorded separately below. | | Native x86_64 host build | IMPLEMENTED; acceptance pending | The native run at `067815f8` executed x86 host consumers but failed the unchanged freestanding undefined-symbol gate on `__truncsfhf2` ([actual run](https://github.com/aien-dev/CUDApp/actions/runs/40753959689)). The repair uses import-free integer Omega conversion rather than weakening that gate or linking libgcc. `.github/workflows/ampere-x86.yml` separates pinned ARM provenance under QEMU from genuinely native x86 compiled-C consumers and offline oracles. `src/omega_numeric.c` is the host-reference tier; integer-defined conversions are not an independent device oracle. Converter x86 emulation alone is not whole-consumer native acceptance. | | Device test plan / runner | DONE | `tests/ampere/README.md`, `doctor.py`, `run.py`, `math_device.c`, and `memory_refusal.c` cover doctor, complete vector-add output, intentionally failing vector-add, exhaustive unary math, a numerical negative control and safe memory refusal. The runner starts each result at NOT_RUN, records real outputs and stops on failure. | | GA102 / GA104 execution and qualification | BLOCKED | No RTX device is attached or authorized here. Both device states remain NOT_RUN. Need the actual host, OS, driver version, SSH access and a GPU window before any real execution. | @@ -108,9 +108,9 @@ selected seeded frontend uses omega e5b32567 compiler SHA-256 `2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f`. The original 191b776 frontend gate remains unchanged and required. The expanded route supports bounded canonical compositions and internal binary32 quant -operations; a separately checked scalar profile supplies import-free revision -and epoch without hosted trap machinery. Generated identities pin each -converter, frontend and compiler, not a moving branch name. +operations; a separately checked scalar profile supplies import-free revision, +epoch and binary32-to-binary16 RNE conversion without hosted trap machinery. +Generated identities pin each converter, frontend and compiler, not a moving branch name. The disposable x86 CI runner uses Ubuntu's verification-only `qemu-user-static` package `8.2.2+ds-0ubuntu1.19`, amd64 package SHA256 @@ -129,6 +129,16 @@ unchanged acceptance targets. QEMU is neither linked into production nor an implementation dependency; its intended Omega replacement is the separate native x86 compiler, which still fails and is not assumed usable. +`om/numeric/f16.om` implements the freestanding conversion; the C caller +only bitcasts the input and calls its checked scalar ABI. The hosted +`_Float16` cast remains the independent verification oracle, not production +freestanding code. `make test-ampere-f16-host` checks signed zero, +subnormals, ties-to-even, overflow, infinities and NaNs, rejects six +conversion mutants and compares a stepped raw-input sweep with that +native cast. The full host suite requires this target. The generated +unit compiles with no undefined symbols; the unchanged aggregate +freestanding allowlist continues to refuse unexpected runtime helpers. + Experimental native x86 compiler work (#923) remains a distinct failing route, not a build, generation or acceptance prerequisite here. Portable C is generated by the seeded AArch64 compiler and compiled normally for the selected host. diff --git a/evidence/CUDAPP-AMPERE/recovery-portable-half-host.json b/evidence/CUDAPP-AMPERE/recovery-portable-half-host.json new file mode 100644 index 00000000..134d2269 --- /dev/null +++ b/evidence/CUDAPP-AMPERE/recovery-portable-half-host.json @@ -0,0 +1,61 @@ +{ + "status": "EXERCISED_ARM_HOST_ONLY", + "consumer_source": "7b06a7542017dc0987f1bdbd3c13992ec0baa46c", + "bridge_source": "ead98302ff0a649c49c3f2c7568af5e1b3da33eb", + "bridge_behavior_ci": "https://github.com/aien-dev/omega-bridge/actions/runs/40758894095", + "bridge_behavior_ci_conclusion": "success", + "host_acceptance": { + "command": "make -j2 OUT_DIR=build-ampere-final OMEGA_SEED=<191b> OMEGA_OMC=<2c824> OMEGA_MV= OMEGA_BRIDGE= OMEGA_BRIDGE_DIR= all test test-native-artifact zero-cuda-gate ampere-device-build", + "exit": 0, + "targets": 58, + "raw_evidence": "artifact://1353", + "generation": "40 roots regenerate byte for byte", + "freestanding_link": "17 files; unchanged import allowlist; malloc canary refused", + "f16": "boundary/native stepped sweep/six mutant controls PASS" + }, + "pins": { + "freest_sha256": "836cbf9ef8a3c4ee82b0458070884405bc8296f83b10f933556bf27750bb3661", + "compiler_sha256": "2c82480596bbdc50cda9626866209ef662d5834f278f839ff4ce0250c495029f", + "baseline_sha256": "191b776ef98821597c3e30655da6d680a9b66edbc9ceaca3c39c61ea6df098e9" + }, + "pin_refusals": [ + { + "mutation": "compiler", + "exit": 3, + "installed_files": 0 + }, + { + "mutation": "src/toc.om", + "exit": 3, + "installed_files": 0 + }, + { + "mutation": "src/freest.om", + "exit": 3, + "installed_files": 0 + }, + { + "mutation": "tools/bridge-seeded", + "exit": 3, + "installed_files": 0 + }, + { + "mutation": "tools/bridge-freest", + "exit": 3, + "installed_files": 0 + } + ], + "x86_cross_link": { + "architecture": "Advanced Micro Devices X86-64", + "undefined": [ + "sha256_hash", + "strlen" + ], + "half_runtime_helper": "absent", + "execution": "NOT_RUN; cross-object inspection only" + }, + "native_x86_acceptance": "PENDING_CI_40759620071", + "historical_receipts": "UNCHANGED", + "native_x86_compiler_923": "FAILING_SEPARATE_NOT_A_DEPENDENCY", + "device": "NOT_RUN" +} From 592cee255eaba4b86c5a823ed071c2773a3d4f13 Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 15:21:07 -0500 Subject: [PATCH 16/21] Scope AArch64 function-byte probe to AArch64 C targets --- tools/test_bw_spec_encoder.sh | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/tools/test_bw_spec_encoder.sh b/tools/test_bw_spec_encoder.sh index 8e2d38f5..2dd16e2c 100755 --- a/tools/test_bw_spec_encoder.sh +++ b/tools/test_bw_spec_encoder.sh @@ -241,8 +241,18 @@ chmod 755 "$WORK/native-gen" { cat "$WORK/function.om"; printf '\0'; printf '%08d' "$(wc -c < "$WORK/function.bin")"; cat "$WORK/function.bin"; } > "$WORK/native.in" "$WORK/native-gen" c < "$WORK/native.in" > "$WORK/omega_native.c" "$WORK/native-gen" h < "$WORK/native.in" > "$WORK/omega_native.h" -${CC:-cc} -std=gnu11 -O2 -Wall -Wextra -Werror -DBW_SPEC_NATIVE_PROBE -I"$WORK" \ - -include "$WORK/omega_native.h" tests/bw_encode_control_test.c "$WORK/omega_native.c" -o "$WORK/native-probe" -"$WORK/native-probe" - -log "ALL SPEC-DRIVEN ENCODER/DECODER VERIFICATIONS PASSED (HOST_TESTED)!" +# The emitted wrapper calls AArch64 function bytes; other C targets use the +# portable checked units and cannot execute this native ABI probe. +target=$(${CC:-cc} -dumpmachine) +case "$target" in + aarch64-*) + ${CC:-cc} -std=gnu11 -O2 -Wall -Wextra -Werror -DBW_SPEC_NATIVE_PROBE -I"$WORK" \ + -include "$WORK/omega_native.h" tests/bw_encode_control_test.c "$WORK/omega_native.c" -o "$WORK/native-probe" + "$WORK/native-probe" + log "ALL SPEC-DRIVEN ENCODER/DECODER VERIFICATIONS PASSED (HOST_TESTED)!" + ;; + *) + log "NOT_RUN: native AArch64 function-byte probe needs an AArch64 C target (got $target)" + log "SPEC-DRIVEN ENCODER/DECODER VERIFICATIONS PASSED (HOST_TESTED); native AArch64 binding NOT_RUN" + ;; +esac From 060c018d46b2c212c0fc768a62adff846fc3d13d Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 16:56:19 -0500 Subject: [PATCH 17/21] Restrict Ampere offline fixture creation and refresh native acceptance --- docs/PORT-AMPERE.md | 13 +++++++++++++ tests/ampere_cubin_test.c | 7 ++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index b842338f..d15ed0b2 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -128,6 +128,19 @@ with the runner's C compiler, checked with `readelf`, then exercised by the unchanged acceptance targets. QEMU is neither linked into production nor an implementation dependency; its intended Omega replacement is the separate native x86 compiler, which still fails and is not assumed usable. +The native x86 consumer acceptance for source +`592cee255eaba4b86c5a823ed071c2773a3d4f13` completed successfully in +[run 40762515409](https://github.com/aien-dev/CUDApp/actions/runs/40762515409), +which checked out PR merge `6a2b759333ce791663d0107949659c7a3cd887bb`. +It reported 58 host targets, byte-identical regeneration of all 40 portable +roots, half-conversion boundary/sweep/mutant controls, the unchanged +freestanding import allowlist, and the 2169-kernel offline SM86 oracle. +The compiler/converter provenance executions remain EMULATED; the three +consumer ELF headers were checked as x86-64. Physical RTX execution remains +NOT_RUN. A separate CodeQL finding in the offline cubin fixture writer is +repaired by explicitly creating new output files with mode 0600, independent +of the caller's umask; this does not change the cubin bytes or production code. + `om/numeric/f16.om` implements the freestanding conversion; the C caller only bitcasts the input and calls its checked scalar ABI. The hosted diff --git a/tests/ampere_cubin_test.c b/tests/ampere_cubin_test.c index aa5f7f37..a36aeb1c 100644 --- a/tests/ampere_cubin_test.c +++ b/tests/ampere_cubin_test.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception */ /* Host-only ELF/container checks. No driver, libcuda or device access. */ #include "omega_cubin.h" +#include #include #include #include +#include #define CHECK(c) do { if (!(c)) { fprintf(stderr, "FAIL %s:%d: %s\n", __FILE__, __LINE__, #c); return 1; } } while (0) static uint16_t u16(const uint8_t *p) { return (uint16_t)(p[0] | (uint16_t)p[1] << 8); } @@ -66,7 +68,10 @@ int main(int argc, char **argv) { CHECK(!target_matches(image, n, 86)); /* negative control: wrong ABI */ image[8] = 7; if (argc == 2) { - FILE *f = fopen(argv[1], "wb"); + /* Keep the offline fixture private even with a permissive umask. */ + int fd = open(argv[1], O_WRONLY | O_CREAT | O_TRUNC | O_CLOEXEC, 0600); + FILE *f = fd >= 0 ? fdopen(fd, "wb") : NULL; + if (!f && fd >= 0) close(fd); CHECK(f != NULL); int wrote = fwrite(image, 1, n, f) == n; int closed = fclose(f) == 0; From 3b6ca6fda726a6b2eb01100ae155fbcb890d00af Mon Sep 17 00:00:00 2001 From: Drake Stapleton Date: Wed, 28 Oct 2026 16:58:31 -0500 Subject: [PATCH 18/21] Reconcile accepted native x86 inventory and fixture creation scope --- docs/PORT-AMPERE.md | 2 +- tests/ampere_cubin_test.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/PORT-AMPERE.md b/docs/PORT-AMPERE.md index d15ed0b2..dfa4c662 100644 --- a/docs/PORT-AMPERE.md +++ b/docs/PORT-AMPERE.md @@ -51,7 +51,7 @@ Blackwell header. | Safe reserve refusal proof | DONE | `tests/ampere/memory_refusal.c:39` sets reserve above total VRAM (therefore above free VRAM even if other processes release memory), then requests only a small allocation. It requires refusal, zero intervening RM allocation ioctls and unchanged free VRAM. Simulated-driver coverage is separate from this real-device test. It never pressure-allocates VRAM. | | Open-module and device selection doctor | DONE | `tests/ampere/doctor.py:79` verifies Linux x86_64, the exact pinned open module, requested PCI IDs, device nodes and an unambiguous BDF. `CUDAPP_GPU_BDF` selects that exact GPU in the driver client. `test_doctor.py` uses a fake filesystem and is always SIMULATED. No driver is opened by the doctor. | | Portable Omega build provenance | IMPLEMENTED | `om/units.sh` covers all canonical hosted roots plus Ampere encoding/runtime and the separate revision/epoch/f16 freestanding profile. Checked portable generated translation units replace executable-code trampolines. `om/omega-bridge.lock`, per-unit identities and generated declarations retain exact composed-source SHA → C SHA provenance. Missing/mismatched converter, profile or seed refuses before installation. Final host acceptance is recorded separately below. | -| Native x86_64 host build | IMPLEMENTED; acceptance pending | The native run at `067815f8` executed x86 host consumers but failed the unchanged freestanding undefined-symbol gate on `__truncsfhf2` ([actual run](https://github.com/aien-dev/CUDApp/actions/runs/40753959689)). The repair uses import-free integer Omega conversion rather than weakening that gate or linking libgcc. `.github/workflows/ampere-x86.yml` separates pinned ARM provenance under QEMU from genuinely native x86 compiled-C consumers and offline oracles. `src/omega_numeric.c` is the host-reference tier; integer-defined conversions are not an independent device oracle. Converter x86 emulation alone is not whole-consumer native acceptance. | +| Native x86_64 host build | EXERCISED; host only | Source `592cee255eaba4b86c5a823ed071c2773a3d4f13` passed [native consumer run 40762515409](https://github.com/aien-dev/CUDApp/actions/runs/40762515409), executing PR merge `6a2b759333ce791663d0107949659c7a3cd887bb`: 58 host targets, 40 regenerated portable roots and the 2169-kernel offline oracle. The earlier `__truncsfhf2` link failure is repaired by import-free integer Omega conversion, not by weakening the gate or linking libgcc. `.github/workflows/ampere-x86.yml` separates EMULATED pinned ARM provenance from genuinely native x86 compiled-C consumers and offline oracles. This is not native x86 Omega compiler acceptance or RTX device qualification. | | Device test plan / runner | DONE | `tests/ampere/README.md`, `doctor.py`, `run.py`, `math_device.c`, and `memory_refusal.c` cover doctor, complete vector-add output, intentionally failing vector-add, exhaustive unary math, a numerical negative control and safe memory refusal. The runner starts each result at NOT_RUN, records real outputs and stops on failure. | | GA102 / GA104 execution and qualification | BLOCKED | No RTX device is attached or authorized here. Both device states remain NOT_RUN. Need the actual host, OS, driver version, SSH access and a GPU window before any real execution. | diff --git a/tests/ampere_cubin_test.c b/tests/ampere_cubin_test.c index a36aeb1c..a42a84d4 100644 --- a/tests/ampere_cubin_test.c +++ b/tests/ampere_cubin_test.c @@ -68,7 +68,7 @@ int main(int argc, char **argv) { CHECK(!target_matches(image, n, 86)); /* negative control: wrong ABI */ image[8] = 7; if (argc == 2) { - /* Keep the offline fixture private even with a permissive umask. */ + /* Create new offline fixtures privately even with a permissive umask. */ int fd = open(argv[1], O_WRONLY | O_CREAT | O_TRUNC | O_CLOEXEC, 0600); FILE *f = fd >= 0 ? fdopen(fd, "wb") : NULL; if (!f && fd >= 0) close(fd); From efaf8d73acd13d0a54958a3487bbfbb0e1246794 Mon Sep 17 00:00:00 2001 From: aien-spark Date: Sat, 31 Oct 2026 08:44:54 -0500 Subject: [PATCH 19/21] ampere_nvdisasm: decode each distinct kernel once, concurrently Main's #984 added bw_hazard_test to sm121dis-corpus-bins, so the Ampere oracle corpus grew from 773 to 4679 pairs (3131 distinct) and the serial two-nvdisasm-calls-per-pair loop overran native-x86-host's 40-minute budget (run 41202617380 cancelled inside tools/ampere_nvdisasm.py). compare() is pure in (reference, code, ops): identical triples are decoded once and distinct ones run on a thread pool sized to the CPUs. Every pair is still checked and reported by name; the mutation controls are unchanged. --- tools/ampere_nvdisasm.py | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/tools/ampere_nvdisasm.py b/tools/ampere_nvdisasm.py index f7c40383..1e2cc184 100755 --- a/tools/ampere_nvdisasm.py +++ b/tools/ampere_nvdisasm.py @@ -5,6 +5,7 @@ NVIDIA output is ephemeral; no driver is loaded and no oracle listings committed. """ import argparse +from concurrent.futures import ThreadPoolExecutor import os from pathlib import Path import re @@ -98,6 +99,10 @@ def main(): sync_barrier_mutation = None carry_mutation = None mismatches = [] + # compare() is a pure function of (reference, code, ops); kernels that several producers + # emit identically are decoded once, and the distinct ones run concurrently (nvdisasm is + # a separate process per call). Every pair is still checked and reported by its own name. + loaded = [] for actual in pairs: prefix = str(actual)[:-len("sm86.bin")] reference = Path(prefix + "sm121.bin").read_bytes() @@ -105,13 +110,26 @@ def main(): metadata = Path(prefix + "ir").read_bytes() if len(metadata) % 8: raise RuntimeError("malformed IR metadata") + loaded.append((actual, reference, code, metadata)) + + def check(key): + reference, code, metadata = key ops = [op for op, _ in struct.iter_unpack("=II", metadata)] try: - decoded = compare(args.nvdisasm, reference, code, ops) + return compare(args.nvdisasm, reference, code, ops), None except RuntimeError as error: + return None, error + + unique = list(dict.fromkeys((reference, code, metadata) for _, reference, code, metadata in loaded)) + with ThreadPoolExecutor(max_workers=os.cpu_count() or 1) as pool: + results = dict(zip(unique, pool.map(check, unique))) + for actual, reference, code, metadata in loaded: + ops = [op for op, _ in struct.iter_unpack("=II", metadata)] + decoded, error = results[(reference, code, metadata)] + if error is not None: mismatches.append(f"{actual.name}: {error}") continue - coverage.update(op for op, _ in struct.iter_unpack("=II", metadata)) + coverage.update(ops) if mutation is None: for i, text in enumerate(decoded): if re.search(r"^(?:@!?P\d+ )?[A-Z0-9_.]+ R\d+,", text): From 570b5d6498d23cab398a2ae95a7195f8119661bd Mon Sep 17 00:00:00 2001 From: aien-spark Date: Sat, 31 Oct 2026 09:14:42 -0500 Subject: [PATCH 20/21] bw: only LDCU/LDCU64 have uniform destinations everywhere; spec probe NOT_RUN exits 3 The encoder writes a uniform register only for LDCU/LDCU64 (is_uniform on IMAD/ISETP marks a uniform source). omega_bw_ir_append and the attention and elementwise loop-invariant scans still read any is_uniform dst as uniform. They now use the encoder's rule. tests/bw_hazard_test.c test_uniform_source_dst fails 3 checks without the allocator change (GPR dst interval started at its first read, reused a live GPR, polluted the uniform interval of the same index) and passes with it. No production builder sets is_uniform on a non-LDCU op, so production kernels are unchanged (hazard sweep output identical). tools/test_bw_spec_encoder.sh: a skipped AArch64 native probe exits 3 (NOT_RUN) unless BW_SPEC_NATIVE_PROBE_NOT_RUN_OK=1; make test-om-spec-encoder sets it only on non-AArch64 hosts. --- docs/SM121_INSTRUCTION_SPEC.md | 5 +++++ mk/om-encoder.mk | 4 +++- src/omega_blackwell_codegen.c | 9 ++++++--- src/omega_gpu_attention_api.c | 3 ++- src/omega_gpu_elementwise_api.c | 3 ++- tests/bw_hazard_test.c | 36 ++++++++++++++++++++++++++++++++- tools/test_bw_spec_encoder.sh | 5 ++++- 7 files changed, 57 insertions(+), 8 deletions(-) diff --git a/docs/SM121_INSTRUCTION_SPEC.md b/docs/SM121_INSTRUCTION_SPEC.md index e17ccc27..5b51bf53 100644 --- a/docs/SM121_INSTRUCTION_SPEC.md +++ b/docs/SM121_INSTRUCTION_SPEC.md @@ -151,3 +151,8 @@ This command proves a host function binding, not physical GPU qualification or the downstream `bc_encode` consumer; that consumer requires its own native runtime fixture at its exact integrated source pin. Physical qualification is NOT_RUN. Historical audit and device receipts are not rewritten. + +The native probe executes AArch64 function bytes, so it runs only with an +AArch64 C target. Elsewhere the script prints NOT_RUN for it and exits 3, +unless `BW_SPEC_NATIVE_PROBE_NOT_RUN_OK=1` accepts that row as NOT_RUN; +`make test-om-spec-encoder` sets it on non-AArch64 hosts only. diff --git a/mk/om-encoder.mk b/mk/om-encoder.mk index 036036f8..83cce458 100644 --- a/mk/om-encoder.mk +++ b/mk/om-encoder.mk @@ -63,8 +63,10 @@ test-om-encoder-corpus: .PHONY: test-om-spec-encoder ifeq ($(CUDAPP_OMC_HOST),1) +# On a non-AArch64 host the native AArch64 function-byte probe cannot execute; the script exits 3 (NOT_RUN) for +# it unless told the row is accepted as NOT_RUN, which this target does there and the log says so. test-om-spec-encoder: - OMEGA_BRIDGE="$(OMEGA_BRIDGE)" sh tools/test_bw_spec_encoder.sh + OMEGA_BRIDGE="$(OMEGA_BRIDGE)" $(if $(CUDAPP_HOST_IS_AARCH64),,BW_SPEC_NATIVE_PROBE_NOT_RUN_OK=1) sh tools/test_bw_spec_encoder.sh else test-om-spec-encoder: @echo "test-om-spec-encoder: NOT_RUN (requires the pinned AArch64 omc and nvdisasm; set OMEGA_OMC to a pin that executes on this host; not part of the portable host suite)" diff --git a/src/omega_blackwell_codegen.c b/src/omega_blackwell_codegen.c index 62db0a0a..5c5756ac 100644 --- a/src/omega_blackwell_codegen.c +++ b/src/omega_blackwell_codegen.c @@ -98,9 +98,12 @@ int omega_bw_ir_append(BlackwellIRProgram *prog, const BlackwellIRInsn *insn) { int idx = (int)prog->count++; prog->insns[idx] = *insn; - /* Update live-interval def/use tracking */ + /* Live-interval def/use tracking. Only LDCU/LDCU64 write a uniform register (the encoder's rule, + * bw_c_encode_insn and om/encoder/bw_enc_sm121.om isuld); every other dst is a GPR, also when + * is_uniform marks a uniform SOURCE operand. */ + const bool uniform_dst = insn->op == BW_IR_LDCU || insn->op == BW_IR_LDCU64; if (insn->dst_vreg >= 0 && insn->dst_vreg < prog->regalloc.num_vregs) { - if (!insn->is_uniform) { + if (!uniform_dst) { OmegaLiveInterval *iv = &prog->regalloc.intervals[insn->dst_vreg]; if (iv->first_def < 0) iv->first_def = idx; if (idx > iv->last_use) iv->last_use = idx; @@ -123,7 +126,7 @@ int omega_bw_ir_append(BlackwellIRProgram *prog, const BlackwellIRInsn *insn) { } /* Uniform register def/use tracking */ - if (insn->is_uniform && insn->dst_vreg >= 0 && insn->dst_vreg < prog->regalloc.num_uvregs) { + if (uniform_dst && insn->dst_vreg >= 0 && insn->dst_vreg < prog->regalloc.num_uvregs) { OmegaLiveInterval *uiv = &prog->regalloc.uintervals[insn->dst_vreg]; if (uiv->first_def < 0) uiv->first_def = idx; if (idx > uiv->last_use) uiv->last_use = idx; diff --git a/src/omega_gpu_attention_api.c b/src/omega_gpu_attention_api.c index 7f048ada..5fd1673e 100644 --- a/src/omega_gpu_attention_api.c +++ b/src/omega_gpu_attention_api.c @@ -230,7 +230,8 @@ static int check_loop_invariant(const Em *e) { for (size_t i = (size_t)e->loop_end[L] + 1; i < e->p->count; i++) { const BlackwellIRInsn *in = &e->p->insns[i]; if (in->src1_vreg == v || in->src2_vreg == v || in->src3_vreg == v) return -1; - if (in->dst_vreg == v && !in->is_uniform) break; + /* only LDCU/LDCU64 write a uniform register; any other dst (also a uniform-source IMAD) is GPR v */ + if (in->dst_vreg == v && in->op != BW_IR_LDCU && in->op != BW_IR_LDCU64) break; } } return 0; diff --git a/src/omega_gpu_elementwise_api.c b/src/omega_gpu_elementwise_api.c index 6877c864..26a16c39 100644 --- a/src/omega_gpu_elementwise_api.c +++ b/src/omega_gpu_elementwise_api.c @@ -753,7 +753,8 @@ static int check_loop_invariant(const Em *e) { for (size_t i = (size_t)e->loop_end[L] + 1; i < e->p->count; i++) { const BlackwellIRInsn *in = &e->p->insns[i]; if (in->src1_vreg == v || in->src2_vreg == v || in->src3_vreg == v) return -1; - if (in->dst_vreg == v && !in->is_uniform) break; + /* only LDCU/LDCU64 write a uniform register; any other dst (also a uniform-source IMAD) is GPR v */ + if (in->dst_vreg == v && in->op != BW_IR_LDCU && in->op != BW_IR_LDCU64) break; } } return 0; diff --git a/tests/bw_hazard_test.c b/tests/bw_hazard_test.c index e052b090..09af4f2a 100644 --- a/tests/bw_hazard_test.c +++ b/tests/bw_hazard_test.c @@ -6,7 +6,8 @@ * R22/R23 at IR 88/89; the same kernel after the encoder fix passes; the fixed kernel with the one lost wait * cleared fails again; * 3. negative controls: small encoded programs with one hazard each are caught, the same programs with the wait - * in place pass, and an undecodable word is "not checked", never clean; + * in place pass, and an undecodable word is "not checked", never clean; the allocator gives a uniform-source + * IMAD's destination a GPR live from the IMAD (only LDCU/LDCU64 write a uniform register); * 4. sweep: every generator over its accepted shapes (production kernels, mutant 0), encoded and patched as the * launchers do; every finding is printed and must be on the triaged list below. * @@ -305,6 +306,38 @@ static void test_controls(void) { CHECK(omega_bw_hazard_check(c, 15, &g_rep) == -1 && omega_bw_hazard_check(NULL, 16, &g_rep) == -1, "control: bad length / NULL refused"); } +/* Only LDCU/LDCU64 write a uniform register (the encoder's rule). An IMAD R, R, UR, R carries is_uniform for its + * uniform SOURCE; its destination is a GPR whose live interval starts at the IMAD. The allocator must not hand that + * GPR to a value still live there (c below, read at IR 3), and must not count the IMAD as a def of the uniform + * vreg with the same index (u1, defined at IR 5). */ +static void test_uniform_source_dst(void) { + static BlackwellIRProgram p; + omega_bw_ir_init(&p); + const int u0 = omega_bw_ir_alloc_uvreg(&p), u1 = omega_bw_ir_alloc_uvreg(&p); + const int c = omega_bw_ir_alloc_vreg(&p), d = omega_bw_ir_alloc_vreg(&p), e = omega_bw_ir_alloc_vreg(&p); + const int f = omega_bw_ir_alloc_vreg(&p), g = omega_bw_ir_alloc_vreg(&p); + BlackwellIRInsn prog[] = { + mk(BW_IR_LDCU, u0, -1, -1, -1, -1, 0), /* 0 */ + mk(BW_IR_MOV_IMM, c, -1, -1, -1, -1, 0), /* 1 */ + mk(BW_IR_IMAD, d, c, -1, c, u0, 0), /* 2: d = c * UR(u0) + c, the uniform-source form */ + mk(BW_IR_IADD3, e, c, c, -1, -1, 0), /* 3: last read of c */ + mk(BW_IR_IADD3, f, d, e, -1, -1, 0), /* 4: first read of d */ + mk(BW_IR_LDCU, u1, -1, -1, -1, -1, 0), /* 5 */ + mk(BW_IR_IMAD, g, f, -1, f, u1, 0), /* 6 */ + mk(BW_IR_EXIT, -1, -1, -1, -1, -1, 0), /* 7 */ + }; + prog[0].is_uniform = prog[2].is_uniform = prog[5].is_uniform = prog[6].is_uniform = true; + int ok = 1; + for (unsigned i = 0; i < sizeof prog / sizeof *prog; i++) ok &= omega_bw_ir_append(&p, &prog[i]) == (int)i; + CHECK(ok && omega_bw_regalloc_solve(&p) == 0, "uniform-source IMAD: program appends and allocates"); + CHECK(p.regalloc.intervals[d].first_def == 2, "uniform-source IMAD: GPR dst interval starts at the IMAD (IR 2), got %d", + p.regalloc.intervals[d].first_def); + CHECK(p.regalloc.vreg_to_phys[d] != p.regalloc.vreg_to_phys[c], + "uniform-source IMAD: dst R%d must not reuse R%d of c, still live until IR 3", p.regalloc.vreg_to_phys[d], p.regalloc.vreg_to_phys[c]); + CHECK(p.regalloc.uintervals[u1].first_def == 5, "uniform-source IMAD: uniform vreg %d first def is its LDCU (IR 5), got %d", u1, + p.regalloc.uintervals[u1].first_def); +} + /* ------------------------------------------------------------------------------------------------------- 4. sweep */ typedef struct { const char *family; char variant[96]; uint64_t hash; size_t findings; } Seen; #define MAX_SEEN 8192 @@ -618,6 +651,7 @@ int main(int argc, char **argv) { test_decoder_vs_encoder(); test_red_receipt(dir); test_controls(); + test_uniform_source_dst(); sweep(); size_t clean = 0; printf("sweep per generator (distinct kernels, clean, findings):\n"); diff --git a/tools/test_bw_spec_encoder.sh b/tools/test_bw_spec_encoder.sh index 2dd16e2c..fa541129 100755 --- a/tools/test_bw_spec_encoder.sh +++ b/tools/test_bw_spec_encoder.sh @@ -253,6 +253,9 @@ case "$target" in ;; *) log "NOT_RUN: native AArch64 function-byte probe needs an AArch64 C target (got $target)" - log "SPEC-DRIVEN ENCODER/DECODER VERIFICATIONS PASSED (HOST_TESTED); native AArch64 binding NOT_RUN" + # A skipped probe is not a pass: exit 3 (NOT_RUN, as above) unless the caller + # states it accepts this row as NOT_RUN (make test-om-spec-encoder on non-AArch64 hosts). + [ "${BW_SPEC_NATIVE_PROBE_NOT_RUN_OK:-}" = 1 ] || exit 3 + log "SPEC-DRIVEN ENCODER/DECODER VERIFICATIONS PASSED (HOST_TESTED); native AArch64 binding NOT_RUN (accepted by BW_SPEC_NATIVE_PROBE_NOT_RUN_OK=1)" ;; esac From 99ec26647cfed26d43b3c994b5f2e5e48223f095 Mon Sep 17 00:00:00 2001 From: x Date: Sat, 31 Oct 2026 09:25:03 -0500 Subject: [PATCH 21/21] drift: baseline tests/bw_hazard_test.c at omega 6d7b8838's blob; CUDA++ is ahead with the sm_86 cases The file was a byte copy of omega with no baseline row; #170's sm_86 uniform-destination cases made it differ, which drift read as omega drift. Self-test vs omega 2638a49b PASS; a scratch omega edit to the file still fails. --- tools/extract/.crumb | 8 ++++---- tools/extract/drift-baseline.tsv | 2 ++ 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/tools/extract/.crumb b/tools/extract/.crumb index 6eb57155..bb0582df 100644 --- a/tools/extract/.crumb +++ b/tools/extract/.crumb @@ -3,14 +3,14 @@ "generated": { "children": [], "children_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", - "compiled_at": "2026-10-31T12:28:51Z", + "compiled_at": "2026-10-31T14:25:29Z", "compiler": "crumb-compile/1", - "digest": "sha256:f5fa9f6e75e15e3d4aa12fd5a1b0446ac993af21e931e8e4037851d4803f4be7", + "digest": "sha256:3f1a49f75f5135ddcbf16d7d9b8f0727c6b807749d27c9b7af3e1df9aa1bc9fd", "evidence_files": 0, "evidence_root": "sha256:e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855", "files": 30, - "generated_at_commit": "37868ce54803f1089857fc8f0d7a0d661442b8e3", - "source_tree": "sha256:3c9c6bb2530fa1930ac5f72dd4eb4c6c611e02ff250487f374cb8413c527914f" + "generated_at_commit": "4e888d1f9ea8cd97bcc790764d75565da996a434", + "source_tree": "sha256:207733c19a122029efa439ff585327996153cf6cd6b505f2264c81c98c755e5f" } }, "name": "extract", diff --git a/tools/extract/drift-baseline.tsv b/tools/extract/drift-baseline.tsv index 75cbd57c..c9dbdf69 100644 --- a/tools/extract/drift-baseline.tsv +++ b/tools/extract/drift-baseline.tsv @@ -13,6 +13,7 @@ # Makefile and src/omega_blackwell_gates.c are omega 0243e4aff88937b4e616d8e211d47084aca2befe's blobs (#579 clean clones: gate 16 in a private folder, no shell). Both changes are Omega-side only: omega_blackwell_gates.c is a stay.txt bridge that CUDA++ does not carry, and the Makefile delta only adds the new Omega bridge src/omega_clean_clone.c (not a GPU path) to Omega's build and keeps it out of libomega_gpu.a; no bytes to sync (CUDApp sync/drift-omega-0243e4af). # Still differ at 4376c21 on purpose: Makefile (CUDA++ build); src/omega_gpu_fp8_api.c (CUDA++ owner-generation upload kept, omega#456 lock-held fill already there); # tests/gpu_fp8gemm_test.c (CUDA++ test_out_open 0600 receipt kept over omega's 0644 open); licence headers. +# tests/bw_hazard_test.c is omega 6d7b883844a0f17a7a3ceb427108be7e01e4c677's blob (#984, unchanged through omega 2638a49b); CUDA++ is ahead there with the sm_86 uniform-destination cases (#170), so any later omega edit to it must still fail. Makefile 6011dfa5d7d883b01ac3671f630499ef5f9d1fcc evidence/C3-GEMM/01-host-only.log c581c5126718bc24ef10ed1b1637528018a260e5 evidence/C3-GEMM/02-sim.log fd97da9f29871abfc16fb2ed938c38a4d3c2314f @@ -301,6 +302,7 @@ src/runtime/rx_costmodel.c d8ddf956d88d4d9164682d2223a277cd04fc37dd src/runtime/rx_costmodel.h 6e2c0db52fafe3548e9161bc96ea9c07292dcd36 src/sha256.h 7db16bcacfbe68623fc2a042dd4cca5a388e41f9 tests/bw_encode_control_test.c 46a67b11dfc65bf7d6fab711312b6368a8814f87 +tests/bw_hazard_test.c e052b0904db6ad5eac33effaaf9111245bbdb9dc tests/bw_hmma_model.h f019912d90dd2f5b1b3634473abdc8f767c32c25 tests/bw_qmma_model.h 8429ad2cbf5031f435b13f3bcb332dbdbfac1d58 tests/bw_warp_sim.h 6d93828f3979b3a7223ebe0f1952b53e1d414764